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-rw-r--r--drivers/ide/legacy/qd65xx.c511
1 files changed, 511 insertions, 0 deletions
diff --git a/drivers/ide/legacy/qd65xx.c b/drivers/ide/legacy/qd65xx.c
new file mode 100644
index 000000000000..563fab0098be
--- /dev/null
+++ b/drivers/ide/legacy/qd65xx.c
@@ -0,0 +1,511 @@
1/*
2 * linux/drivers/ide/legacy/qd65xx.c Version 0.07 Sep 30, 2001
3 *
4 * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
5 */
6
7/*
8 * Version 0.03 Cleaned auto-tune, added probe
9 * Version 0.04 Added second channel tuning
10 * Version 0.05 Enhanced tuning ; added qd6500 support
11 * Version 0.06 Added dos driver's list
12 * Version 0.07 Second channel bug fix
13 *
14 * QDI QD6500/QD6580 EIDE controller fast support
15 *
16 * Please set local bus speed using kernel parameter idebus
17 * for example, "idebus=33" stands for 33Mhz VLbus
18 * To activate controller support, use "ide0=qd65xx"
19 * To enable tuning, use "ide0=autotune"
20 * To enable second channel tuning (qd6580 only), use "ide1=autotune"
21 */
22
23/*
24 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
25 * Samuel Thibault <samuel.thibault@fnac.net>
26 */
27
28#undef REALLY_SLOW_IO /* most systems can safely undef this */
29
30#include <linux/module.h>
31#include <linux/config.h>
32#include <linux/types.h>
33#include <linux/kernel.h>
34#include <linux/delay.h>
35#include <linux/timer.h>
36#include <linux/mm.h>
37#include <linux/ioport.h>
38#include <linux/blkdev.h>
39#include <linux/hdreg.h>
40#include <linux/ide.h>
41#include <linux/init.h>
42#include <asm/system.h>
43#include <asm/io.h>
44
45#include "qd65xx.h"
46
47/*
48 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
49 * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
50 * -- qd6500 is a single IDE interface
51 * -- qd6580 is a dual IDE interface
52 *
53 * More research on qd6580 being done by willmore@cig.mot.com (David)
54 * More Information given by Petr Soucek (petr@ryston.cz)
55 * http://www.ryston.cz/petr/vlb
56 */
57
58/*
59 * base: Timer1
60 *
61 *
62 * base+0x01: Config (R/O)
63 *
64 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
65 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
66 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
67 * bit 3: qd6500: 1 = disabled, 0 = enabled
68 * qd6580: 1
69 * upper nibble:
70 * qd6500: 1100
71 * qd6580: either 1010 or 0101
72 *
73 *
74 * base+0x02: Timer2 (qd6580 only)
75 *
76 *
77 * base+0x03: Control (qd6580 only)
78 *
79 * bits 0-3 must always be set 1
80 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
81 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
82 * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
83 * channel 1 for hdc & hdd
84 * bit 1 : 1 = only disks on primary port
85 * 0 = disks & ATAPI devices on primary port
86 * bit 2-4 : always 0
87 * bit 5 : status, but of what ?
88 * bit 6 : always set 1 by dos driver
89 * bit 7 : set 1 for non-ATAPI devices on primary port
90 * (maybe read-ahead and post-write buffer ?)
91 */
92
93static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
94
95static void qd_write_reg (u8 content, unsigned long reg)
96{
97 unsigned long flags;
98
99 spin_lock_irqsave(&ide_lock, flags);
100 outb(content,reg);
101 spin_unlock_irqrestore(&ide_lock, flags);
102}
103
104static u8 __init qd_read_reg (unsigned long reg)
105{
106 unsigned long flags;
107 u8 read;
108
109 spin_lock_irqsave(&ide_lock, flags);
110 read = inb(reg);
111 spin_unlock_irqrestore(&ide_lock, flags);
112 return read;
113}
114
115/*
116 * qd_select:
117 *
118 * This routine is invoked from ide.c to prepare for access to a given drive.
119 */
120
121static void qd_select (ide_drive_t *drive)
122{
123 u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
124 (QD_TIMREG(drive) & 0x02);
125
126 if (timings[index] != QD_TIMING(drive))
127 qd_write_reg(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
128}
129
130/*
131 * qd6500_compute_timing
132 *
133 * computes the timing value where
134 * lower nibble represents active time, in count of VLB clocks
135 * upper nibble represents recovery time, in count of VLB clocks
136 */
137
138static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
139{
140 u8 active_cycle,recovery_cycle;
141
142 if (system_bus_clock()<=33) {
143 active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
144 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
145 } else {
146 active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
147 recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
148 }
149
150 return((recovery_cycle<<4) | 0x08 | active_cycle);
151}
152
153/*
154 * qd6580_compute_timing
155 *
156 * idem for qd6580
157 */
158
159static u8 qd6580_compute_timing (int active_time, int recovery_time)
160{
161 u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
162 u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
163
164 return((recovery_cycle<<4) | active_cycle);
165}
166
167/*
168 * qd_find_disk_type
169 *
170 * tries to find timing from dos driver's table
171 */
172
173static int qd_find_disk_type (ide_drive_t *drive,
174 int *active_time, int *recovery_time)
175{
176 struct qd65xx_timing_s *p;
177 char model[40];
178
179 if (!*drive->id->model) return 0;
180
181 strncpy(model,drive->id->model,40);
182 ide_fixstring(model,40,1); /* byte-swap */
183
184 for (p = qd65xx_timing ; p->offset != -1 ; p++) {
185 if (!strncmp(p->model, model+p->offset, 4)) {
186 printk(KERN_DEBUG "%s: listed !\n", drive->name);
187 *active_time = p->active;
188 *recovery_time = p->recovery;
189 return 1;
190 }
191 }
192 return 0;
193}
194
195/*
196 * qd_timing_ok:
197 *
198 * check whether timings don't conflict
199 */
200
201static int qd_timing_ok (ide_drive_t drives[])
202{
203 return (IDE_IMPLY(drives[0].present && drives[1].present,
204 IDE_IMPLY(QD_TIMREG(drives) == QD_TIMREG(drives+1),
205 QD_TIMING(drives) == QD_TIMING(drives+1))));
206 /* if same timing register, must be same timing */
207}
208
209/*
210 * qd_set_timing:
211 *
212 * records the timing, and enables selectproc as needed
213 */
214
215static void qd_set_timing (ide_drive_t *drive, u8 timing)
216{
217 ide_hwif_t *hwif = HWIF(drive);
218
219 drive->drive_data &= 0xff00;
220 drive->drive_data |= timing;
221 if (qd_timing_ok(hwif->drives)) {
222 qd_select(drive); /* selects once */
223 hwif->selectproc = NULL;
224 } else
225 hwif->selectproc = &qd_select;
226
227 printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
228}
229
230/*
231 * qd6500_tune_drive
232 */
233
234static void qd6500_tune_drive (ide_drive_t *drive, u8 pio)
235{
236 int active_time = 175;
237 int recovery_time = 415; /* worst case values from the dos driver */
238
239 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
240 && drive->id->tPIO && (drive->id->field_valid & 0x02)
241 && drive->id->eide_pio >= 240) {
242
243 printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
244 drive->id->tPIO);
245 active_time = 110;
246 recovery_time = drive->id->eide_pio - 120;
247 }
248
249 qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
250}
251
252/*
253 * qd6580_tune_drive
254 */
255
256static void qd6580_tune_drive (ide_drive_t *drive, u8 pio)
257{
258 ide_pio_data_t d;
259 int base = HWIF(drive)->select_data;
260 int active_time = 175;
261 int recovery_time = 415; /* worst case values from the dos driver */
262
263 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
264 pio = ide_get_best_pio_mode(drive, pio, 255, &d);
265 pio = min_t(u8, pio, 4);
266
267 switch (pio) {
268 case 0: break;
269 case 3:
270 if (d.cycle_time >= 110) {
271 active_time = 86;
272 recovery_time = d.cycle_time - 102;
273 } else
274 printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
275 break;
276 case 4:
277 if (d.cycle_time >= 69) {
278 active_time = 70;
279 recovery_time = d.cycle_time - 61;
280 } else
281 printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
282 break;
283 default:
284 if (d.cycle_time >= 180) {
285 active_time = 110;
286 recovery_time = d.cycle_time - 120;
287 } else {
288 active_time = ide_pio_timings[pio].active_time;
289 recovery_time = d.cycle_time
290 -active_time;
291 }
292 }
293 printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
294 }
295
296 if (!HWIF(drive)->channel && drive->media != ide_disk) {
297 qd_write_reg(0x5f, QD_CONTROL_PORT);
298 printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
299 "and post-write buffer on %s.\n",
300 drive->name, HWIF(drive)->name);
301 }
302
303 qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
304}
305
306/*
307 * qd_testreg
308 *
309 * tests if the given port is a register
310 */
311
312static int __init qd_testreg(int port)
313{
314 u8 savereg;
315 u8 readreg;
316 unsigned long flags;
317
318 spin_lock_irqsave(&ide_lock, flags);
319 savereg = inb_p(port);
320 outb_p(QD_TESTVAL, port); /* safe value */
321 readreg = inb_p(port);
322 outb(savereg, port);
323 spin_unlock_irqrestore(&ide_lock, flags);
324
325 if (savereg == QD_TESTVAL) {
326 printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
327 printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
328 printk(KERN_ERR "Assuming qd65xx is not present.\n");
329 return 1;
330 }
331
332 return (readreg != QD_TESTVAL);
333}
334
335/*
336 * qd_setup:
337 *
338 * called to setup an ata channel : adjusts attributes & links for tuning
339 */
340
341static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
342 unsigned int data0, unsigned int data1,
343 void (*tuneproc) (ide_drive_t *, u8 pio))
344{
345 hwif->chipset = ide_qd65xx;
346 hwif->channel = hwif->index;
347 hwif->select_data = base;
348 hwif->config_data = config;
349 hwif->drives[0].drive_data = data0;
350 hwif->drives[1].drive_data = data1;
351 hwif->drives[0].io_32bit =
352 hwif->drives[1].io_32bit = 1;
353 hwif->tuneproc = tuneproc;
354 probe_hwif_init(hwif);
355}
356
357/*
358 * qd_unsetup:
359 *
360 * called to unsetup an ata channel : back to default values, unlinks tuning
361 */
362/*
363static void __exit qd_unsetup(ide_hwif_t *hwif)
364{
365 u8 config = hwif->config_data;
366 int base = hwif->select_data;
367 void *tuneproc = (void *) hwif->tuneproc;
368
369 if (hwif->chipset != ide_qd65xx)
370 return;
371
372 printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);
373
374 hwif->selectproc = NULL;
375 hwif->tuneproc = NULL;
376
377 if (tuneproc == (void *) qd6500_tune_drive) {
378 // will do it for both
379 qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
380 } else if (tuneproc == (void *) qd6580_tune_drive) {
381 if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
382 qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
383 qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
384 } else {
385 qd_write_reg(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
386 }
387 } else {
388 printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n");
389 printk(KERN_WARNING "keeping settings !\n");
390 }
391}
392*/
393
394/*
395 * qd_probe:
396 *
397 * looks at the specified baseport, and if qd found, registers & initialises it
398 * return 1 if another qd may be probed
399 */
400
401static int __init qd_probe(int base)
402{
403 ide_hwif_t *hwif;
404 u8 config;
405 u8 unit;
406
407 config = qd_read_reg(QD_CONFIG_PORT);
408
409 if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
410 return 1;
411
412 unit = ! (config & QD_CONFIG_IDE_BASEPORT);
413
414 if ((config & 0xf0) == QD_CONFIG_QD6500) {
415
416 if (qd_testreg(base)) return 1; /* bad register */
417
418 /* qd6500 found */
419
420 hwif = &ide_hwifs[unit];
421 printk(KERN_NOTICE "%s: qd6500 at %#x\n", hwif->name, base);
422 printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
423 config, QD_ID3);
424
425 if (config & QD_CONFIG_DISABLED) {
426 printk(KERN_WARNING "qd6500 is disabled !\n");
427 return 1;
428 }
429
430 qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA,
431 &qd6500_tune_drive);
432
433 create_proc_ide_interfaces();
434
435 return 1;
436 }
437
438 if (((config & 0xf0) == QD_CONFIG_QD6580_A) ||
439 ((config & 0xf0) == QD_CONFIG_QD6580_B)) {
440
441 u8 control;
442
443 if (qd_testreg(base) || qd_testreg(base+0x02)) return 1;
444 /* bad registers */
445
446 /* qd6580 found */
447
448 control = qd_read_reg(QD_CONTROL_PORT);
449
450 printk(KERN_NOTICE "qd6580 at %#x\n", base);
451 printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
452 config, control, QD_ID3);
453
454 if (control & QD_CONTR_SEC_DISABLED) {
455 /* secondary disabled */
456
457 hwif = &ide_hwifs[unit];
458 printk(KERN_INFO "%s: qd6580: single IDE board\n",
459 hwif->name);
460 qd_setup(hwif, base, config | (control << 8),
461 QD6580_DEF_DATA, QD6580_DEF_DATA2,
462 &qd6580_tune_drive);
463 qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
464
465 create_proc_ide_interfaces();
466
467 return 1;
468 } else {
469 ide_hwif_t *mate;
470
471 hwif = &ide_hwifs[0];
472 mate = &ide_hwifs[1];
473 /* secondary enabled */
474 printk(KERN_INFO "%s&%s: qd6580: dual IDE board\n",
475 hwif->name, mate->name);
476
477 qd_setup(hwif, base, config | (control << 8),
478 QD6580_DEF_DATA, QD6580_DEF_DATA,
479 &qd6580_tune_drive);
480 qd_setup(mate, base, config | (control << 8),
481 QD6580_DEF_DATA2, QD6580_DEF_DATA2,
482 &qd6580_tune_drive);
483 qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
484
485 create_proc_ide_interfaces();
486
487 return 0; /* no other qd65xx possible */
488 }
489 }
490 /* no qd65xx found */
491 return 1;
492}
493
494/* Can be called directly from ide.c. */
495int __init qd65xx_init(void)
496{
497 if (qd_probe(0x30))
498 qd_probe(0xb0);
499 if (ide_hwifs[0].chipset != ide_qd65xx &&
500 ide_hwifs[1].chipset != ide_qd65xx)
501 return -ENODEV;
502 return 0;
503}
504
505#ifdef MODULE
506module_init(qd65xx_init);
507#endif
508
509MODULE_AUTHOR("Samuel Thibault");
510MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
511MODULE_LICENSE("GPL");