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path: root/drivers/ide/ide-timings.c
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Diffstat (limited to 'drivers/ide/ide-timings.c')
-rw-r--r--drivers/ide/ide-timings.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/ide/ide-timings.c b/drivers/ide/ide-timings.c
index 81f527af8fae..001a56365be5 100644
--- a/drivers/ide/ide-timings.c
+++ b/drivers/ide/ide-timings.c
@@ -43,6 +43,8 @@ static struct ide_timing ide_timing[] = {
43 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, 43 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
44 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, 44 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
45 45
46 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
47 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
46 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, 48 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
47 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, 49 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
48 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, 50 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
@@ -51,7 +53,8 @@ static struct ide_timing ide_timing[] = {
51 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, 53 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
52 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, 54 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
53 55
54 { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, 56 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
57 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
55 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, 58 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
56 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, 59 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
57 60
@@ -90,6 +93,10 @@ u16 ide_pio_cycle_time(ide_drive_t *drive, u8 pio)
90 /* conservative "downgrade" for all pre-ATA2 drives */ 93 /* conservative "downgrade" for all pre-ATA2 drives */
91 if (pio < 3 && cycle < t->cycle) 94 if (pio < 3 && cycle < t->cycle)
92 cycle = 0; /* use standard timing */ 95 cycle = 0; /* use standard timing */
96
97 /* Use the standard timing for the CF specific modes too */
98 if (pio > 4 && ata_id_is_cfa(id))
99 cycle = 0;
93 } 100 }
94 101
95 return cycle ? cycle : t->cycle; 102 return cycle ? cycle : t->cycle;
@@ -161,7 +168,8 @@ int ide_timing_compute(ide_drive_t *drive, u8 speed,
161 168
162 if (speed <= XFER_PIO_2) 169 if (speed <= XFER_PIO_2)
163 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO]; 170 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
164 else if (speed <= XFER_PIO_5) 171 else if ((speed <= XFER_PIO_4) ||
172 (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
165 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY]; 173 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
166 else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) 174 else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
167 p.cycle = id[ATA_ID_EIDE_DMA_MIN]; 175 p.cycle = id[ATA_ID_EIDE_DMA_MIN];