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-rw-r--r--drivers/ide/ide-iops.c1285
1 files changed, 1285 insertions, 0 deletions
diff --git a/drivers/ide/ide-iops.c b/drivers/ide/ide-iops.c
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+++ b/drivers/ide/ide-iops.c
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1/*
2 * linux/drivers/ide/ide-iops.c Version 0.37 Mar 05, 2003
3 *
4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2003 Red Hat <alan@redhat.com>
6 *
7 */
8
9#include <linux/config.h>
10#include <linux/module.h>
11#include <linux/types.h>
12#include <linux/string.h>
13#include <linux/kernel.h>
14#include <linux/timer.h>
15#include <linux/mm.h>
16#include <linux/interrupt.h>
17#include <linux/major.h>
18#include <linux/errno.h>
19#include <linux/genhd.h>
20#include <linux/blkpg.h>
21#include <linux/slab.h>
22#include <linux/pci.h>
23#include <linux/delay.h>
24#include <linux/hdreg.h>
25#include <linux/ide.h>
26#include <linux/bitops.h>
27
28#include <asm/byteorder.h>
29#include <asm/irq.h>
30#include <asm/uaccess.h>
31#include <asm/io.h>
32
33/*
34 * Conventional PIO operations for ATA devices
35 */
36
37static u8 ide_inb (unsigned long port)
38{
39 return (u8) inb(port);
40}
41
42static u16 ide_inw (unsigned long port)
43{
44 return (u16) inw(port);
45}
46
47static void ide_insw (unsigned long port, void *addr, u32 count)
48{
49 insw(port, addr, count);
50}
51
52static u32 ide_inl (unsigned long port)
53{
54 return (u32) inl(port);
55}
56
57static void ide_insl (unsigned long port, void *addr, u32 count)
58{
59 insl(port, addr, count);
60}
61
62static void ide_outb (u8 val, unsigned long port)
63{
64 outb(val, port);
65}
66
67static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
68{
69 outb(addr, port);
70}
71
72static void ide_outw (u16 val, unsigned long port)
73{
74 outw(val, port);
75}
76
77static void ide_outsw (unsigned long port, void *addr, u32 count)
78{
79 outsw(port, addr, count);
80}
81
82static void ide_outl (u32 val, unsigned long port)
83{
84 outl(val, port);
85}
86
87static void ide_outsl (unsigned long port, void *addr, u32 count)
88{
89 outsl(port, addr, count);
90}
91
92void default_hwif_iops (ide_hwif_t *hwif)
93{
94 hwif->OUTB = ide_outb;
95 hwif->OUTBSYNC = ide_outbsync;
96 hwif->OUTW = ide_outw;
97 hwif->OUTL = ide_outl;
98 hwif->OUTSW = ide_outsw;
99 hwif->OUTSL = ide_outsl;
100 hwif->INB = ide_inb;
101 hwif->INW = ide_inw;
102 hwif->INL = ide_inl;
103 hwif->INSW = ide_insw;
104 hwif->INSL = ide_insl;
105}
106
107EXPORT_SYMBOL(default_hwif_iops);
108
109/*
110 * MMIO operations, typically used for SATA controllers
111 */
112
113static u8 ide_mm_inb (unsigned long port)
114{
115 return (u8) readb((void __iomem *) port);
116}
117
118static u16 ide_mm_inw (unsigned long port)
119{
120 return (u16) readw((void __iomem *) port);
121}
122
123static void ide_mm_insw (unsigned long port, void *addr, u32 count)
124{
125 __ide_mm_insw((void __iomem *) port, addr, count);
126}
127
128static u32 ide_mm_inl (unsigned long port)
129{
130 return (u32) readl((void __iomem *) port);
131}
132
133static void ide_mm_insl (unsigned long port, void *addr, u32 count)
134{
135 __ide_mm_insl((void __iomem *) port, addr, count);
136}
137
138static void ide_mm_outb (u8 value, unsigned long port)
139{
140 writeb(value, (void __iomem *) port);
141}
142
143static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
144{
145 writeb(value, (void __iomem *) port);
146}
147
148static void ide_mm_outw (u16 value, unsigned long port)
149{
150 writew(value, (void __iomem *) port);
151}
152
153static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
154{
155 __ide_mm_outsw((void __iomem *) port, addr, count);
156}
157
158static void ide_mm_outl (u32 value, unsigned long port)
159{
160 writel(value, (void __iomem *) port);
161}
162
163static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
164{
165 __ide_mm_outsl((void __iomem *) port, addr, count);
166}
167
168void default_hwif_mmiops (ide_hwif_t *hwif)
169{
170 hwif->OUTB = ide_mm_outb;
171 /* Most systems will need to override OUTBSYNC, alas however
172 this one is controller specific! */
173 hwif->OUTBSYNC = ide_mm_outbsync;
174 hwif->OUTW = ide_mm_outw;
175 hwif->OUTL = ide_mm_outl;
176 hwif->OUTSW = ide_mm_outsw;
177 hwif->OUTSL = ide_mm_outsl;
178 hwif->INB = ide_mm_inb;
179 hwif->INW = ide_mm_inw;
180 hwif->INL = ide_mm_inl;
181 hwif->INSW = ide_mm_insw;
182 hwif->INSL = ide_mm_insl;
183}
184
185EXPORT_SYMBOL(default_hwif_mmiops);
186
187u32 ide_read_24 (ide_drive_t *drive)
188{
189 u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG);
190 u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG);
191 u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG);
192 return (hcyl<<16)|(lcyl<<8)|sect;
193}
194
195void SELECT_DRIVE (ide_drive_t *drive)
196{
197 if (HWIF(drive)->selectproc)
198 HWIF(drive)->selectproc(drive);
199 HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG);
200}
201
202EXPORT_SYMBOL(SELECT_DRIVE);
203
204void SELECT_INTERRUPT (ide_drive_t *drive)
205{
206 if (HWIF(drive)->intrproc)
207 HWIF(drive)->intrproc(drive);
208 else
209 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG);
210}
211
212void SELECT_MASK (ide_drive_t *drive, int mask)
213{
214 if (HWIF(drive)->maskproc)
215 HWIF(drive)->maskproc(drive, mask);
216}
217
218void QUIRK_LIST (ide_drive_t *drive)
219{
220 if (HWIF(drive)->quirkproc)
221 drive->quirk_list = HWIF(drive)->quirkproc(drive);
222}
223
224/*
225 * Some localbus EIDE interfaces require a special access sequence
226 * when using 32-bit I/O instructions to transfer data. We call this
227 * the "vlb_sync" sequence, which consists of three successive reads
228 * of the sector count register location, with interrupts disabled
229 * to ensure that the reads all happen together.
230 */
231static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
232{
233 (void) HWIF(drive)->INB(port);
234 (void) HWIF(drive)->INB(port);
235 (void) HWIF(drive)->INB(port);
236}
237
238/*
239 * This is used for most PIO data transfers *from* the IDE interface
240 */
241static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
242{
243 ide_hwif_t *hwif = HWIF(drive);
244 u8 io_32bit = drive->io_32bit;
245
246 if (io_32bit) {
247 if (io_32bit & 2) {
248 unsigned long flags;
249 local_irq_save(flags);
250 ata_vlb_sync(drive, IDE_NSECTOR_REG);
251 hwif->INSL(IDE_DATA_REG, buffer, wcount);
252 local_irq_restore(flags);
253 } else
254 hwif->INSL(IDE_DATA_REG, buffer, wcount);
255 } else {
256 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1);
257 }
258}
259
260/*
261 * This is used for most PIO data transfers *to* the IDE interface
262 */
263static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
264{
265 ide_hwif_t *hwif = HWIF(drive);
266 u8 io_32bit = drive->io_32bit;
267
268 if (io_32bit) {
269 if (io_32bit & 2) {
270 unsigned long flags;
271 local_irq_save(flags);
272 ata_vlb_sync(drive, IDE_NSECTOR_REG);
273 hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
274 local_irq_restore(flags);
275 } else
276 hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
277 } else {
278 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1);
279 }
280}
281
282/*
283 * The following routines are mainly used by the ATAPI drivers.
284 *
285 * These routines will round up any request for an odd number of bytes,
286 * so if an odd bytecount is specified, be sure that there's at least one
287 * extra byte allocated for the buffer.
288 */
289
290static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
291{
292 ide_hwif_t *hwif = HWIF(drive);
293
294 ++bytecount;
295#if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
296 if (MACH_IS_ATARI || MACH_IS_Q40) {
297 /* Atari has a byte-swapped IDE interface */
298 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
299 return;
300 }
301#endif /* CONFIG_ATARI || CONFIG_Q40 */
302 hwif->ata_input_data(drive, buffer, bytecount / 4);
303 if ((bytecount & 0x03) >= 2)
304 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1);
305}
306
307static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
308{
309 ide_hwif_t *hwif = HWIF(drive);
310
311 ++bytecount;
312#if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
313 if (MACH_IS_ATARI || MACH_IS_Q40) {
314 /* Atari has a byte-swapped IDE interface */
315 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
316 return;
317 }
318#endif /* CONFIG_ATARI || CONFIG_Q40 */
319 hwif->ata_output_data(drive, buffer, bytecount / 4);
320 if ((bytecount & 0x03) >= 2)
321 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1);
322}
323
324void default_hwif_transport(ide_hwif_t *hwif)
325{
326 hwif->ata_input_data = ata_input_data;
327 hwif->ata_output_data = ata_output_data;
328 hwif->atapi_input_bytes = atapi_input_bytes;
329 hwif->atapi_output_bytes = atapi_output_bytes;
330}
331
332EXPORT_SYMBOL(default_hwif_transport);
333
334/*
335 * Beginning of Taskfile OPCODE Library and feature sets.
336 */
337void ide_fix_driveid (struct hd_driveid *id)
338{
339#ifndef __LITTLE_ENDIAN
340# ifdef __BIG_ENDIAN
341 int i;
342 u16 *stringcast;
343
344 id->config = __le16_to_cpu(id->config);
345 id->cyls = __le16_to_cpu(id->cyls);
346 id->reserved2 = __le16_to_cpu(id->reserved2);
347 id->heads = __le16_to_cpu(id->heads);
348 id->track_bytes = __le16_to_cpu(id->track_bytes);
349 id->sector_bytes = __le16_to_cpu(id->sector_bytes);
350 id->sectors = __le16_to_cpu(id->sectors);
351 id->vendor0 = __le16_to_cpu(id->vendor0);
352 id->vendor1 = __le16_to_cpu(id->vendor1);
353 id->vendor2 = __le16_to_cpu(id->vendor2);
354 stringcast = (u16 *)&id->serial_no[0];
355 for (i = 0; i < (20/2); i++)
356 stringcast[i] = __le16_to_cpu(stringcast[i]);
357 id->buf_type = __le16_to_cpu(id->buf_type);
358 id->buf_size = __le16_to_cpu(id->buf_size);
359 id->ecc_bytes = __le16_to_cpu(id->ecc_bytes);
360 stringcast = (u16 *)&id->fw_rev[0];
361 for (i = 0; i < (8/2); i++)
362 stringcast[i] = __le16_to_cpu(stringcast[i]);
363 stringcast = (u16 *)&id->model[0];
364 for (i = 0; i < (40/2); i++)
365 stringcast[i] = __le16_to_cpu(stringcast[i]);
366 id->dword_io = __le16_to_cpu(id->dword_io);
367 id->reserved50 = __le16_to_cpu(id->reserved50);
368 id->field_valid = __le16_to_cpu(id->field_valid);
369 id->cur_cyls = __le16_to_cpu(id->cur_cyls);
370 id->cur_heads = __le16_to_cpu(id->cur_heads);
371 id->cur_sectors = __le16_to_cpu(id->cur_sectors);
372 id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0);
373 id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1);
374 id->lba_capacity = __le32_to_cpu(id->lba_capacity);
375 id->dma_1word = __le16_to_cpu(id->dma_1word);
376 id->dma_mword = __le16_to_cpu(id->dma_mword);
377 id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
378 id->eide_dma_min = __le16_to_cpu(id->eide_dma_min);
379 id->eide_dma_time = __le16_to_cpu(id->eide_dma_time);
380 id->eide_pio = __le16_to_cpu(id->eide_pio);
381 id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
382 for (i = 0; i < 2; ++i)
383 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
384 for (i = 0; i < 4; ++i)
385 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
386 id->queue_depth = __le16_to_cpu(id->queue_depth);
387 for (i = 0; i < 4; ++i)
388 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
389 id->major_rev_num = __le16_to_cpu(id->major_rev_num);
390 id->minor_rev_num = __le16_to_cpu(id->minor_rev_num);
391 id->command_set_1 = __le16_to_cpu(id->command_set_1);
392 id->command_set_2 = __le16_to_cpu(id->command_set_2);
393 id->cfsse = __le16_to_cpu(id->cfsse);
394 id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1);
395 id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2);
396 id->csf_default = __le16_to_cpu(id->csf_default);
397 id->dma_ultra = __le16_to_cpu(id->dma_ultra);
398 id->trseuc = __le16_to_cpu(id->trseuc);
399 id->trsEuc = __le16_to_cpu(id->trsEuc);
400 id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues);
401 id->mprc = __le16_to_cpu(id->mprc);
402 id->hw_config = __le16_to_cpu(id->hw_config);
403 id->acoustic = __le16_to_cpu(id->acoustic);
404 id->msrqs = __le16_to_cpu(id->msrqs);
405 id->sxfert = __le16_to_cpu(id->sxfert);
406 id->sal = __le16_to_cpu(id->sal);
407 id->spg = __le32_to_cpu(id->spg);
408 id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
409 for (i = 0; i < 22; i++)
410 id->words104_125[i] = __le16_to_cpu(id->words104_125[i]);
411 id->last_lun = __le16_to_cpu(id->last_lun);
412 id->word127 = __le16_to_cpu(id->word127);
413 id->dlf = __le16_to_cpu(id->dlf);
414 id->csfo = __le16_to_cpu(id->csfo);
415 for (i = 0; i < 26; i++)
416 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
417 id->word156 = __le16_to_cpu(id->word156);
418 for (i = 0; i < 3; i++)
419 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
420 id->cfa_power = __le16_to_cpu(id->cfa_power);
421 for (i = 0; i < 14; i++)
422 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
423 for (i = 0; i < 31; i++)
424 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
425 for (i = 0; i < 48; i++)
426 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
427 id->integrity_word = __le16_to_cpu(id->integrity_word);
428# else
429# error "Please fix <asm/byteorder.h>"
430# endif
431#endif
432}
433
434/* FIXME: exported for use by the USB storage (isd200.c) code only */
435EXPORT_SYMBOL(ide_fix_driveid);
436
437void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
438{
439 u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
440
441 if (byteswap) {
442 /* convert from big-endian to host byte order */
443 for (p = end ; p != s;) {
444 unsigned short *pp = (unsigned short *) (p -= 2);
445 *pp = ntohs(*pp);
446 }
447 }
448 /* strip leading blanks */
449 while (s != end && *s == ' ')
450 ++s;
451 /* compress internal blanks and strip trailing blanks */
452 while (s != end && *s) {
453 if (*s++ != ' ' || (s != end && *s && *s != ' '))
454 *p++ = *(s-1);
455 }
456 /* wipe out trailing garbage */
457 while (p != end)
458 *p++ = '\0';
459}
460
461EXPORT_SYMBOL(ide_fixstring);
462
463/*
464 * Needed for PCI irq sharing
465 */
466int drive_is_ready (ide_drive_t *drive)
467{
468 ide_hwif_t *hwif = HWIF(drive);
469 u8 stat = 0;
470
471 if (drive->waiting_for_dma)
472 return hwif->ide_dma_test_irq(drive);
473
474#if 0
475 /* need to guarantee 400ns since last command was issued */
476 udelay(1);
477#endif
478
479#ifdef CONFIG_IDEPCI_SHARE_IRQ
480 /*
481 * We do a passive status test under shared PCI interrupts on
482 * cards that truly share the ATA side interrupt, but may also share
483 * an interrupt with another pci card/device. We make no assumptions
484 * about possible isa-pnp and pci-pnp issues yet.
485 */
486 if (IDE_CONTROL_REG)
487 stat = hwif->INB(IDE_ALTSTATUS_REG);
488 else
489#endif /* CONFIG_IDEPCI_SHARE_IRQ */
490 /* Note: this may clear a pending IRQ!! */
491 stat = hwif->INB(IDE_STATUS_REG);
492
493 if (stat & BUSY_STAT)
494 /* drive busy: definitely not interrupting */
495 return 0;
496
497 /* drive ready: *might* be interrupting */
498 return 1;
499}
500
501EXPORT_SYMBOL(drive_is_ready);
502
503/*
504 * Global for All, and taken from ide-pmac.c. Can be called
505 * with spinlock held & IRQs disabled, so don't schedule !
506 */
507int wait_for_ready (ide_drive_t *drive, int timeout)
508{
509 ide_hwif_t *hwif = HWIF(drive);
510 u8 stat = 0;
511
512 while(--timeout) {
513 stat = hwif->INB(IDE_STATUS_REG);
514 if (!(stat & BUSY_STAT)) {
515 if (drive->ready_stat == 0)
516 break;
517 else if ((stat & drive->ready_stat)||(stat & ERR_STAT))
518 break;
519 }
520 mdelay(1);
521 }
522 if ((stat & ERR_STAT) || timeout <= 0) {
523 if (stat & ERR_STAT) {
524 printk(KERN_ERR "%s: wait_for_ready, "
525 "error status: %x\n", drive->name, stat);
526 }
527 return 1;
528 }
529 return 0;
530}
531
532EXPORT_SYMBOL(wait_for_ready);
533
534/*
535 * This routine busy-waits for the drive status to be not "busy".
536 * It then checks the status for all of the "good" bits and none
537 * of the "bad" bits, and if all is okay it returns 0. All other
538 * cases return 1 after invoking ide_error() -- caller should just return.
539 *
540 * This routine should get fixed to not hog the cpu during extra long waits..
541 * That could be done by busy-waiting for the first jiffy or two, and then
542 * setting a timer to wake up at half second intervals thereafter,
543 * until timeout is achieved, before timing out.
544 */
545int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
546{
547 ide_hwif_t *hwif = HWIF(drive);
548 u8 stat;
549 int i;
550 unsigned long flags;
551
552 /* bail early if we've exceeded max_failures */
553 if (drive->max_failures && (drive->failures > drive->max_failures)) {
554 *startstop = ide_stopped;
555 return 1;
556 }
557
558 udelay(1); /* spec allows drive 400ns to assert "BUSY" */
559 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
560 local_irq_set(flags);
561 timeout += jiffies;
562 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
563 if (time_after(jiffies, timeout)) {
564 /*
565 * One last read after the timeout in case
566 * heavy interrupt load made us not make any
567 * progress during the timeout..
568 */
569 stat = hwif->INB(IDE_STATUS_REG);
570 if (!(stat & BUSY_STAT))
571 break;
572
573 local_irq_restore(flags);
574 *startstop = ide_error(drive, "status timeout", stat);
575 return 1;
576 }
577 }
578 local_irq_restore(flags);
579 }
580 /*
581 * Allow status to settle, then read it again.
582 * A few rare drives vastly violate the 400ns spec here,
583 * so we'll wait up to 10usec for a "good" status
584 * rather than expensively fail things immediately.
585 * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
586 */
587 for (i = 0; i < 10; i++) {
588 udelay(1);
589 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad))
590 return 0;
591 }
592 *startstop = ide_error(drive, "status error", stat);
593 return 1;
594}
595
596EXPORT_SYMBOL(ide_wait_stat);
597
598/*
599 * All hosts that use the 80c ribbon must use!
600 * The name is derived from upper byte of word 93 and the 80c ribbon.
601 */
602u8 eighty_ninty_three (ide_drive_t *drive)
603{
604#if 0
605 if (!HWIF(drive)->udma_four)
606 return 0;
607
608 if (drive->id->major_rev_num) {
609 int hssbd = 0;
610 int i;
611 /*
612 * Determine highest Supported SPEC
613 */
614 for (i=1; i<=15; i++)
615 if (drive->id->major_rev_num & (1<<i))
616 hssbd++;
617
618 switch (hssbd) {
619 case 7:
620 case 6:
621 case 5:
622 /* ATA-4 and older do not support above Ultra 33 */
623 default:
624 return 0;
625 }
626 }
627
628 return ((u8) (
629#ifndef CONFIG_IDEDMA_IVB
630 (drive->id->hw_config & 0x4000) &&
631#endif /* CONFIG_IDEDMA_IVB */
632 (drive->id->hw_config & 0x6000)) ? 1 : 0);
633
634#else
635
636 return ((u8) ((HWIF(drive)->udma_four) &&
637#ifndef CONFIG_IDEDMA_IVB
638 (drive->id->hw_config & 0x4000) &&
639#endif /* CONFIG_IDEDMA_IVB */
640 (drive->id->hw_config & 0x6000)) ? 1 : 0);
641#endif
642}
643
644EXPORT_SYMBOL(eighty_ninty_three);
645
646int ide_ata66_check (ide_drive_t *drive, ide_task_t *args)
647{
648 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
649 (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) &&
650 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) {
651#ifndef CONFIG_IDEDMA_IVB
652 if ((drive->id->hw_config & 0x6000) == 0) {
653#else /* !CONFIG_IDEDMA_IVB */
654 if (((drive->id->hw_config & 0x2000) == 0) ||
655 ((drive->id->hw_config & 0x4000) == 0)) {
656#endif /* CONFIG_IDEDMA_IVB */
657 printk("%s: Speed warnings UDMA 3/4/5 is not "
658 "functional.\n", drive->name);
659 return 1;
660 }
661 if (!HWIF(drive)->udma_four) {
662 printk("%s: Speed warnings UDMA 3/4/5 is not "
663 "functional.\n",
664 HWIF(drive)->name);
665 return 1;
666 }
667 }
668 return 0;
669}
670
671/*
672 * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER.
673 * 1 : Safe to update drive->id DMA registers.
674 * 0 : OOPs not allowed.
675 */
676int set_transfer (ide_drive_t *drive, ide_task_t *args)
677{
678 if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
679 (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) &&
680 (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) &&
681 (drive->id->dma_ultra ||
682 drive->id->dma_mword ||
683 drive->id->dma_1word))
684 return 1;
685
686 return 0;
687}
688
689#ifdef CONFIG_BLK_DEV_IDEDMA
690static u8 ide_auto_reduce_xfer (ide_drive_t *drive)
691{
692 if (!drive->crc_count)
693 return drive->current_speed;
694 drive->crc_count = 0;
695
696 switch(drive->current_speed) {
697 case XFER_UDMA_7: return XFER_UDMA_6;
698 case XFER_UDMA_6: return XFER_UDMA_5;
699 case XFER_UDMA_5: return XFER_UDMA_4;
700 case XFER_UDMA_4: return XFER_UDMA_3;
701 case XFER_UDMA_3: return XFER_UDMA_2;
702 case XFER_UDMA_2: return XFER_UDMA_1;
703 case XFER_UDMA_1: return XFER_UDMA_0;
704 /*
705 * OOPS we do not goto non Ultra DMA modes
706 * without iCRC's available we force
707 * the system to PIO and make the user
708 * invoke the ATA-1 ATA-2 DMA modes.
709 */
710 case XFER_UDMA_0:
711 default: return XFER_PIO_4;
712 }
713}
714#endif /* CONFIG_BLK_DEV_IDEDMA */
715
716/*
717 * Update the
718 */
719int ide_driveid_update (ide_drive_t *drive)
720{
721 ide_hwif_t *hwif = HWIF(drive);
722 struct hd_driveid *id;
723#if 0
724 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
725 if (!id)
726 return 0;
727
728 taskfile_lib_get_identify(drive, (char *)&id);
729
730 ide_fix_driveid(id);
731 if (id) {
732 drive->id->dma_ultra = id->dma_ultra;
733 drive->id->dma_mword = id->dma_mword;
734 drive->id->dma_1word = id->dma_1word;
735 /* anything more ? */
736 kfree(id);
737 }
738 return 1;
739#else
740 /*
741 * Re-read drive->id for possible DMA mode
742 * change (copied from ide-probe.c)
743 */
744 unsigned long timeout, flags;
745
746 SELECT_MASK(drive, 1);
747 if (IDE_CONTROL_REG)
748 hwif->OUTB(drive->ctl,IDE_CONTROL_REG);
749 msleep(50);
750 hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG);
751 timeout = jiffies + WAIT_WORSTCASE;
752 do {
753 if (time_after(jiffies, timeout)) {
754 SELECT_MASK(drive, 0);
755 return 0; /* drive timed-out */
756 }
757 msleep(50); /* give drive a breather */
758 } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT);
759 msleep(50); /* wait for IRQ and DRQ_STAT */
760 if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) {
761 SELECT_MASK(drive, 0);
762 printk("%s: CHECK for good STATUS\n", drive->name);
763 return 0;
764 }
765 local_irq_save(flags);
766 SELECT_MASK(drive, 0);
767 id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
768 if (!id) {
769 local_irq_restore(flags);
770 return 0;
771 }
772 ata_input_data(drive, id, SECTOR_WORDS);
773 (void) hwif->INB(IDE_STATUS_REG); /* clear drive IRQ */
774 local_irq_enable();
775 local_irq_restore(flags);
776 ide_fix_driveid(id);
777 if (id) {
778 drive->id->dma_ultra = id->dma_ultra;
779 drive->id->dma_mword = id->dma_mword;
780 drive->id->dma_1word = id->dma_1word;
781 /* anything more ? */
782 kfree(id);
783 }
784
785 return 1;
786#endif
787}
788
789/*
790 * Similar to ide_wait_stat(), except it never calls ide_error internally.
791 * This is a kludge to handle the new ide_config_drive_speed() function,
792 * and should not otherwise be used anywhere. Eventually, the tuneproc's
793 * should be updated to return ide_startstop_t, in which case we can get
794 * rid of this abomination again. :) -ml
795 *
796 * It is gone..........
797 *
798 * const char *msg == consider adding for verbose errors.
799 */
800int ide_config_drive_speed (ide_drive_t *drive, u8 speed)
801{
802 ide_hwif_t *hwif = HWIF(drive);
803 int i, error = 1;
804 u8 stat;
805
806// while (HWGROUP(drive)->busy)
807// msleep(50);
808
809#ifdef CONFIG_BLK_DEV_IDEDMA
810 if (hwif->ide_dma_check) /* check if host supports DMA */
811 hwif->ide_dma_host_off(drive);
812#endif
813
814 /*
815 * Don't use ide_wait_cmd here - it will
816 * attempt to set_geometry and recalibrate,
817 * but for some reason these don't work at
818 * this point (lost interrupt).
819 */
820 /*
821 * Select the drive, and issue the SETFEATURES command
822 */
823 disable_irq_nosync(hwif->irq);
824
825 /*
826 * FIXME: we race against the running IRQ here if
827 * this is called from non IRQ context. If we use
828 * disable_irq() we hang on the error path. Work
829 * is needed.
830 */
831
832 udelay(1);
833 SELECT_DRIVE(drive);
834 SELECT_MASK(drive, 0);
835 udelay(1);
836 if (IDE_CONTROL_REG)
837 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG);
838 hwif->OUTB(speed, IDE_NSECTOR_REG);
839 hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG);
840 hwif->OUTB(WIN_SETFEATURES, IDE_COMMAND_REG);
841 if ((IDE_CONTROL_REG) && (drive->quirk_list == 2))
842 hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
843 udelay(1);
844 /*
845 * Wait for drive to become non-BUSY
846 */
847 if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
848 unsigned long flags, timeout;
849 local_irq_set(flags);
850 timeout = jiffies + WAIT_CMD;
851 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
852 if (time_after(jiffies, timeout))
853 break;
854 }
855 local_irq_restore(flags);
856 }
857
858 /*
859 * Allow status to settle, then read it again.
860 * A few rare drives vastly violate the 400ns spec here,
861 * so we'll wait up to 10usec for a "good" status
862 * rather than expensively fail things immediately.
863 * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
864 */
865 for (i = 0; i < 10; i++) {
866 udelay(1);
867 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), DRIVE_READY, BUSY_STAT|DRQ_STAT|ERR_STAT)) {
868 error = 0;
869 break;
870 }
871 }
872
873 SELECT_MASK(drive, 0);
874
875 enable_irq(hwif->irq);
876
877 if (error) {
878 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
879 return error;
880 }
881
882 drive->id->dma_ultra &= ~0xFF00;
883 drive->id->dma_mword &= ~0x0F00;
884 drive->id->dma_1word &= ~0x0F00;
885
886#ifdef CONFIG_BLK_DEV_IDEDMA
887 if (speed >= XFER_SW_DMA_0)
888 hwif->ide_dma_host_on(drive);
889 else if (hwif->ide_dma_check) /* check if host supports DMA */
890 hwif->ide_dma_off_quietly(drive);
891#endif
892
893 switch(speed) {
894 case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break;
895 case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break;
896 case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break;
897 case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break;
898 case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break;
899 case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break;
900 case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break;
901 case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break;
902 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
903 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
904 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
905 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
906 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
907 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
908 default: break;
909 }
910 if (!drive->init_speed)
911 drive->init_speed = speed;
912 drive->current_speed = speed;
913 return error;
914}
915
916EXPORT_SYMBOL(ide_config_drive_speed);
917
918
919/*
920 * This should get invoked any time we exit the driver to
921 * wait for an interrupt response from a drive. handler() points
922 * at the appropriate code to handle the next interrupt, and a
923 * timer is started to prevent us from waiting forever in case
924 * something goes wrong (see the ide_timer_expiry() handler later on).
925 *
926 * See also ide_execute_command
927 */
928static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
929 unsigned int timeout, ide_expiry_t *expiry)
930{
931 ide_hwgroup_t *hwgroup = HWGROUP(drive);
932
933 if (hwgroup->handler != NULL) {
934 printk(KERN_CRIT "%s: ide_set_handler: handler not null; "
935 "old=%p, new=%p\n",
936 drive->name, hwgroup->handler, handler);
937 }
938 hwgroup->handler = handler;
939 hwgroup->expiry = expiry;
940 hwgroup->timer.expires = jiffies + timeout;
941 add_timer(&hwgroup->timer);
942}
943
944void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
945 unsigned int timeout, ide_expiry_t *expiry)
946{
947 unsigned long flags;
948 spin_lock_irqsave(&ide_lock, flags);
949 __ide_set_handler(drive, handler, timeout, expiry);
950 spin_unlock_irqrestore(&ide_lock, flags);
951}
952
953EXPORT_SYMBOL(ide_set_handler);
954
955/**
956 * ide_execute_command - execute an IDE command
957 * @drive: IDE drive to issue the command against
958 * @command: command byte to write
959 * @handler: handler for next phase
960 * @timeout: timeout for command
961 * @expiry: handler to run on timeout
962 *
963 * Helper function to issue an IDE command. This handles the
964 * atomicity requirements, command timing and ensures that the
965 * handler and IRQ setup do not race. All IDE command kick off
966 * should go via this function or do equivalent locking.
967 */
968
969void ide_execute_command(ide_drive_t *drive, task_ioreg_t cmd, ide_handler_t *handler, unsigned timeout, ide_expiry_t *expiry)
970{
971 unsigned long flags;
972 ide_hwgroup_t *hwgroup = HWGROUP(drive);
973 ide_hwif_t *hwif = HWIF(drive);
974
975 spin_lock_irqsave(&ide_lock, flags);
976
977 if(hwgroup->handler)
978 BUG();
979 hwgroup->handler = handler;
980 hwgroup->expiry = expiry;
981 hwgroup->timer.expires = jiffies + timeout;
982 add_timer(&hwgroup->timer);
983 hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG);
984 /* Drive takes 400nS to respond, we must avoid the IRQ being
985 serviced before that.
986
987 FIXME: we could skip this delay with care on non shared
988 devices
989 */
990 ndelay(400);
991 spin_unlock_irqrestore(&ide_lock, flags);
992}
993
994EXPORT_SYMBOL(ide_execute_command);
995
996
997/* needed below */
998static ide_startstop_t do_reset1 (ide_drive_t *, int);
999
1000/*
1001 * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
1002 * during an atapi drive reset operation. If the drive has not yet responded,
1003 * and we have not yet hit our maximum waiting time, then the timer is restarted
1004 * for another 50ms.
1005 */
1006static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
1007{
1008 ide_hwgroup_t *hwgroup = HWGROUP(drive);
1009 ide_hwif_t *hwif = HWIF(drive);
1010 u8 stat;
1011
1012 SELECT_DRIVE(drive);
1013 udelay (10);
1014
1015 if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
1016 printk("%s: ATAPI reset complete\n", drive->name);
1017 } else {
1018 if (time_before(jiffies, hwgroup->poll_timeout)) {
1019 if (HWGROUP(drive)->handler != NULL)
1020 BUG();
1021 ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1022 /* continue polling */
1023 return ide_started;
1024 }
1025 /* end of polling */
1026 hwgroup->polling = 0;
1027 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
1028 drive->name, stat);
1029 /* do it the old fashioned way */
1030 return do_reset1(drive, 1);
1031 }
1032 /* done polling */
1033 hwgroup->polling = 0;
1034 return ide_stopped;
1035}
1036
1037/*
1038 * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
1039 * during an ide reset operation. If the drives have not yet responded,
1040 * and we have not yet hit our maximum waiting time, then the timer is restarted
1041 * for another 50ms.
1042 */
1043static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
1044{
1045 ide_hwgroup_t *hwgroup = HWGROUP(drive);
1046 ide_hwif_t *hwif = HWIF(drive);
1047 u8 tmp;
1048
1049 if (hwif->reset_poll != NULL) {
1050 if (hwif->reset_poll(drive)) {
1051 printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
1052 hwif->name, drive->name);
1053 return ide_stopped;
1054 }
1055 }
1056
1057 if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
1058 if (time_before(jiffies, hwgroup->poll_timeout)) {
1059 if (HWGROUP(drive)->handler != NULL)
1060 BUG();
1061 ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1062 /* continue polling */
1063 return ide_started;
1064 }
1065 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1066 drive->failures++;
1067 } else {
1068 printk("%s: reset: ", hwif->name);
1069 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) {
1070 printk("success\n");
1071 drive->failures = 0;
1072 } else {
1073 drive->failures++;
1074 printk("master: ");
1075 switch (tmp & 0x7f) {
1076 case 1: printk("passed");
1077 break;
1078 case 2: printk("formatter device error");
1079 break;
1080 case 3: printk("sector buffer error");
1081 break;
1082 case 4: printk("ECC circuitry error");
1083 break;
1084 case 5: printk("controlling MPU error");
1085 break;
1086 default:printk("error (0x%02x?)", tmp);
1087 }
1088 if (tmp & 0x80)
1089 printk("; slave: failed");
1090 printk("\n");
1091 }
1092 }
1093 hwgroup->polling = 0; /* done polling */
1094 return ide_stopped;
1095}
1096
1097static void check_dma_crc(ide_drive_t *drive)
1098{
1099#ifdef CONFIG_BLK_DEV_IDEDMA
1100 if (drive->crc_count) {
1101 (void) HWIF(drive)->ide_dma_off_quietly(drive);
1102 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive));
1103 if (drive->current_speed >= XFER_SW_DMA_0)
1104 (void) HWIF(drive)->ide_dma_on(drive);
1105 } else
1106 (void)__ide_dma_off(drive);
1107#endif
1108}
1109
1110static void ide_disk_pre_reset(ide_drive_t *drive)
1111{
1112 int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1113
1114 drive->special.all = 0;
1115 drive->special.b.set_geometry = legacy;
1116 drive->special.b.recalibrate = legacy;
1117 if (OK_TO_RESET_CONTROLLER)
1118 drive->mult_count = 0;
1119 if (!drive->keep_settings && !drive->using_dma)
1120 drive->mult_req = 0;
1121 if (drive->mult_req != drive->mult_count)
1122 drive->special.b.set_multmode = 1;
1123}
1124
1125static void pre_reset(ide_drive_t *drive)
1126{
1127 if (drive->media == ide_disk)
1128 ide_disk_pre_reset(drive);
1129 else
1130 drive->post_reset = 1;
1131
1132 if (!drive->keep_settings) {
1133 if (drive->using_dma) {
1134 check_dma_crc(drive);
1135 } else {
1136 drive->unmask = 0;
1137 drive->io_32bit = 0;
1138 }
1139 return;
1140 }
1141 if (drive->using_dma)
1142 check_dma_crc(drive);
1143
1144 if (HWIF(drive)->pre_reset != NULL)
1145 HWIF(drive)->pre_reset(drive);
1146
1147}
1148
1149/*
1150 * do_reset1() attempts to recover a confused drive by resetting it.
1151 * Unfortunately, resetting a disk drive actually resets all devices on
1152 * the same interface, so it can really be thought of as resetting the
1153 * interface rather than resetting the drive.
1154 *
1155 * ATAPI devices have their own reset mechanism which allows them to be
1156 * individually reset without clobbering other devices on the same interface.
1157 *
1158 * Unfortunately, the IDE interface does not generate an interrupt to let
1159 * us know when the reset operation has finished, so we must poll for this.
1160 * Equally poor, though, is the fact that this may a very long time to complete,
1161 * (up to 30 seconds worstcase). So, instead of busy-waiting here for it,
1162 * we set a timer to poll at 50ms intervals.
1163 */
1164static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1165{
1166 unsigned int unit;
1167 unsigned long flags;
1168 ide_hwif_t *hwif;
1169 ide_hwgroup_t *hwgroup;
1170
1171 spin_lock_irqsave(&ide_lock, flags);
1172 hwif = HWIF(drive);
1173 hwgroup = HWGROUP(drive);
1174
1175 /* We must not reset with running handlers */
1176 if(hwgroup->handler != NULL)
1177 BUG();
1178
1179 /* For an ATAPI device, first try an ATAPI SRST. */
1180 if (drive->media != ide_disk && !do_not_try_atapi) {
1181 pre_reset(drive);
1182 SELECT_DRIVE(drive);
1183 udelay (20);
1184 hwif->OUTB(WIN_SRST, IDE_COMMAND_REG);
1185 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1186 hwgroup->polling = 1;
1187 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1188 spin_unlock_irqrestore(&ide_lock, flags);
1189 return ide_started;
1190 }
1191
1192 /*
1193 * First, reset any device state data we were maintaining
1194 * for any of the drives on this interface.
1195 */
1196 for (unit = 0; unit < MAX_DRIVES; ++unit)
1197 pre_reset(&hwif->drives[unit]);
1198
1199#if OK_TO_RESET_CONTROLLER
1200 if (!IDE_CONTROL_REG) {
1201 spin_unlock_irqrestore(&ide_lock, flags);
1202 return ide_stopped;
1203 }
1204
1205 /*
1206 * Note that we also set nIEN while resetting the device,
1207 * to mask unwanted interrupts from the interface during the reset.
1208 * However, due to the design of PC hardware, this will cause an
1209 * immediate interrupt due to the edge transition it produces.
1210 * This single interrupt gives us a "fast poll" for drives that
1211 * recover from reset very quickly, saving us the first 50ms wait time.
1212 */
1213 /* set SRST and nIEN */
1214 hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG);
1215 /* more than enough time */
1216 udelay(10);
1217 if (drive->quirk_list == 2) {
1218 /* clear SRST and nIEN */
1219 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG);
1220 } else {
1221 /* clear SRST, leave nIEN */
1222 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG);
1223 }
1224 /* more than enough time */
1225 udelay(10);
1226 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1227 hwgroup->polling = 1;
1228 __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1229
1230 /*
1231 * Some weird controller like resetting themselves to a strange
1232 * state when the disks are reset this way. At least, the Winbond
1233 * 553 documentation says that
1234 */
1235 if (hwif->resetproc != NULL) {
1236 hwif->resetproc(drive);
1237 }
1238
1239#endif /* OK_TO_RESET_CONTROLLER */
1240
1241 spin_unlock_irqrestore(&ide_lock, flags);
1242 return ide_started;
1243}
1244
1245/*
1246 * ide_do_reset() is the entry point to the drive/interface reset code.
1247 */
1248
1249ide_startstop_t ide_do_reset (ide_drive_t *drive)
1250{
1251 return do_reset1(drive, 0);
1252}
1253
1254EXPORT_SYMBOL(ide_do_reset);
1255
1256/*
1257 * ide_wait_not_busy() waits for the currently selected device on the hwif
1258 * to report a non-busy status, see comments in probe_hwif().
1259 */
1260int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1261{
1262 u8 stat = 0;
1263
1264 while(timeout--) {
1265 /*
1266 * Turn this into a schedule() sleep once I'm sure
1267 * about locking issues (2.5 work ?).
1268 */
1269 mdelay(1);
1270 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1271 if ((stat & BUSY_STAT) == 0)
1272 return 0;
1273 /*
1274 * Assume a value of 0xff means nothing is connected to
1275 * the interface and it doesn't implement the pull-down
1276 * resistor on D7.
1277 */
1278 if (stat == 0xff)
1279 return -ENODEV;
1280 }
1281 return -EBUSY;
1282}
1283
1284EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1285
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-17 03:40:44 -0500