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path: root/drivers/ide/ide-dma-sff.c
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Diffstat (limited to 'drivers/ide/ide-dma-sff.c')
-rw-r--r--drivers/ide/ide-dma-sff.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/ide/ide-dma-sff.c b/drivers/ide/ide-dma-sff.c
index 7bf28a9b6f65..b7eb810c7b8f 100644
--- a/drivers/ide/ide-dma-sff.c
+++ b/drivers/ide/ide-dma-sff.c
@@ -111,7 +111,7 @@ EXPORT_SYMBOL_GPL(ide_dma_host_set);
111 * May also be invoked from trm290.c 111 * May also be invoked from trm290.c
112 */ 112 */
113 113
114int ide_build_dmatable(ide_drive_t *drive, struct request *rq) 114int ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd)
115{ 115{
116 ide_hwif_t *hwif = drive->hwif; 116 ide_hwif_t *hwif = drive->hwif;
117 __le32 *table = (__le32 *)hwif->dmatable_cpu; 117 __le32 *table = (__le32 *)hwif->dmatable_cpu;
@@ -120,7 +120,7 @@ int ide_build_dmatable(ide_drive_t *drive, struct request *rq)
120 struct scatterlist *sg; 120 struct scatterlist *sg;
121 u8 is_trm290 = !!(hwif->host_flags & IDE_HFLAG_TRM290); 121 u8 is_trm290 = !!(hwif->host_flags & IDE_HFLAG_TRM290);
122 122
123 for_each_sg(hwif->sg_table, sg, hwif->cmd.sg_nents, i) { 123 for_each_sg(hwif->sg_table, sg, cmd->sg_nents, i) {
124 u32 cur_addr, cur_len, xcount, bcount; 124 u32 cur_addr, cur_len, xcount, bcount;
125 125
126 cur_addr = sg_dma_address(sg); 126 cur_addr = sg_dma_address(sg);
@@ -175,6 +175,7 @@ EXPORT_SYMBOL_GPL(ide_build_dmatable);
175/** 175/**
176 * ide_dma_setup - begin a DMA phase 176 * ide_dma_setup - begin a DMA phase
177 * @drive: target device 177 * @drive: target device
178 * @cmd: command
178 * 179 *
179 * Build an IDE DMA PRD (IDE speak for scatter gather table) 180 * Build an IDE DMA PRD (IDE speak for scatter gather table)
180 * and then set up the DMA transfer registers for a device 181 * and then set up the DMA transfer registers for a device
@@ -185,17 +186,16 @@ EXPORT_SYMBOL_GPL(ide_build_dmatable);
185 * is returned. 186 * is returned.
186 */ 187 */
187 188
188int ide_dma_setup(ide_drive_t *drive) 189int ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
189{ 190{
190 ide_hwif_t *hwif = drive->hwif; 191 ide_hwif_t *hwif = drive->hwif;
191 struct request *rq = hwif->rq;
192 unsigned int reading = rq_data_dir(rq) ? 0 : ATA_DMA_WR;
193 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; 192 u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
193 u8 rw = (cmd->tf_flags & IDE_TFLAG_WRITE) ? 0 : ATA_DMA_WR;
194 u8 dma_stat; 194 u8 dma_stat;
195 195
196 /* fall back to pio! */ 196 /* fall back to pio! */
197 if (!ide_build_dmatable(drive, rq)) { 197 if (ide_build_dmatable(drive, cmd) == 0) {
198 ide_map_sg(drive, rq); 198 ide_map_sg(drive, cmd);
199 return 1; 199 return 1;
200 } 200 }
201 201
@@ -208,9 +208,9 @@ int ide_dma_setup(ide_drive_t *drive)
208 208
209 /* specify r/w */ 209 /* specify r/w */
210 if (mmio) 210 if (mmio)
211 writeb(reading, (void __iomem *)(hwif->dma_base + ATA_DMA_CMD)); 211 writeb(rw, (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
212 else 212 else
213 outb(reading, hwif->dma_base + ATA_DMA_CMD); 213 outb(rw, hwif->dma_base + ATA_DMA_CMD);
214 214
215 /* read DMA status for INTR & ERROR flags */ 215 /* read DMA status for INTR & ERROR flags */
216 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif); 216 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);