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-rw-r--r--drivers/ide/hpt366.c65
1 files changed, 0 insertions, 65 deletions
diff --git a/drivers/ide/hpt366.c b/drivers/ide/hpt366.c
index 7ce68ef6b904..4d90ac2dbb1b 100644
--- a/drivers/ide/hpt366.c
+++ b/drivers/ide/hpt366.c
@@ -297,68 +297,6 @@ static u32 twenty_five_base_hpt36x[] = {
297 /* XFER_PIO_0 */ 0xc0d08585 297 /* XFER_PIO_0 */ 0xc0d08585
298}; 298};
299 299
300#if 0
301/* These are the timing tables from the HighPoint open source drivers... */
302static u32 thirty_three_base_hpt37x[] = {
303 /* XFER_UDMA_6 */ 0x12446231, /* 0x12646231 ?? */
304 /* XFER_UDMA_5 */ 0x12446231,
305 /* XFER_UDMA_4 */ 0x12446231,
306 /* XFER_UDMA_3 */ 0x126c6231,
307 /* XFER_UDMA_2 */ 0x12486231,
308 /* XFER_UDMA_1 */ 0x124c6233,
309 /* XFER_UDMA_0 */ 0x12506297,
310
311 /* XFER_MW_DMA_2 */ 0x22406c31,
312 /* XFER_MW_DMA_1 */ 0x22406c33,
313 /* XFER_MW_DMA_0 */ 0x22406c97,
314
315 /* XFER_PIO_4 */ 0x06414e31,
316 /* XFER_PIO_3 */ 0x06414e42,
317 /* XFER_PIO_2 */ 0x06414e53,
318 /* XFER_PIO_1 */ 0x06814e93,
319 /* XFER_PIO_0 */ 0x06814ea7
320};
321
322static u32 fifty_base_hpt37x[] = {
323 /* XFER_UDMA_6 */ 0x12848242,
324 /* XFER_UDMA_5 */ 0x12848242,
325 /* XFER_UDMA_4 */ 0x12ac8242,
326 /* XFER_UDMA_3 */ 0x128c8242,
327 /* XFER_UDMA_2 */ 0x120c8242,
328 /* XFER_UDMA_1 */ 0x12148254,
329 /* XFER_UDMA_0 */ 0x121882ea,
330
331 /* XFER_MW_DMA_2 */ 0x22808242,
332 /* XFER_MW_DMA_1 */ 0x22808254,
333 /* XFER_MW_DMA_0 */ 0x228082ea,
334
335 /* XFER_PIO_4 */ 0x0a81f442,
336 /* XFER_PIO_3 */ 0x0a81f443,
337 /* XFER_PIO_2 */ 0x0a81f454,
338 /* XFER_PIO_1 */ 0x0ac1f465,
339 /* XFER_PIO_0 */ 0x0ac1f48a
340};
341
342static u32 sixty_six_base_hpt37x[] = {
343 /* XFER_UDMA_6 */ 0x1c869c62,
344 /* XFER_UDMA_5 */ 0x1cae9c62, /* 0x1c8a9c62 */
345 /* XFER_UDMA_4 */ 0x1c8a9c62,
346 /* XFER_UDMA_3 */ 0x1c8e9c62,
347 /* XFER_UDMA_2 */ 0x1c929c62,
348 /* XFER_UDMA_1 */ 0x1c9a9c62,
349 /* XFER_UDMA_0 */ 0x1c829c62,
350
351 /* XFER_MW_DMA_2 */ 0x2c829c62,
352 /* XFER_MW_DMA_1 */ 0x2c829c66,
353 /* XFER_MW_DMA_0 */ 0x2c829d2e,
354
355 /* XFER_PIO_4 */ 0x0c829c62,
356 /* XFER_PIO_3 */ 0x0c829c84,
357 /* XFER_PIO_2 */ 0x0c829ca6,
358 /* XFER_PIO_1 */ 0x0d029d26,
359 /* XFER_PIO_0 */ 0x0d029d5e
360};
361#else
362/* 300/*
363 * The following are the new timing tables with PIO mode data/taskfile transfer 301 * The following are the new timing tables with PIO mode data/taskfile transfer
364 * overclocking fixed... 302 * overclocking fixed...
@@ -424,16 +362,13 @@ static u32 sixty_six_base_hpt37x[] = {
424 /* XFER_PIO_1 */ 0x0d02ff26, 362 /* XFER_PIO_1 */ 0x0d02ff26,
425 /* XFER_PIO_0 */ 0x0d42ff7f 363 /* XFER_PIO_0 */ 0x0d42ff7f
426}; 364};
427#endif
428 365
429#define HPT366_DEBUG_DRIVE_INFO 0
430#define HPT371_ALLOW_ATA133_6 1 366#define HPT371_ALLOW_ATA133_6 1
431#define HPT302_ALLOW_ATA133_6 1 367#define HPT302_ALLOW_ATA133_6 1
432#define HPT372_ALLOW_ATA133_6 1 368#define HPT372_ALLOW_ATA133_6 1
433#define HPT370_ALLOW_ATA100_5 0 369#define HPT370_ALLOW_ATA100_5 0
434#define HPT366_ALLOW_ATA66_4 1 370#define HPT366_ALLOW_ATA66_4 1
435#define HPT366_ALLOW_ATA66_3 1 371#define HPT366_ALLOW_ATA66_3 1
436#define HPT366_MAX_DEVS 8
437 372
438/* Supported ATA clock frequencies */ 373/* Supported ATA clock frequencies */
439enum ata_clock { 374enum ata_clock {