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Diffstat (limited to 'drivers/ide/hpt366.c')
-rw-r--r--drivers/ide/hpt366.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/ide/hpt366.c b/drivers/ide/hpt366.c
index a0eb87f59134..0feb66c720e1 100644
--- a/drivers/ide/hpt366.c
+++ b/drivers/ide/hpt366.c
@@ -3,7 +3,7 @@
3 * Portions Copyright (C) 2001 Sun Microsystems, Inc. 3 * Portions Copyright (C) 2001 Sun Microsystems, Inc.
4 * Portions Copyright (C) 2003 Red Hat Inc 4 * Portions Copyright (C) 2003 Red Hat Inc
5 * Portions Copyright (C) 2007 Bartlomiej Zolnierkiewicz 5 * Portions Copyright (C) 2007 Bartlomiej Zolnierkiewicz
6 * Portions Copyright (C) 2005-2008 MontaVista Software, Inc. 6 * Portions Copyright (C) 2005-2009 MontaVista Software, Inc.
7 * 7 *
8 * Thanks to HighPoint Technologies for their assistance, and hardware. 8 * Thanks to HighPoint Technologies for their assistance, and hardware.
9 * Special Thanks to Jon Burchmore in SanDiego for the deep pockets, his 9 * Special Thanks to Jon Burchmore in SanDiego for the deep pockets, his
@@ -114,6 +114,8 @@
114 * the register setting lists into the table indexed by the clock selected 114 * the register setting lists into the table indexed by the clock selected
115 * - set the correct hwif->ultra_mask for each individual chip 115 * - set the correct hwif->ultra_mask for each individual chip
116 * - add Ultra and MW DMA mode filtering for the HPT37[24] based SATA cards 116 * - add Ultra and MW DMA mode filtering for the HPT37[24] based SATA cards
117 * - stop resetting HPT370's state machine before each DMA transfer as that has
118 * caused more harm than good
117 * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com> 119 * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com>
118 */ 120 */
119 121
@@ -133,7 +135,7 @@
133#define DRV_NAME "hpt366" 135#define DRV_NAME "hpt366"
134 136
135/* various tuning parameters */ 137/* various tuning parameters */
136#define HPT_RESET_STATE_ENGINE 138#undef HPT_RESET_STATE_ENGINE
137#undef HPT_DELAY_INTERRUPT 139#undef HPT_DELAY_INTERRUPT
138 140
139static const char *quirk_drives[] = { 141static const char *quirk_drives[] = {
@@ -808,7 +810,7 @@ static void hpt370_irq_timeout(ide_drive_t *drive)
808 /* get DMA command mode */ 810 /* get DMA command mode */
809 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD); 811 dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
810 /* stop DMA */ 812 /* stop DMA */
811 outb(dma_cmd & ~0x1, hwif->dma_base + ATA_DMA_CMD); 813 outb(dma_cmd & ~ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD);
812 hpt370_clear_engine(drive); 814 hpt370_clear_engine(drive);
813} 815}
814 816
@@ -825,11 +827,11 @@ static int hpt370_dma_end(ide_drive_t *drive)
825 ide_hwif_t *hwif = drive->hwif; 827 ide_hwif_t *hwif = drive->hwif;
826 u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); 828 u8 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
827 829
828 if (dma_stat & 0x01) { 830 if (dma_stat & ATA_DMA_ACTIVE) {
829 /* wait a little */ 831 /* wait a little */
830 udelay(20); 832 udelay(20);
831 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); 833 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
832 if (dma_stat & 0x01) 834 if (dma_stat & ATA_DMA_ACTIVE)
833 hpt370_irq_timeout(drive); 835 hpt370_irq_timeout(drive);
834 } 836 }
835 return ide_dma_end(drive); 837 return ide_dma_end(drive);
@@ -851,7 +853,7 @@ static int hpt374_dma_test_irq(ide_drive_t *drive)
851 853
852 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS); 854 dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
853 /* return 1 if INTR asserted */ 855 /* return 1 if INTR asserted */
854 if (dma_stat & 4) 856 if (dma_stat & ATA_DMA_INTR)
855 return 1; 857 return 1;
856 858
857 return 0; 859 return 0;