diff options
Diffstat (limited to 'drivers/ide/cris/ide-cris.c')
-rw-r--r-- | drivers/ide/cris/ide-cris.c | 33 |
1 files changed, 22 insertions, 11 deletions
diff --git a/drivers/ide/cris/ide-cris.c b/drivers/ide/cris/ide-cris.c index 00587a8c2ba1..e79bf8f9b7db 100644 --- a/drivers/ide/cris/ide-cris.c +++ b/drivers/ide/cris/ide-cris.c | |||
@@ -753,6 +753,25 @@ static void cris_set_dma_mode(ide_drive_t *drive, const u8 speed) | |||
753 | cris_ide_set_speed(TYPE_DMA, 0, strobe, hold); | 753 | cris_ide_set_speed(TYPE_DMA, 0, strobe, hold); |
754 | } | 754 | } |
755 | 755 | ||
756 | static void __init cris_setup_ports(hw_regs_t *hw, unsigned long base) | ||
757 | { | ||
758 | int i; | ||
759 | |||
760 | memset(hw, 0, sizeof(*hw)); | ||
761 | |||
762 | for (i = 0; i <= 7; i++) | ||
763 | hw->io_ports[i] = base + cris_ide_reg_addr(i, 0, 1); | ||
764 | |||
765 | /* | ||
766 | * the IDE control register is at ATA address 6, | ||
767 | * with CS1 active instead of CS0 | ||
768 | */ | ||
769 | hw->io_ports[IDE_CONTROL_OFFSET] = base + cris_ide_reg_addr(6, 1, 0); | ||
770 | |||
771 | hw->irq = ide_default_irq(0); | ||
772 | hw->ack_intr = cris_ide_ack_intr; | ||
773 | } | ||
774 | |||
756 | static const struct ide_port_info cris_port_info __initdata = { | 775 | static const struct ide_port_info cris_port_info __initdata = { |
757 | .chipset = ide_etrax100, | 776 | .chipset = ide_etrax100, |
758 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | | 777 | .host_flags = IDE_HFLAG_NO_ATAPI_DMA | |
@@ -765,24 +784,16 @@ static const struct ide_port_info cris_port_info __initdata = { | |||
765 | static int __init init_e100_ide(void) | 784 | static int __init init_e100_ide(void) |
766 | { | 785 | { |
767 | hw_regs_t hw; | 786 | hw_regs_t hw; |
768 | int ide_offsets[IDE_NR_PORTS], h, i; | 787 | int h; |
769 | u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; | 788 | u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; |
770 | 789 | ||
771 | printk("ide: ETRAX FS built-in ATA DMA controller\n"); | 790 | printk("ide: ETRAX FS built-in ATA DMA controller\n"); |
772 | 791 | ||
773 | for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) | ||
774 | ide_offsets[i] = cris_ide_reg_addr(i, 0, 1); | ||
775 | |||
776 | /* the IDE control register is at ATA address 6, with CS1 active instead of CS0 */ | ||
777 | ide_offsets[IDE_CONTROL_OFFSET] = cris_ide_reg_addr(6, 1, 0); | ||
778 | |||
779 | for (h = 0; h < 4; h++) { | 792 | for (h = 0; h < 4; h++) { |
780 | ide_hwif_t *hwif = NULL; | 793 | ide_hwif_t *hwif = NULL; |
781 | 794 | ||
782 | ide_setup_ports(&hw, cris_ide_base_address(h), | 795 | cris_setup_ports(&hw, cris_ide_base_address(h)); |
783 | ide_offsets, | 796 | |
784 | 0, 0, cris_ide_ack_intr, | ||
785 | ide_default_irq(0)); | ||
786 | hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]); | 797 | hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]); |
787 | if (hwif == NULL) | 798 | if (hwif == NULL) |
788 | continue; | 799 | continue; |