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-rw-r--r--drivers/ide/arm/bast-ide.c25
-rw-r--r--drivers/ide/arm/icside.c69
-rw-r--r--drivers/ide/arm/ide_arm.c20
-rw-r--r--drivers/ide/arm/palm_bk3710.c64
-rw-r--r--drivers/ide/arm/rapide.c11
5 files changed, 116 insertions, 73 deletions
diff --git a/drivers/ide/arm/bast-ide.c b/drivers/ide/arm/bast-ide.c
index ec46c44b061c..713cef20622e 100644
--- a/drivers/ide/arm/bast-ide.c
+++ b/drivers/ide/arm/bast-ide.c
@@ -21,6 +21,8 @@
21#include <asm/arch/bast-map.h> 21#include <asm/arch/bast-map.h>
22#include <asm/arch/bast-irq.h> 22#include <asm/arch/bast-irq.h>
23 23
24#define DRV_NAME "bast-ide"
25
24static int __init bastide_register(unsigned int base, unsigned int aux, int irq) 26static int __init bastide_register(unsigned int base, unsigned int aux, int irq)
25{ 27{
26 ide_hwif_t *hwif; 28 ide_hwif_t *hwif;
@@ -33,27 +35,23 @@ static int __init bastide_register(unsigned int base, unsigned int aux, int irq)
33 base += BAST_IDE_CS; 35 base += BAST_IDE_CS;
34 aux += BAST_IDE_CS; 36 aux += BAST_IDE_CS;
35 37
36 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { 38 for (i = 0; i <= 7; i++) {
37 hw.io_ports[i] = (unsigned long)base; 39 hw.io_ports_array[i] = (unsigned long)base;
38 base += 0x20; 40 base += 0x20;
39 } 41 }
40 42
41 hw.io_ports[IDE_CONTROL_OFFSET] = aux + (6 * 0x20); 43 hw.io_ports.ctl_addr = aux + (6 * 0x20);
42 hw.irq = irq; 44 hw.irq = irq;
43 45
44 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]); 46 hwif = ide_find_port();
45 if (hwif == NULL) 47 if (hwif == NULL)
46 goto out; 48 goto out;
47 49
48 i = hwif->index; 50 i = hwif->index;
49 51
50 if (hwif->present) 52 ide_init_port_data(hwif, i);
51 ide_unregister(i);
52 else
53 ide_init_port_data(hwif, i);
54
55 ide_init_port_hw(hwif, &hw); 53 ide_init_port_hw(hwif, &hw);
56 hwif->quirkproc = NULL; 54 hwif->port_ops = NULL;
57 55
58 idx[0] = i; 56 idx[0] = i;
59 57
@@ -64,6 +62,8 @@ out:
64 62
65static int __init bastide_init(void) 63static int __init bastide_init(void)
66{ 64{
65 unsigned long base = BAST_VA_IDEPRI + BAST_IDE_CS;
66
67 /* we can treat the VR1000 and the BAST the same */ 67 /* we can treat the VR1000 and the BAST the same */
68 68
69 if (!(machine_is_bast() || machine_is_vr1000())) 69 if (!(machine_is_bast() || machine_is_vr1000()))
@@ -71,6 +71,11 @@ static int __init bastide_init(void)
71 71
72 printk("BAST: IDE driver, (c) 2003-2004 Simtec Electronics\n"); 72 printk("BAST: IDE driver, (c) 2003-2004 Simtec Electronics\n");
73 73
74 if (!request_mem_region(base, 0x400000, DRV_NAME)) {
75 printk(KERN_ERR "%s: resources busy\n", DRV_NAME);
76 return -EBUSY;
77 }
78
74 bastide_register(BAST_VA_IDEPRI, BAST_VA_IDEPRIAUX, IRQ_IDE0); 79 bastide_register(BAST_VA_IDEPRI, BAST_VA_IDEPRIAUX, IRQ_IDE0);
75 bastide_register(BAST_VA_IDESEC, BAST_VA_IDESECAUX, IRQ_IDE1); 80 bastide_register(BAST_VA_IDESEC, BAST_VA_IDESECAUX, IRQ_IDE1);
76 81
diff --git a/drivers/ide/arm/icside.c b/drivers/ide/arm/icside.c
index e816b0ffcfe6..124445c20921 100644
--- a/drivers/ide/arm/icside.c
+++ b/drivers/ide/arm/icside.c
@@ -191,6 +191,10 @@ static void icside_maskproc(ide_drive_t *drive, int mask)
191 local_irq_restore(flags); 191 local_irq_restore(flags);
192} 192}
193 193
194static const struct ide_port_ops icside_v6_no_dma_port_ops = {
195 .maskproc = icside_maskproc,
196};
197
194#ifdef CONFIG_BLK_DEV_IDEDMA_ICS 198#ifdef CONFIG_BLK_DEV_IDEDMA_ICS
195/* 199/*
196 * SG-DMA support. 200 * SG-DMA support.
@@ -266,6 +270,11 @@ static void icside_set_dma_mode(ide_drive_t *drive, const u8 xfer_mode)
266 ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data); 270 ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data);
267} 271}
268 272
273static const struct ide_port_ops icside_v6_port_ops = {
274 .set_dma_mode = icside_set_dma_mode,
275 .maskproc = icside_maskproc,
276};
277
269static void icside_dma_host_set(ide_drive_t *drive, int on) 278static void icside_dma_host_set(ide_drive_t *drive, int on)
270{ 279{
271} 280}
@@ -375,32 +384,40 @@ static void icside_dma_lost_irq(ide_drive_t *drive)
375 printk(KERN_ERR "%s: IRQ lost\n", drive->name); 384 printk(KERN_ERR "%s: IRQ lost\n", drive->name);
376} 385}
377 386
378static void icside_dma_init(ide_hwif_t *hwif) 387static int icside_dma_init(ide_hwif_t *hwif, const struct ide_port_info *d)
379{ 388{
380 hwif->dmatable_cpu = NULL; 389 hwif->dmatable_cpu = NULL;
381 hwif->dmatable_dma = 0; 390 hwif->dmatable_dma = 0;
382 hwif->set_dma_mode = icside_set_dma_mode; 391
383 392 return 0;
384 hwif->dma_host_set = icside_dma_host_set;
385 hwif->dma_setup = icside_dma_setup;
386 hwif->dma_exec_cmd = icside_dma_exec_cmd;
387 hwif->dma_start = icside_dma_start;
388 hwif->ide_dma_end = icside_dma_end;
389 hwif->ide_dma_test_irq = icside_dma_test_irq;
390 hwif->dma_timeout = icside_dma_timeout;
391 hwif->dma_lost_irq = icside_dma_lost_irq;
392} 393}
394
395static const struct ide_dma_ops icside_v6_dma_ops = {
396 .dma_host_set = icside_dma_host_set,
397 .dma_setup = icside_dma_setup,
398 .dma_exec_cmd = icside_dma_exec_cmd,
399 .dma_start = icside_dma_start,
400 .dma_end = icside_dma_end,
401 .dma_test_irq = icside_dma_test_irq,
402 .dma_timeout = icside_dma_timeout,
403 .dma_lost_irq = icside_dma_lost_irq,
404};
393#else 405#else
394#define icside_dma_init(hwif) (0) 406#define icside_v6_dma_ops NULL
395#endif 407#endif
396 408
409static int icside_dma_off_init(ide_hwif_t *hwif, const struct ide_port_info *d)
410{
411 return -EOPNOTSUPP;
412}
413
397static ide_hwif_t * 414static ide_hwif_t *
398icside_setup(void __iomem *base, struct cardinfo *info, struct expansion_card *ec) 415icside_setup(void __iomem *base, struct cardinfo *info, struct expansion_card *ec)
399{ 416{
400 unsigned long port = (unsigned long)base + info->dataoffset; 417 unsigned long port = (unsigned long)base + info->dataoffset;
401 ide_hwif_t *hwif; 418 ide_hwif_t *hwif;
402 419
403 hwif = ide_find_port(port); 420 hwif = ide_find_port();
404 if (hwif) { 421 if (hwif) {
405 int i; 422 int i;
406 423
@@ -408,15 +425,14 @@ icside_setup(void __iomem *base, struct cardinfo *info, struct expansion_card *e
408 * Ensure we're using MMIO 425 * Ensure we're using MMIO
409 */ 426 */
410 default_hwif_mmiops(hwif); 427 default_hwif_mmiops(hwif);
411 hwif->mmio = 1;
412 428
413 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { 429 for (i = 0; i <= 7; i++) {
414 hwif->io_ports[i] = port; 430 hwif->io_ports_array[i] = port;
415 port += 1 << info->stepping; 431 port += 1 << info->stepping;
416 } 432 }
417 hwif->io_ports[IDE_CONTROL_OFFSET] = (unsigned long)base + info->ctrloffset; 433 hwif->io_ports.ctl_addr =
434 (unsigned long)base + info->ctrloffset;
418 hwif->irq = ec->irq; 435 hwif->irq = ec->irq;
419 hwif->noprobe = 0;
420 hwif->chipset = ide_acorn; 436 hwif->chipset = ide_acorn;
421 hwif->gendev.parent = &ec->dev; 437 hwif->gendev.parent = &ec->dev;
422 hwif->dev = &ec->dev; 438 hwif->dev = &ec->dev;
@@ -462,9 +478,10 @@ icside_register_v5(struct icside_state *state, struct expansion_card *ec)
462} 478}
463 479
464static const struct ide_port_info icside_v6_port_info __initdata = { 480static const struct ide_port_info icside_v6_port_info __initdata = {
465 .host_flags = IDE_HFLAG_SERIALIZE | 481 .init_dma = icside_dma_off_init,
466 IDE_HFLAG_NO_DMA | /* no SFF-style DMA */ 482 .port_ops = &icside_v6_no_dma_port_ops,
467 IDE_HFLAG_NO_AUTOTUNE, 483 .dma_ops = &icside_v6_dma_ops,
484 .host_flags = IDE_HFLAG_SERIALIZE,
468 .mwdma_mask = ATA_MWDMA2, 485 .mwdma_mask = ATA_MWDMA2,
469 .swdma_mask = ATA_SWDMA2, 486 .swdma_mask = ATA_SWDMA2,
470}; 487};
@@ -526,21 +543,19 @@ icside_register_v6(struct icside_state *state, struct expansion_card *ec)
526 state->hwif[0] = hwif; 543 state->hwif[0] = hwif;
527 state->hwif[1] = mate; 544 state->hwif[1] = mate;
528 545
529 hwif->maskproc = icside_maskproc;
530 hwif->hwif_data = state; 546 hwif->hwif_data = state;
531 hwif->config_data = (unsigned long)ioc_base; 547 hwif->config_data = (unsigned long)ioc_base;
532 hwif->select_data = sel; 548 hwif->select_data = sel;
533 549
534 mate->maskproc = icside_maskproc;
535 mate->hwif_data = state; 550 mate->hwif_data = state;
536 mate->config_data = (unsigned long)ioc_base; 551 mate->config_data = (unsigned long)ioc_base;
537 mate->select_data = sel | 1; 552 mate->select_data = sel | 1;
538 553
539 if (ec->dma != NO_DMA && !request_dma(ec->dma, hwif->name)) { 554 if (ec->dma != NO_DMA && !request_dma(ec->dma, hwif->name)) {
540 icside_dma_init(hwif); 555 d.init_dma = icside_dma_init;
541 icside_dma_init(mate); 556 d.port_ops = &icside_v6_port_ops;
542 } else 557 d.dma_ops = NULL;
543 d.mwdma_mask = d.swdma_mask = 0; 558 }
544 559
545 idx[0] = hwif->index; 560 idx[0] = hwif->index;
546 idx[1] = mate->index; 561 idx[1] = mate->index;
diff --git a/drivers/ide/arm/ide_arm.c b/drivers/ide/arm/ide_arm.c
index be9ff7334c52..4263ffd4ab20 100644
--- a/drivers/ide/arm/ide_arm.c
+++ b/drivers/ide/arm/ide_arm.c
@@ -14,6 +14,8 @@
14#include <asm/mach-types.h> 14#include <asm/mach-types.h>
15#include <asm/irq.h> 15#include <asm/irq.h>
16 16
17#define DRV_NAME "ide_arm"
18
17#ifdef CONFIG_ARCH_CLPS7500 19#ifdef CONFIG_ARCH_CLPS7500
18# include <asm/arch/hardware.h> 20# include <asm/arch/hardware.h>
19# 21#
@@ -28,13 +30,27 @@ static int __init ide_arm_init(void)
28{ 30{
29 ide_hwif_t *hwif; 31 ide_hwif_t *hwif;
30 hw_regs_t hw; 32 hw_regs_t hw;
33 unsigned long base = IDE_ARM_IO, ctl = IDE_ARM_IO + 0x206;
31 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; 34 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
32 35
36 if (!request_region(base, 8, DRV_NAME)) {
37 printk(KERN_ERR "%s: I/O resource 0x%lX-0x%lX not free.\n",
38 DRV_NAME, base, base + 7);
39 return -EBUSY;
40 }
41
42 if (!request_region(ctl, 1, DRV_NAME)) {
43 printk(KERN_ERR "%s: I/O resource 0x%lX not free.\n",
44 DRV_NAME, ctl);
45 release_region(base, 8);
46 return -EBUSY;
47 }
48
33 memset(&hw, 0, sizeof(hw)); 49 memset(&hw, 0, sizeof(hw));
34 ide_std_init_ports(&hw, IDE_ARM_IO, IDE_ARM_IO + 0x206); 50 ide_std_init_ports(&hw, base, ctl);
35 hw.irq = IDE_ARM_IRQ; 51 hw.irq = IDE_ARM_IRQ;
36 52
37 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]); 53 hwif = ide_find_port();
38 if (hwif) { 54 if (hwif) {
39 ide_init_port_hw(hwif, &hw); 55 ide_init_port_hw(hwif, &hw);
40 idx[0] = hwif->index; 56 idx[0] = hwif->index;
diff --git a/drivers/ide/arm/palm_bk3710.c b/drivers/ide/arm/palm_bk3710.c
index 420fcb78a7cd..aaf32541622d 100644
--- a/drivers/ide/arm/palm_bk3710.c
+++ b/drivers/ide/arm/palm_bk3710.c
@@ -96,11 +96,11 @@ static void palm_bk3710_setudmamode(void __iomem *base, unsigned int dev,
96 u16 val16; 96 u16 val16;
97 97
98 /* DMA Data Setup */ 98 /* DMA Data Setup */
99 t0 = (palm_bk3710_udmatimings[mode].cycletime + ide_palm_clk - 1) 99 t0 = DIV_ROUND_UP(palm_bk3710_udmatimings[mode].cycletime,
100 / ide_palm_clk - 1; 100 ide_palm_clk) - 1;
101 tenv = (20 + ide_palm_clk - 1) / ide_palm_clk - 1; 101 tenv = DIV_ROUND_UP(20, ide_palm_clk) - 1;
102 trp = (palm_bk3710_udmatimings[mode].rptime + ide_palm_clk - 1) 102 trp = DIV_ROUND_UP(palm_bk3710_udmatimings[mode].rptime,
103 / ide_palm_clk - 1; 103 ide_palm_clk) - 1;
104 104
105 /* udmatim Register */ 105 /* udmatim Register */
106 val16 = readw(base + BK3710_UDMATIM) & (dev ? 0xFF0F : 0xFFF0); 106 val16 = readw(base + BK3710_UDMATIM) & (dev ? 0xFF0F : 0xFFF0);
@@ -141,8 +141,8 @@ static void palm_bk3710_setdmamode(void __iomem *base, unsigned int dev,
141 cycletime = max_t(int, t->cycle, min_cycle); 141 cycletime = max_t(int, t->cycle, min_cycle);
142 142
143 /* DMA Data Setup */ 143 /* DMA Data Setup */
144 t0 = (cycletime + ide_palm_clk - 1) / ide_palm_clk; 144 t0 = DIV_ROUND_UP(cycletime, ide_palm_clk);
145 td = (t->active + ide_palm_clk - 1) / ide_palm_clk; 145 td = DIV_ROUND_UP(t->active, ide_palm_clk);
146 tkw = t0 - td - 1; 146 tkw = t0 - td - 1;
147 td -= 1; 147 td -= 1;
148 148
@@ -168,9 +168,9 @@ static void palm_bk3710_setpiomode(void __iomem *base, ide_drive_t *mate,
168 struct ide_timing *t; 168 struct ide_timing *t;
169 169
170 /* PIO Data Setup */ 170 /* PIO Data Setup */
171 t0 = (cycletime + ide_palm_clk - 1) / ide_palm_clk; 171 t0 = DIV_ROUND_UP(cycletime, ide_palm_clk);
172 t2 = (ide_timing_find_mode(XFER_PIO_0 + mode)->active + 172 t2 = DIV_ROUND_UP(ide_timing_find_mode(XFER_PIO_0 + mode)->active,
173 ide_palm_clk - 1) / ide_palm_clk; 173 ide_palm_clk);
174 174
175 t2i = t0 - t2 - 1; 175 t2i = t0 - t2 - 1;
176 t2 -= 1; 176 t2 -= 1;
@@ -192,8 +192,8 @@ static void palm_bk3710_setpiomode(void __iomem *base, ide_drive_t *mate,
192 192
193 /* TASKFILE Setup */ 193 /* TASKFILE Setup */
194 t = ide_timing_find_mode(XFER_PIO_0 + mode); 194 t = ide_timing_find_mode(XFER_PIO_0 + mode);
195 t0 = (t->cyc8b + ide_palm_clk - 1) / ide_palm_clk; 195 t0 = DIV_ROUND_UP(t->cyc8b, ide_palm_clk);
196 t2 = (t->act8b + ide_palm_clk - 1) / ide_palm_clk; 196 t2 = DIV_ROUND_UP(t->act8b, ide_palm_clk);
197 197
198 t2i = t0 - t2 - 1; 198 t2i = t0 - t2 - 1;
199 t2 -= 1; 199 t2 -= 1;
@@ -317,17 +317,31 @@ static u8 __devinit palm_bk3710_cable_detect(ide_hwif_t *hwif)
317 return ATA_CBL_PATA80; 317 return ATA_CBL_PATA80;
318} 318}
319 319
320static void __devinit palm_bk3710_init_hwif(ide_hwif_t *hwif) 320static int __devinit palm_bk3710_init_dma(ide_hwif_t *hwif,
321 const struct ide_port_info *d)
321{ 322{
322 hwif->set_pio_mode = palm_bk3710_set_pio_mode; 323 unsigned long base =
323 hwif->set_dma_mode = palm_bk3710_set_dma_mode; 324 hwif->io_ports.data_addr - IDE_PALM_ATA_PRI_REG_OFFSET;
324 325
325 hwif->cable_detect = palm_bk3710_cable_detect; 326 printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name);
327
328 if (ide_allocate_dma_engine(hwif))
329 return -1;
330
331 ide_setup_dma(hwif, base);
332
333 return 0;
326} 334}
327 335
336static const struct ide_port_ops palm_bk3710_ports_ops = {
337 .set_pio_mode = palm_bk3710_set_pio_mode,
338 .set_dma_mode = palm_bk3710_set_dma_mode,
339 .cable_detect = palm_bk3710_cable_detect,
340};
341
328static const struct ide_port_info __devinitdata palm_bk3710_port_info = { 342static const struct ide_port_info __devinitdata palm_bk3710_port_info = {
329 .init_hwif = palm_bk3710_init_hwif, 343 .init_dma = palm_bk3710_init_dma,
330 .host_flags = IDE_HFLAG_NO_DMA, /* hack (no PCI) */ 344 .port_ops = &palm_bk3710_ports_ops,
331 .pio_mask = ATA_PIO4, 345 .pio_mask = ATA_PIO4,
332 .udma_mask = ATA_UDMA4, /* (input clk 99MHz) */ 346 .udma_mask = ATA_UDMA4, /* (input clk 99MHz) */
333 .mwdma_mask = ATA_MWDMA2, 347 .mwdma_mask = ATA_MWDMA2,
@@ -372,30 +386,24 @@ static int __devinit palm_bk3710_probe(struct platform_device *pdev)
372 386
373 pribase = mem->start + IDE_PALM_ATA_PRI_REG_OFFSET; 387 pribase = mem->start + IDE_PALM_ATA_PRI_REG_OFFSET;
374 for (i = 0; i < IDE_NR_PORTS - 2; i++) 388 for (i = 0; i < IDE_NR_PORTS - 2; i++)
375 hw.io_ports[i] = pribase + i; 389 hw.io_ports_array[i] = pribase + i;
376 hw.io_ports[IDE_CONTROL_OFFSET] = mem->start + 390 hw.io_ports.ctl_addr = mem->start +
377 IDE_PALM_ATA_PRI_CTL_OFFSET; 391 IDE_PALM_ATA_PRI_CTL_OFFSET;
378 hw.irq = irq->start; 392 hw.irq = irq->start;
379 hw.chipset = ide_palm3710; 393 hw.chipset = ide_palm3710;
380 394
381 hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]); 395 hwif = ide_find_port();
382 if (hwif == NULL) 396 if (hwif == NULL)
383 goto out; 397 goto out;
384 398
385 i = hwif->index; 399 i = hwif->index;
386 400
387 if (hwif->present) 401 ide_init_port_data(hwif, i);
388 ide_unregister(i);
389 else
390 ide_init_port_data(hwif, i);
391
392 ide_init_port_hw(hwif, &hw); 402 ide_init_port_hw(hwif, &hw);
393 403
394 hwif->mmio = 1; 404 hwif->mmio = 1;
395 default_hwif_mmiops(hwif); 405 default_hwif_mmiops(hwif);
396 406
397 ide_setup_dma(hwif, mem->start);
398
399 idx[0] = i; 407 idx[0] = i;
400 408
401 ide_device_add(idx, &palm_bk3710_port_info); 409 ide_device_add(idx, &palm_bk3710_port_info);
diff --git a/drivers/ide/arm/rapide.c b/drivers/ide/arm/rapide.c
index b30adcf321c3..babc1a5e128d 100644
--- a/drivers/ide/arm/rapide.c
+++ b/drivers/ide/arm/rapide.c
@@ -17,11 +17,11 @@ static void rapide_setup_ports(hw_regs_t *hw, void __iomem *base,
17 unsigned long port = (unsigned long)base; 17 unsigned long port = (unsigned long)base;
18 int i; 18 int i;
19 19
20 for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) { 20 for (i = 0; i <= 7; i++) {
21 hw->io_ports[i] = port; 21 hw->io_ports_array[i] = port;
22 port += sz; 22 port += sz;
23 } 23 }
24 hw->io_ports[IDE_CONTROL_OFFSET] = (unsigned long)ctrl; 24 hw->io_ports.ctl_addr = (unsigned long)ctrl;
25 hw->irq = irq; 25 hw->irq = irq;
26} 26}
27 27
@@ -44,7 +44,7 @@ rapide_probe(struct expansion_card *ec, const struct ecard_id *id)
44 goto release; 44 goto release;
45 } 45 }
46 46
47 hwif = ide_find_port((unsigned long)base); 47 hwif = ide_find_port();
48 if (hwif) { 48 if (hwif) {
49 memset(&hw, 0, sizeof(hw)); 49 memset(&hw, 0, sizeof(hw));
50 rapide_setup_ports(&hw, base, base + 0x818, 1 << 6, ec->irq); 50 rapide_setup_ports(&hw, base, base + 0x818, 1 << 6, ec->irq);
@@ -53,7 +53,6 @@ rapide_probe(struct expansion_card *ec, const struct ecard_id *id)
53 53
54 ide_init_port_hw(hwif, &hw); 54 ide_init_port_hw(hwif, &hw);
55 55
56 hwif->mmio = 1;
57 default_hwif_mmiops(hwif); 56 default_hwif_mmiops(hwif);
58 57
59 idx[0] = hwif->index; 58 idx[0] = hwif->index;
@@ -76,7 +75,7 @@ static void __devexit rapide_remove(struct expansion_card *ec)
76 75
77 ecard_set_drvdata(ec, NULL); 76 ecard_set_drvdata(ec, NULL);
78 77
79 ide_unregister(hwif->index); 78 ide_unregister(hwif);
80 79
81 ecard_release_resources(ec); 80 ecard_release_resources(ec);
82} 81}