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-rw-r--r--drivers/i2c/busses/Kconfig47
-rw-r--r--drivers/i2c/busses/Makefile5
-rw-r--r--drivers/i2c/busses/i2c-cpm.c9
-rw-r--r--drivers/i2c/busses/i2c-diolan-u2c.c535
-rw-r--r--drivers/i2c/busses/i2c-eg20t.c1
-rw-r--r--drivers/i2c/busses/i2c-ibm_iic.c9
-rw-r--r--drivers/i2c/busses/i2c-mpc.c22
-rw-r--r--drivers/i2c/busses/i2c-mxs.c412
-rw-r--r--drivers/i2c/busses/i2c-ocores.c16
-rw-r--r--drivers/i2c/busses/i2c-omap.c4
-rw-r--r--drivers/i2c/busses/i2c-puv3.c306
-rw-r--r--drivers/i2c/busses/i2c-pxa-pci.c176
-rw-r--r--drivers/i2c/busses/i2c-pxa.c116
-rw-r--r--drivers/i2c/busses/i2c-tegra.c700
-rw-r--r--drivers/i2c/i2c-core.c2
15 files changed, 2291 insertions, 69 deletions
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 5b592dfcbd78..2a44a2ff2c5c 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -433,7 +433,7 @@ config I2C_IXP2000
433 433
434config I2C_MPC 434config I2C_MPC
435 tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx" 435 tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx"
436 depends on PPC32 436 depends on PPC
437 help 437 help
438 If you say yes to this option, support will be included for the 438 If you say yes to this option, support will be included for the
439 built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx, 439 built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx,
@@ -452,6 +452,16 @@ config I2C_MV64XXX
452 This driver can also be built as a module. If so, the module 452 This driver can also be built as a module. If so, the module
453 will be called i2c-mv64xxx. 453 will be called i2c-mv64xxx.
454 454
455config I2C_MXS
456 tristate "Freescale i.MX28 I2C interface"
457 depends on SOC_IMX28
458 help
459 Say Y here if you want to use the I2C bus controller on
460 the Freescale i.MX28 processors.
461
462 This driver can also be built as a module. If so, the module
463 will be called i2c-mxs.
464
455config I2C_NOMADIK 465config I2C_NOMADIK
456 tristate "ST-Ericsson Nomadik/Ux500 I2C Controller" 466 tristate "ST-Ericsson Nomadik/Ux500 I2C Controller"
457 depends on PLAT_NOMADIK 467 depends on PLAT_NOMADIK
@@ -523,17 +533,31 @@ config I2C_PNX
523 This driver can also be built as a module. If so, the module 533 This driver can also be built as a module. If so, the module
524 will be called i2c-pnx. 534 will be called i2c-pnx.
525 535
536config I2C_PUV3
537 tristate "PKUnity v3 I2C bus support"
538 depends on UNICORE32 && ARCH_PUV3
539 select I2C_ALGOBIT
540 help
541 This driver supports the I2C IP inside the PKUnity-v3 SoC.
542 This I2C bus controller is under AMBA/AXI bus.
543
544 This driver can also be built as a module. If so, the module
545 will be called i2c-puv3.
546
526config I2C_PXA 547config I2C_PXA
527 tristate "Intel PXA2XX I2C adapter" 548 tristate "Intel PXA2XX I2C adapter"
528 depends on ARCH_PXA || ARCH_MMP 549 depends on ARCH_PXA || ARCH_MMP || (X86_32 && PCI && OF)
529 help 550 help
530 If you have devices in the PXA I2C bus, say yes to this option. 551 If you have devices in the PXA I2C bus, say yes to this option.
531 This driver can also be built as a module. If so, the module 552 This driver can also be built as a module. If so, the module
532 will be called i2c-pxa. 553 will be called i2c-pxa.
533 554
555config I2C_PXA_PCI
556 def_bool I2C_PXA && X86_32 && PCI && OF
557
534config I2C_PXA_SLAVE 558config I2C_PXA_SLAVE
535 bool "Intel PXA2XX I2C Slave comms support" 559 bool "Intel PXA2XX I2C Slave comms support"
536 depends on I2C_PXA 560 depends on I2C_PXA && !X86_32
537 help 561 help
538 Support I2C slave mode communications on the PXA I2C bus. This 562 Support I2C slave mode communications on the PXA I2C bus. This
539 is necessary for systems where the PXA may be a target on the 563 is necessary for systems where the PXA may be a target on the
@@ -607,6 +631,13 @@ config I2C_STU300
607 This driver can also be built as a module. If so, the module 631 This driver can also be built as a module. If so, the module
608 will be called i2c-stu300. 632 will be called i2c-stu300.
609 633
634config I2C_TEGRA
635 tristate "NVIDIA Tegra internal I2C controller"
636 depends on ARCH_TEGRA
637 help
638 If you say yes to this option, support will be included for the
639 I2C controller embedded in NVIDIA Tegra SOCs
640
610config I2C_VERSATILE 641config I2C_VERSATILE
611 tristate "ARM Versatile/Realview I2C bus support" 642 tristate "ARM Versatile/Realview I2C bus support"
612 depends on ARCH_VERSATILE || ARCH_REALVIEW || ARCH_VEXPRESS 643 depends on ARCH_VERSATILE || ARCH_REALVIEW || ARCH_VEXPRESS
@@ -651,6 +682,16 @@ config I2C_EG20T
651 682
652comment "External I2C/SMBus adapter drivers" 683comment "External I2C/SMBus adapter drivers"
653 684
685config I2C_DIOLAN_U2C
686 tristate "Diolan U2C-12 USB adapter"
687 depends on USB
688 help
689 If you say yes to this option, support will be included for Diolan
690 U2C-12, a USB to I2C interface.
691
692 This driver can also be built as a module. If so, the module
693 will be called i2c-diolan-u2c.
694
654config I2C_PARPORT 695config I2C_PARPORT
655 tristate "Parallel port adapter" 696 tristate "Parallel port adapter"
656 depends on PARPORT 697 depends on PARPORT
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 9d2d0ec7fb23..e6cf294d3729 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
43obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o 43obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
44obj-$(CONFIG_I2C_MPC) += i2c-mpc.o 44obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
45obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o 45obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o
46obj-$(CONFIG_I2C_MXS) += i2c-mxs.o
46obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o 47obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o
47obj-$(CONFIG_I2C_NUC900) += i2c-nuc900.o 48obj-$(CONFIG_I2C_NUC900) += i2c-nuc900.o
48obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o 49obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o
@@ -51,19 +52,23 @@ obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o
51obj-$(CONFIG_I2C_PCA_PLATFORM) += i2c-pca-platform.o 52obj-$(CONFIG_I2C_PCA_PLATFORM) += i2c-pca-platform.o
52obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o 53obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o
53obj-$(CONFIG_I2C_PNX) += i2c-pnx.o 54obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
55obj-$(CONFIG_I2C_PUV3) += i2c-puv3.o
54obj-$(CONFIG_I2C_PXA) += i2c-pxa.o 56obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
57obj-$(CONFIG_I2C_PXA_PCI) += i2c-pxa-pci.o
55obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o 58obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o
56obj-$(CONFIG_I2C_S6000) += i2c-s6000.o 59obj-$(CONFIG_I2C_S6000) += i2c-s6000.o
57obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o 60obj-$(CONFIG_I2C_SH7760) += i2c-sh7760.o
58obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o 61obj-$(CONFIG_I2C_SH_MOBILE) += i2c-sh_mobile.o
59obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o 62obj-$(CONFIG_I2C_SIMTEC) += i2c-simtec.o
60obj-$(CONFIG_I2C_STU300) += i2c-stu300.o 63obj-$(CONFIG_I2C_STU300) += i2c-stu300.o
64obj-$(CONFIG_I2C_TEGRA) += i2c-tegra.o
61obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o 65obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o
62obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o 66obj-$(CONFIG_I2C_OCTEON) += i2c-octeon.o
63obj-$(CONFIG_I2C_XILINX) += i2c-xiic.o 67obj-$(CONFIG_I2C_XILINX) += i2c-xiic.o
64obj-$(CONFIG_I2C_EG20T) += i2c-eg20t.o 68obj-$(CONFIG_I2C_EG20T) += i2c-eg20t.o
65 69
66# External I2C/SMBus adapter drivers 70# External I2C/SMBus adapter drivers
71obj-$(CONFIG_I2C_DIOLAN_U2C) += i2c-diolan-u2c.o
67obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o 72obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o
68obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o 73obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o
69obj-$(CONFIG_I2C_TAOS_EVM) += i2c-taos-evm.o 74obj-$(CONFIG_I2C_TAOS_EVM) += i2c-taos-evm.o
diff --git a/drivers/i2c/busses/i2c-cpm.c b/drivers/i2c/busses/i2c-cpm.c
index f2de3be35df3..3a20961bef1e 100644
--- a/drivers/i2c/busses/i2c-cpm.c
+++ b/drivers/i2c/busses/i2c-cpm.c
@@ -634,8 +634,7 @@ static void cpm_i2c_shutdown(struct cpm_i2c *cpm)
634 cpm_muram_free(cpm->i2c_addr); 634 cpm_muram_free(cpm->i2c_addr);
635} 635}
636 636
637static int __devinit cpm_i2c_probe(struct platform_device *ofdev, 637static int __devinit cpm_i2c_probe(struct platform_device *ofdev)
638 const struct of_device_id *match)
639{ 638{
640 int result, len; 639 int result, len;
641 struct cpm_i2c *cpm; 640 struct cpm_i2c *cpm;
@@ -718,7 +717,7 @@ static const struct of_device_id cpm_i2c_match[] = {
718 717
719MODULE_DEVICE_TABLE(of, cpm_i2c_match); 718MODULE_DEVICE_TABLE(of, cpm_i2c_match);
720 719
721static struct of_platform_driver cpm_i2c_driver = { 720static struct platform_driver cpm_i2c_driver = {
722 .probe = cpm_i2c_probe, 721 .probe = cpm_i2c_probe,
723 .remove = __devexit_p(cpm_i2c_remove), 722 .remove = __devexit_p(cpm_i2c_remove),
724 .driver = { 723 .driver = {
@@ -730,12 +729,12 @@ static struct of_platform_driver cpm_i2c_driver = {
730 729
731static int __init cpm_i2c_init(void) 730static int __init cpm_i2c_init(void)
732{ 731{
733 return of_register_platform_driver(&cpm_i2c_driver); 732 return platform_driver_register(&cpm_i2c_driver);
734} 733}
735 734
736static void __exit cpm_i2c_exit(void) 735static void __exit cpm_i2c_exit(void)
737{ 736{
738 of_unregister_platform_driver(&cpm_i2c_driver); 737 platform_driver_unregister(&cpm_i2c_driver);
739} 738}
740 739
741module_init(cpm_i2c_init); 740module_init(cpm_i2c_init);
diff --git a/drivers/i2c/busses/i2c-diolan-u2c.c b/drivers/i2c/busses/i2c-diolan-u2c.c
new file mode 100644
index 000000000000..76366716a854
--- /dev/null
+++ b/drivers/i2c/busses/i2c-diolan-u2c.c
@@ -0,0 +1,535 @@
1/*
2 * Driver for the Diolan u2c-12 USB-I2C adapter
3 *
4 * Copyright (c) 2010-2011 Ericsson AB
5 *
6 * Derived from:
7 * i2c-tiny-usb.c
8 * Copyright (C) 2006-2007 Till Harbaum (Till@Harbaum.org)
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation, version 2.
13 */
14
15#include <linux/kernel.h>
16#include <linux/errno.h>
17#include <linux/module.h>
18#include <linux/types.h>
19#include <linux/slab.h>
20#include <linux/usb.h>
21#include <linux/i2c.h>
22
23#define DRIVER_NAME "i2c-diolan-u2c"
24
25#define USB_VENDOR_ID_DIOLAN 0x0abf
26#define USB_DEVICE_ID_DIOLAN_U2C 0x3370
27
28#define DIOLAN_OUT_EP 0x02
29#define DIOLAN_IN_EP 0x84
30
31/* commands via USB, must match command ids in the firmware */
32#define CMD_I2C_READ 0x01
33#define CMD_I2C_WRITE 0x02
34#define CMD_I2C_SCAN 0x03 /* Returns list of detected devices */
35#define CMD_I2C_RELEASE_SDA 0x04
36#define CMD_I2C_RELEASE_SCL 0x05
37#define CMD_I2C_DROP_SDA 0x06
38#define CMD_I2C_DROP_SCL 0x07
39#define CMD_I2C_READ_SDA 0x08
40#define CMD_I2C_READ_SCL 0x09
41#define CMD_GET_FW_VERSION 0x0a
42#define CMD_GET_SERIAL 0x0b
43#define CMD_I2C_START 0x0c
44#define CMD_I2C_STOP 0x0d
45#define CMD_I2C_REPEATED_START 0x0e
46#define CMD_I2C_PUT_BYTE 0x0f
47#define CMD_I2C_GET_BYTE 0x10
48#define CMD_I2C_PUT_ACK 0x11
49#define CMD_I2C_GET_ACK 0x12
50#define CMD_I2C_PUT_BYTE_ACK 0x13
51#define CMD_I2C_GET_BYTE_ACK 0x14
52#define CMD_I2C_SET_SPEED 0x1b
53#define CMD_I2C_GET_SPEED 0x1c
54#define CMD_I2C_SET_CLK_SYNC 0x24
55#define CMD_I2C_GET_CLK_SYNC 0x25
56#define CMD_I2C_SET_CLK_SYNC_TO 0x26
57#define CMD_I2C_GET_CLK_SYNC_TO 0x27
58
59#define RESP_OK 0x00
60#define RESP_FAILED 0x01
61#define RESP_BAD_MEMADDR 0x04
62#define RESP_DATA_ERR 0x05
63#define RESP_NOT_IMPLEMENTED 0x06
64#define RESP_NACK 0x07
65#define RESP_TIMEOUT 0x09
66
67#define U2C_I2C_SPEED_FAST 0 /* 400 kHz */
68#define U2C_I2C_SPEED_STD 1 /* 100 kHz */
69#define U2C_I2C_SPEED_2KHZ 242 /* 2 kHz, minimum speed */
70#define U2C_I2C_SPEED(f) ((DIV_ROUND_UP(1000000, (f)) - 10) / 2 + 1)
71
72#define U2C_I2C_FREQ_FAST 400000
73#define U2C_I2C_FREQ_STD 100000
74#define U2C_I2C_FREQ(s) (1000000 / (2 * (s - 1) + 10))
75
76#define DIOLAN_USB_TIMEOUT 100 /* in ms */
77#define DIOLAN_SYNC_TIMEOUT 20 /* in ms */
78
79#define DIOLAN_OUTBUF_LEN 128
80#define DIOLAN_FLUSH_LEN (DIOLAN_OUTBUF_LEN - 4)
81#define DIOLAN_INBUF_LEN 256 /* Maximum supported receive length */
82
83/* Structure to hold all of our device specific stuff */
84struct i2c_diolan_u2c {
85 u8 obuffer[DIOLAN_OUTBUF_LEN]; /* output buffer */
86 u8 ibuffer[DIOLAN_INBUF_LEN]; /* input buffer */
87 struct usb_device *usb_dev; /* the usb device for this device */
88 struct usb_interface *interface;/* the interface for this device */
89 struct i2c_adapter adapter; /* i2c related things */
90 int olen; /* Output buffer length */
91 int ocount; /* Number of enqueued messages */
92};
93
94static uint frequency = U2C_I2C_FREQ_STD; /* I2C clock frequency in Hz */
95
96module_param(frequency, uint, S_IRUGO | S_IWUSR);
97MODULE_PARM_DESC(frequency, "I2C clock frequency in hertz");
98
99/* usb layer */
100
101/* Send command to device, and get response. */
102static int diolan_usb_transfer(struct i2c_diolan_u2c *dev)
103{
104 int ret = 0;
105 int actual;
106 int i;
107
108 if (!dev->olen || !dev->ocount)
109 return -EINVAL;
110
111 ret = usb_bulk_msg(dev->usb_dev,
112 usb_sndbulkpipe(dev->usb_dev, DIOLAN_OUT_EP),
113 dev->obuffer, dev->olen, &actual,
114 DIOLAN_USB_TIMEOUT);
115 if (!ret) {
116 for (i = 0; i < dev->ocount; i++) {
117 int tmpret;
118
119 tmpret = usb_bulk_msg(dev->usb_dev,
120 usb_rcvbulkpipe(dev->usb_dev,
121 DIOLAN_IN_EP),
122 dev->ibuffer,
123 sizeof(dev->ibuffer), &actual,
124 DIOLAN_USB_TIMEOUT);
125 /*
126 * Stop command processing if a previous command
127 * returned an error.
128 * Note that we still need to retrieve all messages.
129 */
130 if (ret < 0)
131 continue;
132 ret = tmpret;
133 if (ret == 0 && actual > 0) {
134 switch (dev->ibuffer[actual - 1]) {
135 case RESP_NACK:
136 /*
137 * Return ENXIO if NACK was received as
138 * response to the address phase,
139 * EIO otherwise
140 */
141 ret = i == 1 ? -ENXIO : -EIO;
142 break;
143 case RESP_TIMEOUT:
144 ret = -ETIMEDOUT;
145 break;
146 case RESP_OK:
147 /* strip off return code */
148 ret = actual - 1;
149 break;
150 default:
151 ret = -EIO;
152 break;
153 }
154 }
155 }
156 }
157 dev->olen = 0;
158 dev->ocount = 0;
159 return ret;
160}
161
162static int diolan_write_cmd(struct i2c_diolan_u2c *dev, bool flush)
163{
164 if (flush || dev->olen >= DIOLAN_FLUSH_LEN)
165 return diolan_usb_transfer(dev);
166 return 0;
167}
168
169/* Send command (no data) */
170static int diolan_usb_cmd(struct i2c_diolan_u2c *dev, u8 command, bool flush)
171{
172 dev->obuffer[dev->olen++] = command;
173 dev->ocount++;
174 return diolan_write_cmd(dev, flush);
175}
176
177/* Send command with one byte of data */
178static int diolan_usb_cmd_data(struct i2c_diolan_u2c *dev, u8 command, u8 data,
179 bool flush)
180{
181 dev->obuffer[dev->olen++] = command;
182 dev->obuffer[dev->olen++] = data;
183 dev->ocount++;
184 return diolan_write_cmd(dev, flush);
185}
186
187/* Send command with two bytes of data */
188static int diolan_usb_cmd_data2(struct i2c_diolan_u2c *dev, u8 command, u8 d1,
189 u8 d2, bool flush)
190{
191 dev->obuffer[dev->olen++] = command;
192 dev->obuffer[dev->olen++] = d1;
193 dev->obuffer[dev->olen++] = d2;
194 dev->ocount++;
195 return diolan_write_cmd(dev, flush);
196}
197
198/*
199 * Flush input queue.
200 * If we don't do this at startup and the controller has queued up
201 * messages which were not retrieved, it will stop responding
202 * at some point.
203 */
204static void diolan_flush_input(struct i2c_diolan_u2c *dev)
205{
206 int i;
207
208 for (i = 0; i < 10; i++) {
209 int actual = 0;
210 int ret;
211
212 ret = usb_bulk_msg(dev->usb_dev,
213 usb_rcvbulkpipe(dev->usb_dev, DIOLAN_IN_EP),
214 dev->ibuffer, sizeof(dev->ibuffer), &actual,
215 DIOLAN_USB_TIMEOUT);
216 if (ret < 0 || actual == 0)
217 break;
218 }
219 if (i == 10)
220 dev_err(&dev->interface->dev, "Failed to flush input buffer\n");
221}
222
223static int diolan_i2c_start(struct i2c_diolan_u2c *dev)
224{
225 return diolan_usb_cmd(dev, CMD_I2C_START, false);
226}
227
228static int diolan_i2c_repeated_start(struct i2c_diolan_u2c *dev)
229{
230 return diolan_usb_cmd(dev, CMD_I2C_REPEATED_START, false);
231}
232
233static int diolan_i2c_stop(struct i2c_diolan_u2c *dev)
234{
235 return diolan_usb_cmd(dev, CMD_I2C_STOP, true);
236}
237
238static int diolan_i2c_get_byte_ack(struct i2c_diolan_u2c *dev, bool ack,
239 u8 *byte)
240{
241 int ret;
242
243 ret = diolan_usb_cmd_data(dev, CMD_I2C_GET_BYTE_ACK, ack, true);
244 if (ret > 0)
245 *byte = dev->ibuffer[0];
246 else if (ret == 0)
247 ret = -EIO;
248
249 return ret;
250}
251
252static int diolan_i2c_put_byte_ack(struct i2c_diolan_u2c *dev, u8 byte)
253{
254 return diolan_usb_cmd_data(dev, CMD_I2C_PUT_BYTE_ACK, byte, false);
255}
256
257static int diolan_set_speed(struct i2c_diolan_u2c *dev, u8 speed)
258{
259 return diolan_usb_cmd_data(dev, CMD_I2C_SET_SPEED, speed, true);
260}
261
262/* Enable or disable clock synchronization (stretching) */
263static int diolan_set_clock_synch(struct i2c_diolan_u2c *dev, bool enable)
264{
265 return diolan_usb_cmd_data(dev, CMD_I2C_SET_CLK_SYNC, enable, true);
266}
267
268/* Set clock synchronization timeout in ms */
269static int diolan_set_clock_synch_timeout(struct i2c_diolan_u2c *dev, int ms)
270{
271 int to_val = ms * 10;
272
273 return diolan_usb_cmd_data2(dev, CMD_I2C_SET_CLK_SYNC_TO,
274 to_val & 0xff, (to_val >> 8) & 0xff, true);
275}
276
277static void diolan_fw_version(struct i2c_diolan_u2c *dev)
278{
279 int ret;
280
281 ret = diolan_usb_cmd(dev, CMD_GET_FW_VERSION, true);
282 if (ret >= 2)
283 dev_info(&dev->interface->dev,
284 "Diolan U2C firmware version %u.%u\n",
285 (unsigned int)dev->ibuffer[0],
286 (unsigned int)dev->ibuffer[1]);
287}
288
289static void diolan_get_serial(struct i2c_diolan_u2c *dev)
290{
291 int ret;
292 u32 serial;
293
294 ret = diolan_usb_cmd(dev, CMD_GET_SERIAL, true);
295 if (ret >= 4) {
296 serial = le32_to_cpu(*(u32 *)dev->ibuffer);
297 dev_info(&dev->interface->dev,
298 "Diolan U2C serial number %u\n", serial);
299 }
300}
301
302static int diolan_init(struct i2c_diolan_u2c *dev)
303{
304 int speed, ret;
305
306 if (frequency >= 200000) {
307 speed = U2C_I2C_SPEED_FAST;
308 frequency = U2C_I2C_FREQ_FAST;
309 } else if (frequency >= 100000 || frequency == 0) {
310 speed = U2C_I2C_SPEED_STD;
311 frequency = U2C_I2C_FREQ_STD;
312 } else {
313 speed = U2C_I2C_SPEED(frequency);
314 if (speed > U2C_I2C_SPEED_2KHZ)
315 speed = U2C_I2C_SPEED_2KHZ;
316 frequency = U2C_I2C_FREQ(speed);
317 }
318
319 dev_info(&dev->interface->dev,
320 "Diolan U2C at USB bus %03d address %03d speed %d Hz\n",
321 dev->usb_dev->bus->busnum, dev->usb_dev->devnum, frequency);
322
323 diolan_flush_input(dev);
324 diolan_fw_version(dev);
325 diolan_get_serial(dev);
326
327 /* Set I2C speed */
328 ret = diolan_set_speed(dev, speed);
329 if (ret < 0)
330 return ret;
331
332 /* Configure I2C clock synchronization */
333 ret = diolan_set_clock_synch(dev, speed != U2C_I2C_SPEED_FAST);
334 if (ret < 0)
335 return ret;
336
337 if (speed != U2C_I2C_SPEED_FAST)
338 ret = diolan_set_clock_synch_timeout(dev, DIOLAN_SYNC_TIMEOUT);
339
340 return ret;
341}
342
343/* i2c layer */
344
345static int diolan_usb_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
346 int num)
347{
348 struct i2c_diolan_u2c *dev = i2c_get_adapdata(adapter);
349 struct i2c_msg *pmsg;
350 int i, j;
351 int ret, sret;
352
353 ret = diolan_i2c_start(dev);
354 if (ret < 0)
355 return ret;
356
357 for (i = 0; i < num; i++) {
358 pmsg = &msgs[i];
359 if (i) {
360 ret = diolan_i2c_repeated_start(dev);
361 if (ret < 0)
362 goto abort;
363 }
364 if (pmsg->flags & I2C_M_RD) {
365 ret =
366 diolan_i2c_put_byte_ack(dev, (pmsg->addr << 1) | 1);
367 if (ret < 0)
368 goto abort;
369 for (j = 0; j < pmsg->len; j++) {
370 u8 byte;
371 bool ack = j < pmsg->len - 1;
372
373 /*
374 * Don't send NACK if this is the first byte
375 * of a SMBUS_BLOCK message.
376 */
377 if (j == 0 && (pmsg->flags & I2C_M_RECV_LEN))
378 ack = true;
379
380 ret = diolan_i2c_get_byte_ack(dev, ack, &byte);
381 if (ret < 0)
382 goto abort;
383 /*
384 * Adjust count if first received byte is length
385 */
386 if (j == 0 && (pmsg->flags & I2C_M_RECV_LEN)) {
387 if (byte == 0
388 || byte > I2C_SMBUS_BLOCK_MAX) {
389 ret = -EPROTO;
390 goto abort;
391 }
392 pmsg->len += byte;
393 }
394 pmsg->buf[j] = byte;
395 }
396 } else {
397 ret = diolan_i2c_put_byte_ack(dev, pmsg->addr << 1);
398 if (ret < 0)
399 goto abort;
400 for (j = 0; j < pmsg->len; j++) {
401 ret = diolan_i2c_put_byte_ack(dev,
402 pmsg->buf[j]);
403 if (ret < 0)
404 goto abort;
405 }
406 }
407 }
408abort:
409 sret = diolan_i2c_stop(dev);
410 if (sret < 0 && ret >= 0)
411 ret = sret;
412 return ret;
413}
414
415/*
416 * Return list of supported functionality.
417 */
418static u32 diolan_usb_func(struct i2c_adapter *a)
419{
420 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
421 I2C_FUNC_SMBUS_READ_BLOCK_DATA | I2C_FUNC_SMBUS_BLOCK_PROC_CALL;
422}
423
424static const struct i2c_algorithm diolan_usb_algorithm = {
425 .master_xfer = diolan_usb_xfer,
426 .functionality = diolan_usb_func,
427};
428
429/* device layer */
430
431static const struct usb_device_id diolan_u2c_table[] = {
432 { USB_DEVICE(USB_VENDOR_ID_DIOLAN, USB_DEVICE_ID_DIOLAN_U2C) },
433 { }
434};
435
436MODULE_DEVICE_TABLE(usb, diolan_u2c_table);
437
438static void diolan_u2c_free(struct i2c_diolan_u2c *dev)
439{
440 usb_put_dev(dev->usb_dev);
441 kfree(dev);
442}
443
444static int diolan_u2c_probe(struct usb_interface *interface,
445 const struct usb_device_id *id)
446{
447 struct i2c_diolan_u2c *dev;
448 int ret;
449
450 /* allocate memory for our device state and initialize it */
451 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
452 if (dev == NULL) {
453 dev_err(&interface->dev, "no memory for device state\n");
454 ret = -ENOMEM;
455 goto error;
456 }
457
458 dev->usb_dev = usb_get_dev(interface_to_usbdev(interface));
459 dev->interface = interface;
460
461 /* save our data pointer in this interface device */
462 usb_set_intfdata(interface, dev);
463
464 /* setup i2c adapter description */
465 dev->adapter.owner = THIS_MODULE;
466 dev->adapter.class = I2C_CLASS_HWMON;
467 dev->adapter.algo = &diolan_usb_algorithm;
468 i2c_set_adapdata(&dev->adapter, dev);
469 snprintf(dev->adapter.name, sizeof(dev->adapter.name),
470 DRIVER_NAME " at bus %03d device %03d",
471 dev->usb_dev->bus->busnum, dev->usb_dev->devnum);
472
473 dev->adapter.dev.parent = &dev->interface->dev;
474
475 /* initialize diolan i2c interface */
476 ret = diolan_init(dev);
477 if (ret < 0) {
478 dev_err(&interface->dev, "failed to initialize adapter\n");
479 goto error_free;
480 }
481
482 /* and finally attach to i2c layer */
483 ret = i2c_add_adapter(&dev->adapter);
484 if (ret < 0) {
485 dev_err(&interface->dev, "failed to add I2C adapter\n");
486 goto error_free;
487 }
488
489 dev_dbg(&interface->dev, "connected " DRIVER_NAME "\n");
490
491 return 0;
492
493error_free:
494 usb_set_intfdata(interface, NULL);
495 diolan_u2c_free(dev);
496error:
497 return ret;
498}
499
500static void diolan_u2c_disconnect(struct usb_interface *interface)
501{
502 struct i2c_diolan_u2c *dev = usb_get_intfdata(interface);
503
504 i2c_del_adapter(&dev->adapter);
505 usb_set_intfdata(interface, NULL);
506 diolan_u2c_free(dev);
507
508 dev_dbg(&interface->dev, "disconnected\n");
509}
510
511static struct usb_driver diolan_u2c_driver = {
512 .name = DRIVER_NAME,
513 .probe = diolan_u2c_probe,
514 .disconnect = diolan_u2c_disconnect,
515 .id_table = diolan_u2c_table,
516};
517
518static int __init diolan_u2c_init(void)
519{
520 /* register this driver with the USB subsystem */
521 return usb_register(&diolan_u2c_driver);
522}
523
524static void __exit diolan_u2c_exit(void)
525{
526 /* deregister this driver with the USB subsystem */
527 usb_deregister(&diolan_u2c_driver);
528}
529
530module_init(diolan_u2c_init);
531module_exit(diolan_u2c_exit);
532
533MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>");
534MODULE_DESCRIPTION(DRIVER_NAME " driver");
535MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index c57c83734692..878a12026af2 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -29,6 +29,7 @@
29#include <linux/pci.h> 29#include <linux/pci.h>
30#include <linux/mutex.h> 30#include <linux/mutex.h>
31#include <linux/ktime.h> 31#include <linux/ktime.h>
32#include <linux/slab.h>
32 33
33#define PCH_EVENT_SET 0 /* I2C Interrupt Event Set Status */ 34#define PCH_EVENT_SET 0 /* I2C Interrupt Event Set Status */
34#define PCH_EVENT_NONE 1 /* I2C Interrupt Event Clear Status */ 35#define PCH_EVENT_NONE 1 /* I2C Interrupt Event Clear Status */
diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c
index 6e3c38240336..e4f88dca99b5 100644
--- a/drivers/i2c/busses/i2c-ibm_iic.c
+++ b/drivers/i2c/busses/i2c-ibm_iic.c
@@ -691,8 +691,7 @@ static int __devinit iic_request_irq(struct platform_device *ofdev,
691/* 691/*
692 * Register single IIC interface 692 * Register single IIC interface
693 */ 693 */
694static int __devinit iic_probe(struct platform_device *ofdev, 694static int __devinit iic_probe(struct platform_device *ofdev)
695 const struct of_device_id *match)
696{ 695{
697 struct device_node *np = ofdev->dev.of_node; 696 struct device_node *np = ofdev->dev.of_node;
698 struct ibm_iic_private *dev; 697 struct ibm_iic_private *dev;
@@ -806,7 +805,7 @@ static const struct of_device_id ibm_iic_match[] = {
806 {} 805 {}
807}; 806};
808 807
809static struct of_platform_driver ibm_iic_driver = { 808static struct platform_driver ibm_iic_driver = {
810 .driver = { 809 .driver = {
811 .name = "ibm-iic", 810 .name = "ibm-iic",
812 .owner = THIS_MODULE, 811 .owner = THIS_MODULE,
@@ -818,12 +817,12 @@ static struct of_platform_driver ibm_iic_driver = {
818 817
819static int __init iic_init(void) 818static int __init iic_init(void)
820{ 819{
821 return of_register_platform_driver(&ibm_iic_driver); 820 return platform_driver_register(&ibm_iic_driver);
822} 821}
823 822
824static void __exit iic_exit(void) 823static void __exit iic_exit(void)
825{ 824{
826 of_unregister_platform_driver(&ibm_iic_driver); 825 platform_driver_unregister(&ibm_iic_driver);
827} 826}
828 827
829module_init(iic_init); 828module_init(iic_init);
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index b74e6dc6886c..75b984c519ac 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -560,8 +560,7 @@ static struct i2c_adapter mpc_ops = {
560 .timeout = HZ, 560 .timeout = HZ,
561}; 561};
562 562
563static int __devinit fsl_i2c_probe(struct platform_device *op, 563static int __devinit fsl_i2c_probe(struct platform_device *op)
564 const struct of_device_id *match)
565{ 564{
566 struct mpc_i2c *i2c; 565 struct mpc_i2c *i2c;
567 const u32 *prop; 566 const u32 *prop;
@@ -569,6 +568,9 @@ static int __devinit fsl_i2c_probe(struct platform_device *op,
569 int result = 0; 568 int result = 0;
570 int plen; 569 int plen;
571 570
571 if (!op->dev.of_match)
572 return -EINVAL;
573
572 i2c = kzalloc(sizeof(*i2c), GFP_KERNEL); 574 i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
573 if (!i2c) 575 if (!i2c)
574 return -ENOMEM; 576 return -ENOMEM;
@@ -603,8 +605,8 @@ static int __devinit fsl_i2c_probe(struct platform_device *op,
603 clock = *prop; 605 clock = *prop;
604 } 606 }
605 607
606 if (match->data) { 608 if (op->dev.of_match->data) {
607 struct mpc_i2c_data *data = match->data; 609 struct mpc_i2c_data *data = op->dev.of_match->data;
608 data->setup(op->dev.of_node, i2c, clock, data->prescaler); 610 data->setup(op->dev.of_node, i2c, clock, data->prescaler);
609 } else { 611 } else {
610 /* Backwards compatibility */ 612 /* Backwards compatibility */
@@ -700,7 +702,7 @@ static const struct of_device_id mpc_i2c_of_match[] = {
700MODULE_DEVICE_TABLE(of, mpc_i2c_of_match); 702MODULE_DEVICE_TABLE(of, mpc_i2c_of_match);
701 703
702/* Structure for a device driver */ 704/* Structure for a device driver */
703static struct of_platform_driver mpc_i2c_driver = { 705static struct platform_driver mpc_i2c_driver = {
704 .probe = fsl_i2c_probe, 706 .probe = fsl_i2c_probe,
705 .remove = __devexit_p(fsl_i2c_remove), 707 .remove = __devexit_p(fsl_i2c_remove),
706 .driver = { 708 .driver = {
@@ -712,18 +714,12 @@ static struct of_platform_driver mpc_i2c_driver = {
712 714
713static int __init fsl_i2c_init(void) 715static int __init fsl_i2c_init(void)
714{ 716{
715 int rv; 717 return platform_driver_register(&mpc_i2c_driver);
716
717 rv = of_register_platform_driver(&mpc_i2c_driver);
718 if (rv)
719 printk(KERN_ERR DRV_NAME
720 " of_register_platform_driver failed (%i)\n", rv);
721 return rv;
722} 718}
723 719
724static void __exit fsl_i2c_exit(void) 720static void __exit fsl_i2c_exit(void)
725{ 721{
726 of_unregister_platform_driver(&mpc_i2c_driver); 722 platform_driver_unregister(&mpc_i2c_driver);
727} 723}
728 724
729module_init(fsl_i2c_init); 725module_init(fsl_i2c_init);
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
new file mode 100644
index 000000000000..caf96dc8ca1b
--- /dev/null
+++ b/drivers/i2c/busses/i2c-mxs.c
@@ -0,0 +1,412 @@
1/*
2 * Freescale MXS I2C bus driver
3 *
4 * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K.
5 *
6 * based on a (non-working) driver which was:
7 *
8 * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
9 *
10 * TODO: add dma-support if platform-support for it is available
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 */
18
19#include <linux/slab.h>
20#include <linux/device.h>
21#include <linux/module.h>
22#include <linux/i2c.h>
23#include <linux/err.h>
24#include <linux/interrupt.h>
25#include <linux/completion.h>
26#include <linux/platform_device.h>
27#include <linux/jiffies.h>
28#include <linux/io.h>
29
30#include <mach/common.h>
31
32#define DRIVER_NAME "mxs-i2c"
33
34#define MXS_I2C_CTRL0 (0x00)
35#define MXS_I2C_CTRL0_SET (0x04)
36
37#define MXS_I2C_CTRL0_SFTRST 0x80000000
38#define MXS_I2C_CTRL0_SEND_NAK_ON_LAST 0x02000000
39#define MXS_I2C_CTRL0_RETAIN_CLOCK 0x00200000
40#define MXS_I2C_CTRL0_POST_SEND_STOP 0x00100000
41#define MXS_I2C_CTRL0_PRE_SEND_START 0x00080000
42#define MXS_I2C_CTRL0_MASTER_MODE 0x00020000
43#define MXS_I2C_CTRL0_DIRECTION 0x00010000
44#define MXS_I2C_CTRL0_XFER_COUNT(v) ((v) & 0x0000FFFF)
45
46#define MXS_I2C_CTRL1 (0x40)
47#define MXS_I2C_CTRL1_SET (0x44)
48#define MXS_I2C_CTRL1_CLR (0x48)
49
50#define MXS_I2C_CTRL1_BUS_FREE_IRQ 0x80
51#define MXS_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ 0x40
52#define MXS_I2C_CTRL1_NO_SLAVE_ACK_IRQ 0x20
53#define MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ 0x10
54#define MXS_I2C_CTRL1_EARLY_TERM_IRQ 0x08
55#define MXS_I2C_CTRL1_MASTER_LOSS_IRQ 0x04
56#define MXS_I2C_CTRL1_SLAVE_STOP_IRQ 0x02
57#define MXS_I2C_CTRL1_SLAVE_IRQ 0x01
58
59#define MXS_I2C_IRQ_MASK (MXS_I2C_CTRL1_DATA_ENGINE_CMPLT_IRQ | \
60 MXS_I2C_CTRL1_NO_SLAVE_ACK_IRQ | \
61 MXS_I2C_CTRL1_EARLY_TERM_IRQ | \
62 MXS_I2C_CTRL1_MASTER_LOSS_IRQ | \
63 MXS_I2C_CTRL1_SLAVE_STOP_IRQ | \
64 MXS_I2C_CTRL1_SLAVE_IRQ)
65
66#define MXS_I2C_QUEUECTRL (0x60)
67#define MXS_I2C_QUEUECTRL_SET (0x64)
68#define MXS_I2C_QUEUECTRL_CLR (0x68)
69
70#define MXS_I2C_QUEUECTRL_QUEUE_RUN 0x20
71#define MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE 0x04
72
73#define MXS_I2C_QUEUESTAT (0x70)
74#define MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY 0x00002000
75
76#define MXS_I2C_QUEUECMD (0x80)
77
78#define MXS_I2C_QUEUEDATA (0x90)
79
80#define MXS_I2C_DATA (0xa0)
81
82
83#define MXS_CMD_I2C_SELECT (MXS_I2C_CTRL0_RETAIN_CLOCK | \
84 MXS_I2C_CTRL0_PRE_SEND_START | \
85 MXS_I2C_CTRL0_MASTER_MODE | \
86 MXS_I2C_CTRL0_DIRECTION | \
87 MXS_I2C_CTRL0_XFER_COUNT(1))
88
89#define MXS_CMD_I2C_WRITE (MXS_I2C_CTRL0_PRE_SEND_START | \
90 MXS_I2C_CTRL0_MASTER_MODE | \
91 MXS_I2C_CTRL0_DIRECTION)
92
93#define MXS_CMD_I2C_READ (MXS_I2C_CTRL0_SEND_NAK_ON_LAST | \
94 MXS_I2C_CTRL0_MASTER_MODE)
95
96/**
97 * struct mxs_i2c_dev - per device, private MXS-I2C data
98 *
99 * @dev: driver model device node
100 * @regs: IO registers pointer
101 * @cmd_complete: completion object for transaction wait
102 * @cmd_err: error code for last transaction
103 * @adapter: i2c subsystem adapter node
104 */
105struct mxs_i2c_dev {
106 struct device *dev;
107 void __iomem *regs;
108 struct completion cmd_complete;
109 u32 cmd_err;
110 struct i2c_adapter adapter;
111};
112
113/*
114 * TODO: check if calls to here are really needed. If not, we could get rid of
115 * mxs_reset_block and the mach-dependency. Needs an I2C analyzer, probably.
116 */
117static void mxs_i2c_reset(struct mxs_i2c_dev *i2c)
118{
119 mxs_reset_block(i2c->regs);
120 writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET);
121 writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE,
122 i2c->regs + MXS_I2C_QUEUECTRL_SET);
123}
124
125static void mxs_i2c_pioq_setup_read(struct mxs_i2c_dev *i2c, u8 addr, int len,
126 int flags)
127{
128 u32 data;
129
130 writel(MXS_CMD_I2C_SELECT, i2c->regs + MXS_I2C_QUEUECMD);
131
132 data = (addr << 1) | I2C_SMBUS_READ;
133 writel(data, i2c->regs + MXS_I2C_DATA);
134
135 data = MXS_CMD_I2C_READ | MXS_I2C_CTRL0_XFER_COUNT(len) | flags;
136 writel(data, i2c->regs + MXS_I2C_QUEUECMD);
137}
138
139static void mxs_i2c_pioq_setup_write(struct mxs_i2c_dev *i2c,
140 u8 addr, u8 *buf, int len, int flags)
141{
142 u32 data;
143 int i, shifts_left;
144
145 data = MXS_CMD_I2C_WRITE | MXS_I2C_CTRL0_XFER_COUNT(len + 1) | flags;
146 writel(data, i2c->regs + MXS_I2C_QUEUECMD);
147
148 /*
149 * We have to copy the slave address (u8) and buffer (arbitrary number
150 * of u8) into the data register (u32). To achieve that, the u8 are put
151 * into the MSBs of 'data' which is then shifted for the next u8. When
152 * apropriate, 'data' is written to MXS_I2C_DATA. So, the first u32
153 * looks like this:
154 *
155 * 3 2 1 0
156 * 10987654|32109876|54321098|76543210
157 * --------+--------+--------+--------
158 * buffer+2|buffer+1|buffer+0|slave_addr
159 */
160
161 data = ((addr << 1) | I2C_SMBUS_WRITE) << 24;
162
163 for (i = 0; i < len; i++) {
164 data >>= 8;
165 data |= buf[i] << 24;
166 if ((i & 3) == 2)
167 writel(data, i2c->regs + MXS_I2C_DATA);
168 }
169
170 /* Write out the remaining bytes if any */
171 shifts_left = 24 - (i & 3) * 8;
172 if (shifts_left)
173 writel(data >> shifts_left, i2c->regs + MXS_I2C_DATA);
174}
175
176/*
177 * TODO: should be replaceable with a waitqueue and RD_QUEUE_IRQ (setting the
178 * rd_threshold to 1). Couldn't get this to work, though.
179 */
180static int mxs_i2c_wait_for_data(struct mxs_i2c_dev *i2c)
181{
182 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
183
184 while (readl(i2c->regs + MXS_I2C_QUEUESTAT)
185 & MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY) {
186 if (time_after(jiffies, timeout))
187 return -ETIMEDOUT;
188 cond_resched();
189 }
190
191 return 0;
192}
193
194static int mxs_i2c_finish_read(struct mxs_i2c_dev *i2c, u8 *buf, int len)
195{
196 u32 data;
197 int i;
198
199 for (i = 0; i < len; i++) {
200 if ((i & 3) == 0) {
201 if (mxs_i2c_wait_for_data(i2c))
202 return -ETIMEDOUT;
203 data = readl(i2c->regs + MXS_I2C_QUEUEDATA);
204 }
205 buf[i] = data & 0xff;
206 data >>= 8;
207 }
208
209 return 0;
210}
211
212/*
213 * Low level master read/write transaction.
214 */
215static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg,
216 int stop)
217{
218 struct mxs_i2c_dev *i2c = i2c_get_adapdata(adap);
219 int ret;
220 int flags;
221
222 init_completion(&i2c->cmd_complete);
223
224 dev_dbg(i2c->dev, "addr: 0x%04x, len: %d, flags: 0x%x, stop: %d\n",
225 msg->addr, msg->len, msg->flags, stop);
226
227 if (msg->len == 0)
228 return -EINVAL;
229
230 flags = stop ? MXS_I2C_CTRL0_POST_SEND_STOP : 0;
231
232 if (msg->flags & I2C_M_RD)
233 mxs_i2c_pioq_setup_read(i2c, msg->addr, msg->len, flags);
234 else
235 mxs_i2c_pioq_setup_write(i2c, msg->addr, msg->buf, msg->len,
236 flags);
237
238 writel(MXS_I2C_QUEUECTRL_QUEUE_RUN,
239 i2c->regs + MXS_I2C_QUEUECTRL_SET);
240
241 ret = wait_for_completion_timeout(&i2c->cmd_complete,
242 msecs_to_jiffies(1000));
243 if (ret == 0)
244 goto timeout;
245
246 if ((!i2c->cmd_err) && (msg->flags & I2C_M_RD)) {
247 ret = mxs_i2c_finish_read(i2c, msg->buf, msg->len);
248 if (ret)
249 goto timeout;
250 }
251
252 if (i2c->cmd_err == -ENXIO)
253 mxs_i2c_reset(i2c);
254
255 dev_dbg(i2c->dev, "Done with err=%d\n", i2c->cmd_err);
256
257 return i2c->cmd_err;
258
259timeout:
260 dev_dbg(i2c->dev, "Timeout!\n");
261 mxs_i2c_reset(i2c);
262 return -ETIMEDOUT;
263}
264
265static int mxs_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
266 int num)
267{
268 int i;
269 int err;
270
271 for (i = 0; i < num; i++) {
272 err = mxs_i2c_xfer_msg(adap, &msgs[i], i == (num - 1));
273 if (err)
274 return err;
275 }
276
277 return num;
278}
279
280static u32 mxs_i2c_func(struct i2c_adapter *adap)
281{
282 return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
283}
284
285static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id)
286{
287 struct mxs_i2c_dev *i2c = dev_id;
288 u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK;
289
290 if (!stat)
291 return IRQ_NONE;
292
293 if (stat & MXS_I2C_CTRL1_NO_SLAVE_ACK_IRQ)
294 i2c->cmd_err = -ENXIO;
295 else if (stat & (MXS_I2C_CTRL1_EARLY_TERM_IRQ |
296 MXS_I2C_CTRL1_MASTER_LOSS_IRQ |
297 MXS_I2C_CTRL1_SLAVE_STOP_IRQ | MXS_I2C_CTRL1_SLAVE_IRQ))
298 /* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */
299 i2c->cmd_err = -EIO;
300 else
301 i2c->cmd_err = 0;
302
303 complete(&i2c->cmd_complete);
304
305 writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR);
306 return IRQ_HANDLED;
307}
308
309static const struct i2c_algorithm mxs_i2c_algo = {
310 .master_xfer = mxs_i2c_xfer,
311 .functionality = mxs_i2c_func,
312};
313
314static int __devinit mxs_i2c_probe(struct platform_device *pdev)
315{
316 struct device *dev = &pdev->dev;
317 struct mxs_i2c_dev *i2c;
318 struct i2c_adapter *adap;
319 struct resource *res;
320 resource_size_t res_size;
321 int err, irq;
322
323 i2c = devm_kzalloc(dev, sizeof(struct mxs_i2c_dev), GFP_KERNEL);
324 if (!i2c)
325 return -ENOMEM;
326
327 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
328 if (!res)
329 return -ENOENT;
330
331 res_size = resource_size(res);
332 if (!devm_request_mem_region(dev, res->start, res_size, res->name))
333 return -EBUSY;
334
335 i2c->regs = devm_ioremap_nocache(dev, res->start, res_size);
336 if (!i2c->regs)
337 return -EBUSY;
338
339 irq = platform_get_irq(pdev, 0);
340 if (irq < 0)
341 return irq;
342
343 err = devm_request_irq(dev, irq, mxs_i2c_isr, 0, dev_name(dev), i2c);
344 if (err)
345 return err;
346
347 i2c->dev = dev;
348 platform_set_drvdata(pdev, i2c);
349
350 /* Do reset to enforce correct startup after pinmuxing */
351 mxs_i2c_reset(i2c);
352
353 adap = &i2c->adapter;
354 strlcpy(adap->name, "MXS I2C adapter", sizeof(adap->name));
355 adap->owner = THIS_MODULE;
356 adap->algo = &mxs_i2c_algo;
357 adap->dev.parent = dev;
358 adap->nr = pdev->id;
359 i2c_set_adapdata(adap, i2c);
360 err = i2c_add_numbered_adapter(adap);
361 if (err) {
362 dev_err(dev, "Failed to add adapter (%d)\n", err);
363 writel(MXS_I2C_CTRL0_SFTRST,
364 i2c->regs + MXS_I2C_CTRL0_SET);
365 return err;
366 }
367
368 return 0;
369}
370
371static int __devexit mxs_i2c_remove(struct platform_device *pdev)
372{
373 struct mxs_i2c_dev *i2c = platform_get_drvdata(pdev);
374 int ret;
375
376 ret = i2c_del_adapter(&i2c->adapter);
377 if (ret)
378 return -EBUSY;
379
380 writel(MXS_I2C_QUEUECTRL_QUEUE_RUN,
381 i2c->regs + MXS_I2C_QUEUECTRL_CLR);
382 writel(MXS_I2C_CTRL0_SFTRST, i2c->regs + MXS_I2C_CTRL0_SET);
383
384 platform_set_drvdata(pdev, NULL);
385
386 return 0;
387}
388
389static struct platform_driver mxs_i2c_driver = {
390 .driver = {
391 .name = DRIVER_NAME,
392 .owner = THIS_MODULE,
393 },
394 .remove = __devexit_p(mxs_i2c_remove),
395};
396
397static int __init mxs_i2c_init(void)
398{
399 return platform_driver_probe(&mxs_i2c_driver, mxs_i2c_probe);
400}
401subsys_initcall(mxs_i2c_init);
402
403static void __exit mxs_i2c_exit(void)
404{
405 platform_driver_unregister(&mxs_i2c_driver);
406}
407module_exit(mxs_i2c_exit);
408
409MODULE_AUTHOR("Wolfram Sang <w.sang@pengutronix.de>");
410MODULE_DESCRIPTION("MXS I2C Bus Driver");
411MODULE_LICENSE("GPL");
412MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index ef3bcb1ce864..1b46a9d9f907 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -249,7 +249,7 @@ static struct i2c_adapter ocores_adapter = {
249static int ocores_i2c_of_probe(struct platform_device* pdev, 249static int ocores_i2c_of_probe(struct platform_device* pdev,
250 struct ocores_i2c* i2c) 250 struct ocores_i2c* i2c)
251{ 251{
252 __be32* val; 252 const __be32* val;
253 253
254 val = of_get_property(pdev->dev.of_node, "regstep", NULL); 254 val = of_get_property(pdev->dev.of_node, "regstep", NULL);
255 if (!val) { 255 if (!val) {
@@ -330,9 +330,7 @@ static int __devinit ocores_i2c_probe(struct platform_device *pdev)
330 i2c->adap = ocores_adapter; 330 i2c->adap = ocores_adapter;
331 i2c_set_adapdata(&i2c->adap, i2c); 331 i2c_set_adapdata(&i2c->adap, i2c);
332 i2c->adap.dev.parent = &pdev->dev; 332 i2c->adap.dev.parent = &pdev->dev;
333#ifdef CONFIG_OF
334 i2c->adap.dev.of_node = pdev->dev.of_node; 333 i2c->adap.dev.of_node = pdev->dev.of_node;
335#endif
336 334
337 /* add i2c adapter to i2c tree */ 335 /* add i2c adapter to i2c tree */
338 ret = i2c_add_adapter(&i2c->adap); 336 ret = i2c_add_adapter(&i2c->adap);
@@ -390,15 +388,11 @@ static int ocores_i2c_resume(struct platform_device *pdev)
390#define ocores_i2c_resume NULL 388#define ocores_i2c_resume NULL
391#endif 389#endif
392 390
393#ifdef CONFIG_OF
394static struct of_device_id ocores_i2c_match[] = { 391static struct of_device_id ocores_i2c_match[] = {
395 { 392 { .compatible = "opencores,i2c-ocores", },
396 .compatible = "opencores,i2c-ocores", 393 {},
397 },
398 {},
399}; 394};
400MODULE_DEVICE_TABLE(of, ocores_i2c_match); 395MODULE_DEVICE_TABLE(of, ocores_i2c_match);
401#endif
402 396
403/* work with hotplug and coldplug */ 397/* work with hotplug and coldplug */
404MODULE_ALIAS("platform:ocores-i2c"); 398MODULE_ALIAS("platform:ocores-i2c");
@@ -411,9 +405,7 @@ static struct platform_driver ocores_i2c_driver = {
411 .driver = { 405 .driver = {
412 .owner = THIS_MODULE, 406 .owner = THIS_MODULE,
413 .name = "ocores-i2c", 407 .name = "ocores-i2c",
414#ifdef CONFIG_OF 408 .of_match_table = ocores_i2c_match,
415 .of_match_table = ocores_i2c_match,
416#endif
417 }, 409 },
418}; 410};
419 411
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index 829a2a1029f7..58a58c7eaa17 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -378,9 +378,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
378 * REVISIT: Some wkup sources might not be needed. 378 * REVISIT: Some wkup sources might not be needed.
379 */ 379 */
380 dev->westate = OMAP_I2C_WE_ALL; 380 dev->westate = OMAP_I2C_WE_ALL;
381 if (dev->rev < OMAP_I2C_REV_ON_4430) 381 omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate);
382 omap_i2c_write_reg(dev, OMAP_I2C_WE_REG,
383 dev->westate);
384 } 382 }
385 } 383 }
386 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); 384 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0);
diff --git a/drivers/i2c/busses/i2c-puv3.c b/drivers/i2c/busses/i2c-puv3.c
new file mode 100644
index 000000000000..fac673940849
--- /dev/null
+++ b/drivers/i2c/busses/i2c-puv3.c
@@ -0,0 +1,306 @@
1/*
2 * I2C driver for PKUnity-v3 SoC
3 * Code specific to PKUnity SoC and UniCore ISA
4 *
5 * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn>
6 * Copyright (C) 2001-2010 Guan Xuetao
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/err.h>
16#include <linux/slab.h>
17#include <linux/types.h>
18#include <linux/delay.h>
19#include <linux/i2c.h>
20#include <linux/init.h>
21#include <linux/clk.h>
22#include <linux/platform_device.h>
23#include <linux/io.h>
24#include <mach/hardware.h>
25
26/*
27 * Poll the i2c status register until the specified bit is set.
28 * Returns 0 if timed out (100 msec).
29 */
30static short poll_status(unsigned long bit)
31{
32 int loop_cntr = 1000;
33
34 if (bit & I2C_STATUS_TFNF) {
35 do {
36 udelay(10);
37 } while (!(readl(I2C_STATUS) & bit) && (--loop_cntr > 0));
38 } else {
39 /* RXRDY handler */
40 do {
41 if (readl(I2C_TAR) == I2C_TAR_EEPROM)
42 msleep(20);
43 else
44 udelay(10);
45 } while (!(readl(I2C_RXFLR) & 0xf) && (--loop_cntr > 0));
46 }
47
48 return (loop_cntr > 0);
49}
50
51static int xfer_read(struct i2c_adapter *adap, unsigned char *buf, int length)
52{
53 int i2c_reg = *buf;
54
55 /* Read data */
56 while (length--) {
57 if (!poll_status(I2C_STATUS_TFNF)) {
58 dev_dbg(&adap->dev, "Tx FIFO Not Full timeout\n");
59 return -ETIMEDOUT;
60 }
61
62 /* send addr */
63 writel(i2c_reg | I2C_DATACMD_WRITE, I2C_DATACMD);
64
65 /* get ready to next write */
66 i2c_reg++;
67
68 /* send read CMD */
69 writel(I2C_DATACMD_READ, I2C_DATACMD);
70
71 /* wait until the Rx FIFO have available */
72 if (!poll_status(I2C_STATUS_RFNE)) {
73 dev_dbg(&adap->dev, "RXRDY timeout\n");
74 return -ETIMEDOUT;
75 }
76
77 /* read the data to buf */
78 *buf = (readl(I2C_DATACMD) & I2C_DATACMD_DAT_MASK);
79 buf++;
80 }
81
82 return 0;
83}
84
85static int xfer_write(struct i2c_adapter *adap, unsigned char *buf, int length)
86{
87 int i2c_reg = *buf;
88
89 /* Do nothing but storing the reg_num to a static variable */
90 if (i2c_reg == -1) {
91 printk(KERN_WARNING "Error i2c reg\n");
92 return -ETIMEDOUT;
93 }
94
95 if (length == 1)
96 return 0;
97
98 buf++;
99 length--;
100 while (length--) {
101 /* send addr */
102 writel(i2c_reg | I2C_DATACMD_WRITE, I2C_DATACMD);
103
104 /* send write CMD */
105 writel(*buf | I2C_DATACMD_WRITE, I2C_DATACMD);
106
107 /* wait until the Rx FIFO have available */
108 msleep(20);
109
110 /* read the data to buf */
111 i2c_reg++;
112 buf++;
113 }
114
115 return 0;
116}
117
118/*
119 * Generic i2c master transfer entrypoint.
120 *
121 */
122static int puv3_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg,
123 int num)
124{
125 int i, ret;
126 unsigned char swap;
127
128 /* Disable i2c */
129 writel(I2C_ENABLE_DISABLE, I2C_ENABLE);
130
131 /* Set the work mode and speed*/
132 writel(I2C_CON_MASTER | I2C_CON_SPEED_STD | I2C_CON_SLAVEDISABLE, I2C_CON);
133
134 writel(pmsg->addr, I2C_TAR);
135
136 /* Enable i2c */
137 writel(I2C_ENABLE_ENABLE, I2C_ENABLE);
138
139 dev_dbg(&adap->dev, "puv3_i2c_xfer: processing %d messages:\n", num);
140
141 for (i = 0; i < num; i++) {
142 dev_dbg(&adap->dev, " #%d: %sing %d byte%s %s 0x%02x\n", i,
143 pmsg->flags & I2C_M_RD ? "read" : "writ",
144 pmsg->len, pmsg->len > 1 ? "s" : "",
145 pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
146
147 if (pmsg->len && pmsg->buf) { /* sanity check */
148 if (pmsg->flags & I2C_M_RD)
149 ret = xfer_read(adap, pmsg->buf, pmsg->len);
150 else
151 ret = xfer_write(adap, pmsg->buf, pmsg->len);
152
153 if (ret)
154 return ret;
155
156 }
157 dev_dbg(&adap->dev, "transfer complete\n");
158 pmsg++; /* next message */
159 }
160
161 /* XXX: fixup be16_to_cpu in bq27x00_battery.c */
162 if (pmsg->addr == I2C_TAR_PWIC) {
163 swap = pmsg->buf[0];
164 pmsg->buf[0] = pmsg->buf[1];
165 pmsg->buf[1] = swap;
166 }
167
168 return i;
169}
170
171/*
172 * Return list of supported functionality.
173 */
174static u32 puv3_i2c_func(struct i2c_adapter *adapter)
175{
176 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
177}
178
179static struct i2c_algorithm puv3_i2c_algorithm = {
180 .master_xfer = puv3_i2c_xfer,
181 .functionality = puv3_i2c_func,
182};
183
184/*
185 * Main initialization routine.
186 */
187static int __devinit puv3_i2c_probe(struct platform_device *pdev)
188{
189 struct i2c_adapter *adapter;
190 struct resource *mem;
191 int rc;
192
193 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
194 if (!mem)
195 return -ENODEV;
196
197 if (!request_mem_region(mem->start, resource_size(mem), "puv3_i2c"))
198 return -EBUSY;
199
200 adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
201 if (adapter == NULL) {
202 dev_err(&pdev->dev, "can't allocate inteface!\n");
203 rc = -ENOMEM;
204 goto fail_nomem;
205 }
206 snprintf(adapter->name, sizeof(adapter->name), "PUV3-I2C at 0x%08x",
207 mem->start);
208 adapter->algo = &puv3_i2c_algorithm;
209 adapter->class = I2C_CLASS_HWMON;
210 adapter->dev.parent = &pdev->dev;
211
212 platform_set_drvdata(pdev, adapter);
213
214 adapter->nr = pdev->id;
215 rc = i2c_add_numbered_adapter(adapter);
216 if (rc) {
217 dev_err(&pdev->dev, "Adapter '%s' registration failed\n",
218 adapter->name);
219 goto fail_add_adapter;
220 }
221
222 dev_info(&pdev->dev, "PKUnity v3 i2c bus adapter.\n");
223 return 0;
224
225fail_add_adapter:
226 platform_set_drvdata(pdev, NULL);
227 kfree(adapter);
228fail_nomem:
229 release_mem_region(mem->start, resource_size(mem));
230
231 return rc;
232}
233
234static int __devexit puv3_i2c_remove(struct platform_device *pdev)
235{
236 struct i2c_adapter *adapter = platform_get_drvdata(pdev);
237 struct resource *mem;
238 int rc;
239
240 rc = i2c_del_adapter(adapter);
241 if (rc) {
242 dev_err(&pdev->dev, "Adapter '%s' delete fail\n",
243 adapter->name);
244 return rc;
245 }
246
247 put_device(&pdev->dev);
248 platform_set_drvdata(pdev, NULL);
249
250 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
251 release_mem_region(mem->start, resource_size(mem));
252
253 return rc;
254}
255
256#ifdef CONFIG_PM
257static int puv3_i2c_suspend(struct platform_device *dev, pm_message_t state)
258{
259 int poll_count;
260 /* Disable the IIC */
261 writel(I2C_ENABLE_DISABLE, I2C_ENABLE);
262 for (poll_count = 0; poll_count < 50; poll_count++) {
263 if (readl(I2C_ENSTATUS) & I2C_ENSTATUS_ENABLE)
264 udelay(25);
265 }
266
267 return 0;
268}
269
270static int puv3_i2c_resume(struct platform_device *dev)
271{
272 return 0 ;
273}
274#else
275#define puv3_i2c_suspend NULL
276#define puv3_i2c_resume NULL
277#endif
278
279MODULE_ALIAS("platform:puv3_i2c");
280
281static struct platform_driver puv3_i2c_driver = {
282 .probe = puv3_i2c_probe,
283 .remove = __devexit_p(puv3_i2c_remove),
284 .suspend = puv3_i2c_suspend,
285 .resume = puv3_i2c_resume,
286 .driver = {
287 .name = "PKUnity-v3-I2C",
288 .owner = THIS_MODULE,
289 }
290};
291
292static int __init puv3_i2c_init(void)
293{
294 return platform_driver_register(&puv3_i2c_driver);
295}
296
297static void __exit puv3_i2c_exit(void)
298{
299 platform_driver_unregister(&puv3_i2c_driver);
300}
301
302module_init(puv3_i2c_init);
303module_exit(puv3_i2c_exit);
304
305MODULE_DESCRIPTION("PKUnity v3 I2C driver");
306MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/busses/i2c-pxa-pci.c b/drivers/i2c/busses/i2c-pxa-pci.c
new file mode 100644
index 000000000000..6659d269b841
--- /dev/null
+++ b/drivers/i2c/busses/i2c-pxa-pci.c
@@ -0,0 +1,176 @@
1/*
2 * The CE4100's I2C device is more or less the same one as found on PXA.
3 * It does not support slave mode, the register slightly moved. This PCI
4 * device provides three bars, every contains a single I2C controller.
5 */
6#include <linux/pci.h>
7#include <linux/platform_device.h>
8#include <linux/i2c/pxa-i2c.h>
9#include <linux/of.h>
10#include <linux/of_device.h>
11#include <linux/of_address.h>
12
13#define CE4100_PCI_I2C_DEVS 3
14
15struct ce4100_devices {
16 struct platform_device *pdev[CE4100_PCI_I2C_DEVS];
17};
18
19static struct platform_device *add_i2c_device(struct pci_dev *dev, int bar)
20{
21 struct platform_device *pdev;
22 struct i2c_pxa_platform_data pdata;
23 struct resource res[2];
24 struct device_node *child;
25 static int devnum;
26 int ret;
27
28 memset(&pdata, 0, sizeof(struct i2c_pxa_platform_data));
29 memset(&res, 0, sizeof(res));
30
31 res[0].flags = IORESOURCE_MEM;
32 res[0].start = pci_resource_start(dev, bar);
33 res[0].end = pci_resource_end(dev, bar);
34
35 res[1].flags = IORESOURCE_IRQ;
36 res[1].start = dev->irq;
37 res[1].end = dev->irq;
38
39 for_each_child_of_node(dev->dev.of_node, child) {
40 const void *prop;
41 struct resource r;
42 int ret;
43
44 ret = of_address_to_resource(child, 0, &r);
45 if (ret < 0)
46 continue;
47 if (r.start != res[0].start)
48 continue;
49 if (r.end != res[0].end)
50 continue;
51 if (r.flags != res[0].flags)
52 continue;
53
54 prop = of_get_property(child, "fast-mode", NULL);
55 if (prop)
56 pdata.fast_mode = 1;
57
58 break;
59 }
60
61 if (!child) {
62 dev_err(&dev->dev, "failed to match a DT node for bar %d.\n",
63 bar);
64 ret = -EINVAL;
65 goto out;
66 }
67
68 pdev = platform_device_alloc("ce4100-i2c", devnum);
69 if (!pdev) {
70 of_node_put(child);
71 ret = -ENOMEM;
72 goto out;
73 }
74 pdev->dev.parent = &dev->dev;
75 pdev->dev.of_node = child;
76
77 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
78 if (ret)
79 goto err;
80
81 ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
82 if (ret)
83 goto err;
84
85 ret = platform_device_add(pdev);
86 if (ret)
87 goto err;
88 devnum++;
89 return pdev;
90err:
91 platform_device_put(pdev);
92out:
93 return ERR_PTR(ret);
94}
95
96static int __devinit ce4100_i2c_probe(struct pci_dev *dev,
97 const struct pci_device_id *ent)
98{
99 int ret;
100 int i;
101 struct ce4100_devices *sds;
102
103 ret = pci_enable_device_mem(dev);
104 if (ret)
105 return ret;
106
107 if (!dev->dev.of_node) {
108 dev_err(&dev->dev, "Missing device tree node.\n");
109 return -EINVAL;
110 }
111 sds = kzalloc(sizeof(*sds), GFP_KERNEL);
112 if (!sds)
113 goto err_mem;
114
115 for (i = 0; i < ARRAY_SIZE(sds->pdev); i++) {
116 sds->pdev[i] = add_i2c_device(dev, i);
117 if (IS_ERR(sds->pdev[i])) {
118 while (--i >= 0)
119 platform_device_unregister(sds->pdev[i]);
120 goto err_dev_add;
121 }
122 }
123 pci_set_drvdata(dev, sds);
124 return 0;
125
126err_dev_add:
127 pci_set_drvdata(dev, NULL);
128 kfree(sds);
129err_mem:
130 pci_disable_device(dev);
131 return ret;
132}
133
134static void __devexit ce4100_i2c_remove(struct pci_dev *dev)
135{
136 struct ce4100_devices *sds;
137 unsigned int i;
138
139 sds = pci_get_drvdata(dev);
140 pci_set_drvdata(dev, NULL);
141
142 for (i = 0; i < ARRAY_SIZE(sds->pdev); i++)
143 platform_device_unregister(sds->pdev[i]);
144
145 pci_disable_device(dev);
146 kfree(sds);
147}
148
149static struct pci_device_id ce4100_i2c_devices[] __devinitdata = {
150 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x2e68)},
151 { },
152};
153MODULE_DEVICE_TABLE(pci, ce4100_i2c_devices);
154
155static struct pci_driver ce4100_i2c_driver = {
156 .name = "ce4100_i2c",
157 .id_table = ce4100_i2c_devices,
158 .probe = ce4100_i2c_probe,
159 .remove = __devexit_p(ce4100_i2c_remove),
160};
161
162static int __init ce4100_i2c_init(void)
163{
164 return pci_register_driver(&ce4100_i2c_driver);
165}
166module_init(ce4100_i2c_init);
167
168static void __exit ce4100_i2c_exit(void)
169{
170 pci_unregister_driver(&ce4100_i2c_driver);
171}
172module_exit(ce4100_i2c_exit);
173
174MODULE_DESCRIPTION("CE4100 PCI-I2C glue code for PXA's driver");
175MODULE_LICENSE("GPL v2");
176MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index f4c19a97e0b3..b914184748c9 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -29,38 +29,75 @@
29#include <linux/errno.h> 29#include <linux/errno.h>
30#include <linux/interrupt.h> 30#include <linux/interrupt.h>
31#include <linux/i2c-pxa.h> 31#include <linux/i2c-pxa.h>
32#include <linux/of_i2c.h>
32#include <linux/platform_device.h> 33#include <linux/platform_device.h>
33#include <linux/err.h> 34#include <linux/err.h>
34#include <linux/clk.h> 35#include <linux/clk.h>
35#include <linux/slab.h> 36#include <linux/slab.h>
36#include <linux/io.h> 37#include <linux/io.h>
38#include <linux/i2c/pxa-i2c.h>
37 39
38#include <asm/irq.h> 40#include <asm/irq.h>
39#include <plat/i2c.h> 41
42#ifndef CONFIG_HAVE_CLK
43#define clk_get(dev, id) NULL
44#define clk_put(clk) do { } while (0)
45#define clk_disable(clk) do { } while (0)
46#define clk_enable(clk) do { } while (0)
47#endif
48
49struct pxa_reg_layout {
50 u32 ibmr;
51 u32 idbr;
52 u32 icr;
53 u32 isr;
54 u32 isar;
55};
56
57enum pxa_i2c_types {
58 REGS_PXA2XX,
59 REGS_PXA3XX,
60 REGS_CE4100,
61};
40 62
41/* 63/*
42 * I2C register offsets will be shifted 0 or 1 bit left, depending on 64 * I2C registers definitions
43 * different SoCs
44 */ 65 */
45#define REG_SHIFT_0 (0 << 0) 66static struct pxa_reg_layout pxa_reg_layout[] = {
46#define REG_SHIFT_1 (1 << 0) 67 [REGS_PXA2XX] = {
47#define REG_SHIFT(d) ((d) & 0x1) 68 .ibmr = 0x00,
69 .idbr = 0x08,
70 .icr = 0x10,
71 .isr = 0x18,
72 .isar = 0x20,
73 },
74 [REGS_PXA3XX] = {
75 .ibmr = 0x00,
76 .idbr = 0x04,
77 .icr = 0x08,
78 .isr = 0x0c,
79 .isar = 0x10,
80 },
81 [REGS_CE4100] = {
82 .ibmr = 0x14,
83 .idbr = 0x0c,
84 .icr = 0x00,
85 .isr = 0x04,
86 /* no isar register */
87 },
88};
48 89
49static const struct platform_device_id i2c_pxa_id_table[] = { 90static const struct platform_device_id i2c_pxa_id_table[] = {
50 { "pxa2xx-i2c", REG_SHIFT_1 }, 91 { "pxa2xx-i2c", REGS_PXA2XX },
51 { "pxa3xx-pwri2c", REG_SHIFT_0 }, 92 { "pxa3xx-pwri2c", REGS_PXA3XX },
93 { "ce4100-i2c", REGS_CE4100 },
52 { }, 94 { },
53}; 95};
54MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table); 96MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table);
55 97
56/* 98/*
57 * I2C registers and bit definitions 99 * I2C bit definitions
58 */ 100 */
59#define IBMR (0x00)
60#define IDBR (0x08)
61#define ICR (0x10)
62#define ISR (0x18)
63#define ISAR (0x20)
64 101
65#define ICR_START (1 << 0) /* start bit */ 102#define ICR_START (1 << 0) /* start bit */
66#define ICR_STOP (1 << 1) /* stop bit */ 103#define ICR_STOP (1 << 1) /* stop bit */
@@ -111,7 +148,11 @@ struct pxa_i2c {
111 u32 icrlog[32]; 148 u32 icrlog[32];
112 149
113 void __iomem *reg_base; 150 void __iomem *reg_base;
114 unsigned int reg_shift; 151 void __iomem *reg_ibmr;
152 void __iomem *reg_idbr;
153 void __iomem *reg_icr;
154 void __iomem *reg_isr;
155 void __iomem *reg_isar;
115 156
116 unsigned long iobase; 157 unsigned long iobase;
117 unsigned long iosize; 158 unsigned long iosize;
@@ -121,11 +162,11 @@ struct pxa_i2c {
121 unsigned int fast_mode :1; 162 unsigned int fast_mode :1;
122}; 163};
123 164
124#define _IBMR(i2c) ((i2c)->reg_base + (0x0 << (i2c)->reg_shift)) 165#define _IBMR(i2c) ((i2c)->reg_ibmr)
125#define _IDBR(i2c) ((i2c)->reg_base + (0x4 << (i2c)->reg_shift)) 166#define _IDBR(i2c) ((i2c)->reg_idbr)
126#define _ICR(i2c) ((i2c)->reg_base + (0x8 << (i2c)->reg_shift)) 167#define _ICR(i2c) ((i2c)->reg_icr)
127#define _ISR(i2c) ((i2c)->reg_base + (0xc << (i2c)->reg_shift)) 168#define _ISR(i2c) ((i2c)->reg_isr)
128#define _ISAR(i2c) ((i2c)->reg_base + (0x10 << (i2c)->reg_shift)) 169#define _ISAR(i2c) ((i2c)->reg_isar)
129 170
130/* 171/*
131 * I2C Slave mode address 172 * I2C Slave mode address
@@ -418,7 +459,8 @@ static void i2c_pxa_reset(struct pxa_i2c *i2c)
418 writel(I2C_ISR_INIT, _ISR(i2c)); 459 writel(I2C_ISR_INIT, _ISR(i2c));
419 writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c)); 460 writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c));
420 461
421 writel(i2c->slave_addr, _ISAR(i2c)); 462 if (i2c->reg_isar)
463 writel(i2c->slave_addr, _ISAR(i2c));
422 464
423 /* set control register values */ 465 /* set control register values */
424 writel(I2C_ICR_INIT | (i2c->fast_mode ? ICR_FM : 0), _ICR(i2c)); 466 writel(I2C_ICR_INIT | (i2c->fast_mode ? ICR_FM : 0), _ICR(i2c));
@@ -729,8 +771,10 @@ static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
729 */ 771 */
730 ret = i2c->msg_idx; 772 ret = i2c->msg_idx;
731 773
732 if (timeout == 0) 774 if (!timeout && i2c->msg_num) {
733 i2c_pxa_scream_blue_murder(i2c, "timeout"); 775 i2c_pxa_scream_blue_murder(i2c, "timeout");
776 ret = I2C_RETRY;
777 }
734 778
735 out: 779 out:
736 return ret; 780 return ret;
@@ -915,11 +959,17 @@ static void i2c_pxa_irq_rxfull(struct pxa_i2c *i2c, u32 isr)
915 writel(icr, _ICR(i2c)); 959 writel(icr, _ICR(i2c));
916} 960}
917 961
962#define VALID_INT_SOURCE (ISR_SSD | ISR_ALD | ISR_ITE | ISR_IRF | \
963 ISR_SAD | ISR_BED)
918static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id) 964static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
919{ 965{
920 struct pxa_i2c *i2c = dev_id; 966 struct pxa_i2c *i2c = dev_id;
921 u32 isr = readl(_ISR(i2c)); 967 u32 isr = readl(_ISR(i2c));
922 968
969 isr &= VALID_INT_SOURCE;
970 if (!isr)
971 return IRQ_NONE;
972
923 if (i2c_debug > 2 && 0) { 973 if (i2c_debug > 2 && 0) {
924 dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n", 974 dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n",
925 __func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c))); 975 __func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c)));
@@ -934,7 +984,7 @@ static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
934 /* 984 /*
935 * Always clear all pending IRQs. 985 * Always clear all pending IRQs.
936 */ 986 */
937 writel(isr & (ISR_SSD|ISR_ALD|ISR_ITE|ISR_IRF|ISR_SAD|ISR_BED), _ISR(i2c)); 987 writel(isr, _ISR(i2c));
938 988
939 if (isr & ISR_SAD) 989 if (isr & ISR_SAD)
940 i2c_pxa_slave_start(i2c, isr); 990 i2c_pxa_slave_start(i2c, isr);
@@ -1001,6 +1051,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
1001 struct resource *res; 1051 struct resource *res;
1002 struct i2c_pxa_platform_data *plat = dev->dev.platform_data; 1052 struct i2c_pxa_platform_data *plat = dev->dev.platform_data;
1003 const struct platform_device_id *id = platform_get_device_id(dev); 1053 const struct platform_device_id *id = platform_get_device_id(dev);
1054 enum pxa_i2c_types i2c_type = id->driver_data;
1004 int ret; 1055 int ret;
1005 int irq; 1056 int irq;
1006 1057
@@ -1044,7 +1095,13 @@ static int i2c_pxa_probe(struct platform_device *dev)
1044 ret = -EIO; 1095 ret = -EIO;
1045 goto eremap; 1096 goto eremap;
1046 } 1097 }
1047 i2c->reg_shift = REG_SHIFT(id->driver_data); 1098
1099 i2c->reg_ibmr = i2c->reg_base + pxa_reg_layout[i2c_type].ibmr;
1100 i2c->reg_idbr = i2c->reg_base + pxa_reg_layout[i2c_type].idbr;
1101 i2c->reg_icr = i2c->reg_base + pxa_reg_layout[i2c_type].icr;
1102 i2c->reg_isr = i2c->reg_base + pxa_reg_layout[i2c_type].isr;
1103 if (i2c_type != REGS_CE4100)
1104 i2c->reg_isar = i2c->reg_base + pxa_reg_layout[i2c_type].isar;
1048 1105
1049 i2c->iobase = res->start; 1106 i2c->iobase = res->start;
1050 i2c->iosize = resource_size(res); 1107 i2c->iosize = resource_size(res);
@@ -1072,7 +1129,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
1072 i2c->adap.algo = &i2c_pxa_pio_algorithm; 1129 i2c->adap.algo = &i2c_pxa_pio_algorithm;
1073 } else { 1130 } else {
1074 i2c->adap.algo = &i2c_pxa_algorithm; 1131 i2c->adap.algo = &i2c_pxa_algorithm;
1075 ret = request_irq(irq, i2c_pxa_handler, IRQF_DISABLED, 1132 ret = request_irq(irq, i2c_pxa_handler, IRQF_SHARED,
1076 i2c->adap.name, i2c); 1133 i2c->adap.name, i2c);
1077 if (ret) 1134 if (ret)
1078 goto ereqirq; 1135 goto ereqirq;
@@ -1082,12 +1139,19 @@ static int i2c_pxa_probe(struct platform_device *dev)
1082 1139
1083 i2c->adap.algo_data = i2c; 1140 i2c->adap.algo_data = i2c;
1084 i2c->adap.dev.parent = &dev->dev; 1141 i2c->adap.dev.parent = &dev->dev;
1142#ifdef CONFIG_OF
1143 i2c->adap.dev.of_node = dev->dev.of_node;
1144#endif
1085 1145
1086 ret = i2c_add_numbered_adapter(&i2c->adap); 1146 if (i2c_type == REGS_CE4100)
1147 ret = i2c_add_adapter(&i2c->adap);
1148 else
1149 ret = i2c_add_numbered_adapter(&i2c->adap);
1087 if (ret < 0) { 1150 if (ret < 0) {
1088 printk(KERN_INFO "I2C: Failed to add bus\n"); 1151 printk(KERN_INFO "I2C: Failed to add bus\n");
1089 goto eadapt; 1152 goto eadapt;
1090 } 1153 }
1154 of_i2c_register_devices(&i2c->adap);
1091 1155
1092 platform_set_drvdata(dev, i2c); 1156 platform_set_drvdata(dev, i2c);
1093 1157
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
new file mode 100644
index 000000000000..3921f664c9c3
--- /dev/null
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -0,0 +1,700 @@
1/*
2 * drivers/i2c/busses/i2c-tegra.c
3 *
4 * Copyright (C) 2010 Google, Inc.
5 * Author: Colin Cross <ccross@android.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/clk.h>
22#include <linux/err.h>
23#include <linux/i2c.h>
24#include <linux/io.h>
25#include <linux/interrupt.h>
26#include <linux/delay.h>
27#include <linux/slab.h>
28#include <linux/i2c-tegra.h>
29
30#include <asm/unaligned.h>
31
32#include <mach/clk.h>
33
34#define TEGRA_I2C_TIMEOUT (msecs_to_jiffies(1000))
35#define BYTES_PER_FIFO_WORD 4
36
37#define I2C_CNFG 0x000
38#define I2C_CNFG_PACKET_MODE_EN (1<<10)
39#define I2C_CNFG_NEW_MASTER_FSM (1<<11)
40#define I2C_SL_CNFG 0x020
41#define I2C_SL_CNFG_NEWSL (1<<2)
42#define I2C_SL_ADDR1 0x02c
43#define I2C_TX_FIFO 0x050
44#define I2C_RX_FIFO 0x054
45#define I2C_PACKET_TRANSFER_STATUS 0x058
46#define I2C_FIFO_CONTROL 0x05c
47#define I2C_FIFO_CONTROL_TX_FLUSH (1<<1)
48#define I2C_FIFO_CONTROL_RX_FLUSH (1<<0)
49#define I2C_FIFO_CONTROL_TX_TRIG_SHIFT 5
50#define I2C_FIFO_CONTROL_RX_TRIG_SHIFT 2
51#define I2C_FIFO_STATUS 0x060
52#define I2C_FIFO_STATUS_TX_MASK 0xF0
53#define I2C_FIFO_STATUS_TX_SHIFT 4
54#define I2C_FIFO_STATUS_RX_MASK 0x0F
55#define I2C_FIFO_STATUS_RX_SHIFT 0
56#define I2C_INT_MASK 0x064
57#define I2C_INT_STATUS 0x068
58#define I2C_INT_PACKET_XFER_COMPLETE (1<<7)
59#define I2C_INT_ALL_PACKETS_XFER_COMPLETE (1<<6)
60#define I2C_INT_TX_FIFO_OVERFLOW (1<<5)
61#define I2C_INT_RX_FIFO_UNDERFLOW (1<<4)
62#define I2C_INT_NO_ACK (1<<3)
63#define I2C_INT_ARBITRATION_LOST (1<<2)
64#define I2C_INT_TX_FIFO_DATA_REQ (1<<1)
65#define I2C_INT_RX_FIFO_DATA_REQ (1<<0)
66#define I2C_CLK_DIVISOR 0x06c
67
68#define DVC_CTRL_REG1 0x000
69#define DVC_CTRL_REG1_INTR_EN (1<<10)
70#define DVC_CTRL_REG2 0x004
71#define DVC_CTRL_REG3 0x008
72#define DVC_CTRL_REG3_SW_PROG (1<<26)
73#define DVC_CTRL_REG3_I2C_DONE_INTR_EN (1<<30)
74#define DVC_STATUS 0x00c
75#define DVC_STATUS_I2C_DONE_INTR (1<<30)
76
77#define I2C_ERR_NONE 0x00
78#define I2C_ERR_NO_ACK 0x01
79#define I2C_ERR_ARBITRATION_LOST 0x02
80
81#define PACKET_HEADER0_HEADER_SIZE_SHIFT 28
82#define PACKET_HEADER0_PACKET_ID_SHIFT 16
83#define PACKET_HEADER0_CONT_ID_SHIFT 12
84#define PACKET_HEADER0_PROTOCOL_I2C (1<<4)
85
86#define I2C_HEADER_HIGHSPEED_MODE (1<<22)
87#define I2C_HEADER_CONT_ON_NAK (1<<21)
88#define I2C_HEADER_SEND_START_BYTE (1<<20)
89#define I2C_HEADER_READ (1<<19)
90#define I2C_HEADER_10BIT_ADDR (1<<18)
91#define I2C_HEADER_IE_ENABLE (1<<17)
92#define I2C_HEADER_REPEAT_START (1<<16)
93#define I2C_HEADER_MASTER_ADDR_SHIFT 12
94#define I2C_HEADER_SLAVE_ADDR_SHIFT 1
95
96/**
97 * struct tegra_i2c_dev - per device i2c context
98 * @dev: device reference for power management
99 * @adapter: core i2c layer adapter information
100 * @clk: clock reference for i2c controller
101 * @i2c_clk: clock reference for i2c bus
102 * @iomem: memory resource for registers
103 * @base: ioremapped registers cookie
104 * @cont_id: i2c controller id, used for for packet header
105 * @irq: irq number of transfer complete interrupt
106 * @is_dvc: identifies the DVC i2c controller, has a different register layout
107 * @msg_complete: transfer completion notifier
108 * @msg_err: error code for completed message
109 * @msg_buf: pointer to current message data
110 * @msg_buf_remaining: size of unsent data in the message buffer
111 * @msg_read: identifies read transfers
112 * @bus_clk_rate: current i2c bus clock rate
113 * @is_suspended: prevents i2c controller accesses after suspend is called
114 */
115struct tegra_i2c_dev {
116 struct device *dev;
117 struct i2c_adapter adapter;
118 struct clk *clk;
119 struct clk *i2c_clk;
120 struct resource *iomem;
121 void __iomem *base;
122 int cont_id;
123 int irq;
124 int is_dvc;
125 struct completion msg_complete;
126 int msg_err;
127 u8 *msg_buf;
128 size_t msg_buf_remaining;
129 int msg_read;
130 unsigned long bus_clk_rate;
131 bool is_suspended;
132};
133
134static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val, unsigned long reg)
135{
136 writel(val, i2c_dev->base + reg);
137}
138
139static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)
140{
141 return readl(i2c_dev->base + reg);
142}
143
144/*
145 * i2c_writel and i2c_readl will offset the register if necessary to talk
146 * to the I2C block inside the DVC block
147 */
148static unsigned long tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev,
149 unsigned long reg)
150{
151 if (i2c_dev->is_dvc)
152 reg += (reg >= I2C_TX_FIFO) ? 0x10 : 0x40;
153 return reg;
154}
155
156static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val,
157 unsigned long reg)
158{
159 writel(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
160}
161
162static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned long reg)
163{
164 return readl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg));
165}
166
167static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data,
168 unsigned long reg, int len)
169{
170 writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len);
171}
172
173static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data,
174 unsigned long reg, int len)
175{
176 readsl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len);
177}
178
179static void tegra_i2c_mask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask)
180{
181 u32 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK);
182 int_mask &= ~mask;
183 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK);
184}
185
186static void tegra_i2c_unmask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask)
187{
188 u32 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK);
189 int_mask |= mask;
190 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK);
191}
192
193static int tegra_i2c_flush_fifos(struct tegra_i2c_dev *i2c_dev)
194{
195 unsigned long timeout = jiffies + HZ;
196 u32 val = i2c_readl(i2c_dev, I2C_FIFO_CONTROL);
197 val |= I2C_FIFO_CONTROL_TX_FLUSH | I2C_FIFO_CONTROL_RX_FLUSH;
198 i2c_writel(i2c_dev, val, I2C_FIFO_CONTROL);
199
200 while (i2c_readl(i2c_dev, I2C_FIFO_CONTROL) &
201 (I2C_FIFO_CONTROL_TX_FLUSH | I2C_FIFO_CONTROL_RX_FLUSH)) {
202 if (time_after(jiffies, timeout)) {
203 dev_warn(i2c_dev->dev, "timeout waiting for fifo flush\n");
204 return -ETIMEDOUT;
205 }
206 msleep(1);
207 }
208 return 0;
209}
210
211static int tegra_i2c_empty_rx_fifo(struct tegra_i2c_dev *i2c_dev)
212{
213 u32 val;
214 int rx_fifo_avail;
215 u8 *buf = i2c_dev->msg_buf;
216 size_t buf_remaining = i2c_dev->msg_buf_remaining;
217 int words_to_transfer;
218
219 val = i2c_readl(i2c_dev, I2C_FIFO_STATUS);
220 rx_fifo_avail = (val & I2C_FIFO_STATUS_RX_MASK) >>
221 I2C_FIFO_STATUS_RX_SHIFT;
222
223 /* Rounds down to not include partial word at the end of buf */
224 words_to_transfer = buf_remaining / BYTES_PER_FIFO_WORD;
225 if (words_to_transfer > rx_fifo_avail)
226 words_to_transfer = rx_fifo_avail;
227
228 i2c_readsl(i2c_dev, buf, I2C_RX_FIFO, words_to_transfer);
229
230 buf += words_to_transfer * BYTES_PER_FIFO_WORD;
231 buf_remaining -= words_to_transfer * BYTES_PER_FIFO_WORD;
232 rx_fifo_avail -= words_to_transfer;
233
234 /*
235 * If there is a partial word at the end of buf, handle it manually to
236 * prevent overwriting past the end of buf
237 */
238 if (rx_fifo_avail > 0 && buf_remaining > 0) {
239 BUG_ON(buf_remaining > 3);
240 val = i2c_readl(i2c_dev, I2C_RX_FIFO);
241 memcpy(buf, &val, buf_remaining);
242 buf_remaining = 0;
243 rx_fifo_avail--;
244 }
245
246 BUG_ON(rx_fifo_avail > 0 && buf_remaining > 0);
247 i2c_dev->msg_buf_remaining = buf_remaining;
248 i2c_dev->msg_buf = buf;
249 return 0;
250}
251
252static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev)
253{
254 u32 val;
255 int tx_fifo_avail;
256 u8 *buf = i2c_dev->msg_buf;
257 size_t buf_remaining = i2c_dev->msg_buf_remaining;
258 int words_to_transfer;
259
260 val = i2c_readl(i2c_dev, I2C_FIFO_STATUS);
261 tx_fifo_avail = (val & I2C_FIFO_STATUS_TX_MASK) >>
262 I2C_FIFO_STATUS_TX_SHIFT;
263
264 /* Rounds down to not include partial word at the end of buf */
265 words_to_transfer = buf_remaining / BYTES_PER_FIFO_WORD;
266 if (words_to_transfer > tx_fifo_avail)
267 words_to_transfer = tx_fifo_avail;
268
269 i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer);
270
271 buf += words_to_transfer * BYTES_PER_FIFO_WORD;
272 buf_remaining -= words_to_transfer * BYTES_PER_FIFO_WORD;
273 tx_fifo_avail -= words_to_transfer;
274
275 /*
276 * If there is a partial word at the end of buf, handle it manually to
277 * prevent reading past the end of buf, which could cross a page
278 * boundary and fault.
279 */
280 if (tx_fifo_avail > 0 && buf_remaining > 0) {
281 BUG_ON(buf_remaining > 3);
282 memcpy(&val, buf, buf_remaining);
283 i2c_writel(i2c_dev, val, I2C_TX_FIFO);
284 buf_remaining = 0;
285 tx_fifo_avail--;
286 }
287
288 BUG_ON(tx_fifo_avail > 0 && buf_remaining > 0);
289 i2c_dev->msg_buf_remaining = buf_remaining;
290 i2c_dev->msg_buf = buf;
291 return 0;
292}
293
294/*
295 * One of the Tegra I2C blocks is inside the DVC (Digital Voltage Controller)
296 * block. This block is identical to the rest of the I2C blocks, except that
297 * it only supports master mode, it has registers moved around, and it needs
298 * some extra init to get it into I2C mode. The register moves are handled
299 * by i2c_readl and i2c_writel
300 */
301static void tegra_dvc_init(struct tegra_i2c_dev *i2c_dev)
302{
303 u32 val = 0;
304 val = dvc_readl(i2c_dev, DVC_CTRL_REG3);
305 val |= DVC_CTRL_REG3_SW_PROG;
306 val |= DVC_CTRL_REG3_I2C_DONE_INTR_EN;
307 dvc_writel(i2c_dev, val, DVC_CTRL_REG3);
308
309 val = dvc_readl(i2c_dev, DVC_CTRL_REG1);
310 val |= DVC_CTRL_REG1_INTR_EN;
311 dvc_writel(i2c_dev, val, DVC_CTRL_REG1);
312}
313
314static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)
315{
316 u32 val;
317 int err = 0;
318
319 clk_enable(i2c_dev->clk);
320
321 tegra_periph_reset_assert(i2c_dev->clk);
322 udelay(2);
323 tegra_periph_reset_deassert(i2c_dev->clk);
324
325 if (i2c_dev->is_dvc)
326 tegra_dvc_init(i2c_dev);
327
328 val = I2C_CNFG_NEW_MASTER_FSM | I2C_CNFG_PACKET_MODE_EN;
329 i2c_writel(i2c_dev, val, I2C_CNFG);
330 i2c_writel(i2c_dev, 0, I2C_INT_MASK);
331 clk_set_rate(i2c_dev->clk, i2c_dev->bus_clk_rate * 8);
332
333 val = 7 << I2C_FIFO_CONTROL_TX_TRIG_SHIFT |
334 0 << I2C_FIFO_CONTROL_RX_TRIG_SHIFT;
335 i2c_writel(i2c_dev, val, I2C_FIFO_CONTROL);
336
337 if (tegra_i2c_flush_fifos(i2c_dev))
338 err = -ETIMEDOUT;
339
340 clk_disable(i2c_dev->clk);
341 return err;
342}
343
344static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)
345{
346 u32 status;
347 const u32 status_err = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST;
348 struct tegra_i2c_dev *i2c_dev = dev_id;
349
350 status = i2c_readl(i2c_dev, I2C_INT_STATUS);
351
352 if (status == 0) {
353 dev_warn(i2c_dev->dev, "interrupt with no status\n");
354 return IRQ_NONE;
355 }
356
357 if (unlikely(status & status_err)) {
358 if (status & I2C_INT_NO_ACK)
359 i2c_dev->msg_err |= I2C_ERR_NO_ACK;
360 if (status & I2C_INT_ARBITRATION_LOST)
361 i2c_dev->msg_err |= I2C_ERR_ARBITRATION_LOST;
362 complete(&i2c_dev->msg_complete);
363 goto err;
364 }
365
366 if (i2c_dev->msg_read && (status & I2C_INT_RX_FIFO_DATA_REQ)) {
367 if (i2c_dev->msg_buf_remaining)
368 tegra_i2c_empty_rx_fifo(i2c_dev);
369 else
370 BUG();
371 }
372
373 if (!i2c_dev->msg_read && (status & I2C_INT_TX_FIFO_DATA_REQ)) {
374 if (i2c_dev->msg_buf_remaining)
375 tegra_i2c_fill_tx_fifo(i2c_dev);
376 else
377 tegra_i2c_mask_irq(i2c_dev, I2C_INT_TX_FIFO_DATA_REQ);
378 }
379
380 if ((status & I2C_INT_PACKET_XFER_COMPLETE) &&
381 !i2c_dev->msg_buf_remaining)
382 complete(&i2c_dev->msg_complete);
383
384 i2c_writel(i2c_dev, status, I2C_INT_STATUS);
385 if (i2c_dev->is_dvc)
386 dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);
387 return IRQ_HANDLED;
388err:
389 /* An error occured, mask all interrupts */
390 tegra_i2c_mask_irq(i2c_dev, I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST |
391 I2C_INT_PACKET_XFER_COMPLETE | I2C_INT_TX_FIFO_DATA_REQ |
392 I2C_INT_RX_FIFO_DATA_REQ);
393 i2c_writel(i2c_dev, status, I2C_INT_STATUS);
394 return IRQ_HANDLED;
395}
396
397static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
398 struct i2c_msg *msg, int stop)
399{
400 u32 packet_header;
401 u32 int_mask;
402 int ret;
403
404 tegra_i2c_flush_fifos(i2c_dev);
405 i2c_writel(i2c_dev, 0xFF, I2C_INT_STATUS);
406
407 if (msg->len == 0)
408 return -EINVAL;
409
410 i2c_dev->msg_buf = msg->buf;
411 i2c_dev->msg_buf_remaining = msg->len;
412 i2c_dev->msg_err = I2C_ERR_NONE;
413 i2c_dev->msg_read = (msg->flags & I2C_M_RD);
414 INIT_COMPLETION(i2c_dev->msg_complete);
415
416 packet_header = (0 << PACKET_HEADER0_HEADER_SIZE_SHIFT) |
417 PACKET_HEADER0_PROTOCOL_I2C |
418 (i2c_dev->cont_id << PACKET_HEADER0_CONT_ID_SHIFT) |
419 (1 << PACKET_HEADER0_PACKET_ID_SHIFT);
420 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);
421
422 packet_header = msg->len - 1;
423 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);
424
425 packet_header = msg->addr << I2C_HEADER_SLAVE_ADDR_SHIFT;
426 packet_header |= I2C_HEADER_IE_ENABLE;
427 if (msg->flags & I2C_M_TEN)
428 packet_header |= I2C_HEADER_10BIT_ADDR;
429 if (msg->flags & I2C_M_IGNORE_NAK)
430 packet_header |= I2C_HEADER_CONT_ON_NAK;
431 if (msg->flags & I2C_M_NOSTART)
432 packet_header |= I2C_HEADER_REPEAT_START;
433 if (msg->flags & I2C_M_RD)
434 packet_header |= I2C_HEADER_READ;
435 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO);
436
437 if (!(msg->flags & I2C_M_RD))
438 tegra_i2c_fill_tx_fifo(i2c_dev);
439
440 int_mask = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST;
441 if (msg->flags & I2C_M_RD)
442 int_mask |= I2C_INT_RX_FIFO_DATA_REQ;
443 else if (i2c_dev->msg_buf_remaining)
444 int_mask |= I2C_INT_TX_FIFO_DATA_REQ;
445 tegra_i2c_unmask_irq(i2c_dev, int_mask);
446 dev_dbg(i2c_dev->dev, "unmasked irq: %02x\n",
447 i2c_readl(i2c_dev, I2C_INT_MASK));
448
449 ret = wait_for_completion_timeout(&i2c_dev->msg_complete, TEGRA_I2C_TIMEOUT);
450 tegra_i2c_mask_irq(i2c_dev, int_mask);
451
452 if (WARN_ON(ret == 0)) {
453 dev_err(i2c_dev->dev, "i2c transfer timed out\n");
454
455 tegra_i2c_init(i2c_dev);
456 return -ETIMEDOUT;
457 }
458
459 dev_dbg(i2c_dev->dev, "transfer complete: %d %d %d\n",
460 ret, completion_done(&i2c_dev->msg_complete), i2c_dev->msg_err);
461
462 if (likely(i2c_dev->msg_err == I2C_ERR_NONE))
463 return 0;
464
465 tegra_i2c_init(i2c_dev);
466 if (i2c_dev->msg_err == I2C_ERR_NO_ACK) {
467 if (msg->flags & I2C_M_IGNORE_NAK)
468 return 0;
469 return -EREMOTEIO;
470 }
471
472 return -EIO;
473}
474
475static int tegra_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
476 int num)
477{
478 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
479 int i;
480 int ret = 0;
481
482 if (i2c_dev->is_suspended)
483 return -EBUSY;
484
485 clk_enable(i2c_dev->clk);
486 for (i = 0; i < num; i++) {
487 int stop = (i == (num - 1)) ? 1 : 0;
488 ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], stop);
489 if (ret)
490 break;
491 }
492 clk_disable(i2c_dev->clk);
493 return ret ?: i;
494}
495
496static u32 tegra_i2c_func(struct i2c_adapter *adap)
497{
498 return I2C_FUNC_I2C;
499}
500
501static const struct i2c_algorithm tegra_i2c_algo = {
502 .master_xfer = tegra_i2c_xfer,
503 .functionality = tegra_i2c_func,
504};
505
506static int tegra_i2c_probe(struct platform_device *pdev)
507{
508 struct tegra_i2c_dev *i2c_dev;
509 struct tegra_i2c_platform_data *pdata = pdev->dev.platform_data;
510 struct resource *res;
511 struct resource *iomem;
512 struct clk *clk;
513 struct clk *i2c_clk;
514 void *base;
515 int irq;
516 int ret = 0;
517
518 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
519 if (!res) {
520 dev_err(&pdev->dev, "no mem resource\n");
521 return -EINVAL;
522 }
523 iomem = request_mem_region(res->start, resource_size(res), pdev->name);
524 if (!iomem) {
525 dev_err(&pdev->dev, "I2C region already claimed\n");
526 return -EBUSY;
527 }
528
529 base = ioremap(iomem->start, resource_size(iomem));
530 if (!base) {
531 dev_err(&pdev->dev, "Cannot ioremap I2C region\n");
532 return -ENOMEM;
533 }
534
535 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
536 if (!res) {
537 dev_err(&pdev->dev, "no irq resource\n");
538 ret = -EINVAL;
539 goto err_iounmap;
540 }
541 irq = res->start;
542
543 clk = clk_get(&pdev->dev, NULL);
544 if (IS_ERR(clk)) {
545 dev_err(&pdev->dev, "missing controller clock");
546 ret = PTR_ERR(clk);
547 goto err_release_region;
548 }
549
550 i2c_clk = clk_get(&pdev->dev, "i2c");
551 if (IS_ERR(i2c_clk)) {
552 dev_err(&pdev->dev, "missing bus clock");
553 ret = PTR_ERR(i2c_clk);
554 goto err_clk_put;
555 }
556
557 i2c_dev = kzalloc(sizeof(struct tegra_i2c_dev), GFP_KERNEL);
558 if (!i2c_dev) {
559 ret = -ENOMEM;
560 goto err_i2c_clk_put;
561 }
562
563 i2c_dev->base = base;
564 i2c_dev->clk = clk;
565 i2c_dev->i2c_clk = i2c_clk;
566 i2c_dev->iomem = iomem;
567 i2c_dev->adapter.algo = &tegra_i2c_algo;
568 i2c_dev->irq = irq;
569 i2c_dev->cont_id = pdev->id;
570 i2c_dev->dev = &pdev->dev;
571 i2c_dev->bus_clk_rate = pdata ? pdata->bus_clk_rate : 100000;
572
573 if (pdev->id == 3)
574 i2c_dev->is_dvc = 1;
575 init_completion(&i2c_dev->msg_complete);
576
577 platform_set_drvdata(pdev, i2c_dev);
578
579 ret = tegra_i2c_init(i2c_dev);
580 if (ret) {
581 dev_err(&pdev->dev, "Failed to initialize i2c controller");
582 goto err_free;
583 }
584
585 ret = request_irq(i2c_dev->irq, tegra_i2c_isr, 0, pdev->name, i2c_dev);
586 if (ret) {
587 dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq);
588 goto err_free;
589 }
590
591 clk_enable(i2c_dev->i2c_clk);
592
593 i2c_set_adapdata(&i2c_dev->adapter, i2c_dev);
594 i2c_dev->adapter.owner = THIS_MODULE;
595 i2c_dev->adapter.class = I2C_CLASS_HWMON;
596 strlcpy(i2c_dev->adapter.name, "Tegra I2C adapter",
597 sizeof(i2c_dev->adapter.name));
598 i2c_dev->adapter.algo = &tegra_i2c_algo;
599 i2c_dev->adapter.dev.parent = &pdev->dev;
600 i2c_dev->adapter.nr = pdev->id;
601
602 ret = i2c_add_numbered_adapter(&i2c_dev->adapter);
603 if (ret) {
604 dev_err(&pdev->dev, "Failed to add I2C adapter\n");
605 goto err_free_irq;
606 }
607
608 return 0;
609err_free_irq:
610 free_irq(i2c_dev->irq, i2c_dev);
611err_free:
612 kfree(i2c_dev);
613err_i2c_clk_put:
614 clk_put(i2c_clk);
615err_clk_put:
616 clk_put(clk);
617err_release_region:
618 release_mem_region(iomem->start, resource_size(iomem));
619err_iounmap:
620 iounmap(base);
621 return ret;
622}
623
624static int tegra_i2c_remove(struct platform_device *pdev)
625{
626 struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
627 i2c_del_adapter(&i2c_dev->adapter);
628 free_irq(i2c_dev->irq, i2c_dev);
629 clk_put(i2c_dev->i2c_clk);
630 clk_put(i2c_dev->clk);
631 release_mem_region(i2c_dev->iomem->start,
632 resource_size(i2c_dev->iomem));
633 iounmap(i2c_dev->base);
634 kfree(i2c_dev);
635 return 0;
636}
637
638#ifdef CONFIG_PM
639static int tegra_i2c_suspend(struct platform_device *pdev, pm_message_t state)
640{
641 struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
642
643 i2c_lock_adapter(&i2c_dev->adapter);
644 i2c_dev->is_suspended = true;
645 i2c_unlock_adapter(&i2c_dev->adapter);
646
647 return 0;
648}
649
650static int tegra_i2c_resume(struct platform_device *pdev)
651{
652 struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
653 int ret;
654
655 i2c_lock_adapter(&i2c_dev->adapter);
656
657 ret = tegra_i2c_init(i2c_dev);
658
659 if (ret) {
660 i2c_unlock_adapter(&i2c_dev->adapter);
661 return ret;
662 }
663
664 i2c_dev->is_suspended = false;
665
666 i2c_unlock_adapter(&i2c_dev->adapter);
667
668 return 0;
669}
670#endif
671
672static struct platform_driver tegra_i2c_driver = {
673 .probe = tegra_i2c_probe,
674 .remove = tegra_i2c_remove,
675#ifdef CONFIG_PM
676 .suspend = tegra_i2c_suspend,
677 .resume = tegra_i2c_resume,
678#endif
679 .driver = {
680 .name = "tegra-i2c",
681 .owner = THIS_MODULE,
682 },
683};
684
685static int __init tegra_i2c_init_driver(void)
686{
687 return platform_driver_register(&tegra_i2c_driver);
688}
689
690static void __exit tegra_i2c_exit_driver(void)
691{
692 platform_driver_unregister(&tegra_i2c_driver);
693}
694
695subsys_initcall(tegra_i2c_init_driver);
696module_exit(tegra_i2c_exit_driver);
697
698MODULE_DESCRIPTION("nVidia Tegra2 I2C Bus Controller driver");
699MODULE_AUTHOR("Colin Cross");
700MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index f0bd5bcdf563..045ba6efea48 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -537,9 +537,7 @@ i2c_new_device(struct i2c_adapter *adap, struct i2c_board_info const *info)
537 client->dev.parent = &client->adapter->dev; 537 client->dev.parent = &client->adapter->dev;
538 client->dev.bus = &i2c_bus_type; 538 client->dev.bus = &i2c_bus_type;
539 client->dev.type = &i2c_client_type; 539 client->dev.type = &i2c_client_type;
540#ifdef CONFIG_OF
541 client->dev.of_node = info->of_node; 540 client->dev.of_node = info->of_node;
542#endif
543 541
544 dev_set_name(&client->dev, "%d-%04x", i2c_adapter_id(adap), 542 dev_set_name(&client->dev, "%d-%04x", i2c_adapter_id(adap),
545 client->addr); 543 client->addr);
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-24 19:59:54 -0500