diff options
Diffstat (limited to 'drivers/i2c')
-rw-r--r-- | drivers/i2c/busses/i2c-pnx.c | 132 |
1 files changed, 62 insertions, 70 deletions
diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c index 6b413c5300d3..181e69211e4f 100644 --- a/drivers/i2c/busses/i2c-pnx.c +++ b/drivers/i2c/busses/i2c-pnx.c | |||
@@ -52,10 +52,9 @@ static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data) | |||
52 | return (timeout <= 0); | 52 | return (timeout <= 0); |
53 | } | 53 | } |
54 | 54 | ||
55 | static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap) | 55 | static inline void i2c_pnx_arm_timer(struct i2c_pnx_algo_data *alg_data) |
56 | { | 56 | { |
57 | struct i2c_pnx_algo_data *data = adap->algo_data; | 57 | struct timer_list *timer = &alg_data->mif.timer; |
58 | struct timer_list *timer = &data->mif.timer; | ||
59 | int expires = I2C_PNX_TIMEOUT / (1000 / HZ); | 58 | int expires = I2C_PNX_TIMEOUT / (1000 / HZ); |
60 | 59 | ||
61 | if (expires <= 1) | 60 | if (expires <= 1) |
@@ -63,11 +62,11 @@ static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap) | |||
63 | 62 | ||
64 | del_timer_sync(timer); | 63 | del_timer_sync(timer); |
65 | 64 | ||
66 | dev_dbg(&adap->dev, "Timer armed at %lu plus %u jiffies.\n", | 65 | dev_dbg(&alg_data->adapter.dev, "Timer armed at %lu plus %u jiffies.\n", |
67 | jiffies, expires); | 66 | jiffies, expires); |
68 | 67 | ||
69 | timer->expires = jiffies + expires; | 68 | timer->expires = jiffies + expires; |
70 | timer->data = (unsigned long)adap; | 69 | timer->data = (unsigned long)&alg_data; |
71 | 70 | ||
72 | add_timer(timer); | 71 | add_timer(timer); |
73 | } | 72 | } |
@@ -79,34 +78,33 @@ static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap) | |||
79 | * | 78 | * |
80 | * Generate a START signal in the desired mode. | 79 | * Generate a START signal in the desired mode. |
81 | */ | 80 | */ |
82 | static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap) | 81 | static int i2c_pnx_start(unsigned char slave_addr, |
82 | struct i2c_pnx_algo_data *alg_data) | ||
83 | { | 83 | { |
84 | struct i2c_pnx_algo_data *alg_data = adap->algo_data; | 84 | dev_dbg(&alg_data->adapter.dev, "%s(): addr 0x%x mode %d\n", __func__, |
85 | |||
86 | dev_dbg(&adap->dev, "%s(): addr 0x%x mode %d\n", __func__, | ||
87 | slave_addr, alg_data->mif.mode); | 85 | slave_addr, alg_data->mif.mode); |
88 | 86 | ||
89 | /* Check for 7 bit slave addresses only */ | 87 | /* Check for 7 bit slave addresses only */ |
90 | if (slave_addr & ~0x7f) { | 88 | if (slave_addr & ~0x7f) { |
91 | dev_err(&adap->dev, "%s: Invalid slave address %x. " | 89 | dev_err(&alg_data->adapter.dev, "%s: Invalid slave address %x. " |
92 | "Only 7-bit addresses are supported\n", | 90 | "Only 7-bit addresses are supported\n", |
93 | adap->name, slave_addr); | 91 | alg_data->adapter.name, slave_addr); |
94 | return -EINVAL; | 92 | return -EINVAL; |
95 | } | 93 | } |
96 | 94 | ||
97 | /* First, make sure bus is idle */ | 95 | /* First, make sure bus is idle */ |
98 | if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) { | 96 | if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) { |
99 | /* Somebody else is monopolizing the bus */ | 97 | /* Somebody else is monopolizing the bus */ |
100 | dev_err(&adap->dev, "%s: Bus busy. Slave addr = %02x, " | 98 | dev_err(&alg_data->adapter.dev, "%s: Bus busy. Slave addr = %02x, " |
101 | "cntrl = %x, stat = %x\n", | 99 | "cntrl = %x, stat = %x\n", |
102 | adap->name, slave_addr, | 100 | alg_data->adapter.name, slave_addr, |
103 | ioread32(I2C_REG_CTL(alg_data)), | 101 | ioread32(I2C_REG_CTL(alg_data)), |
104 | ioread32(I2C_REG_STS(alg_data))); | 102 | ioread32(I2C_REG_STS(alg_data))); |
105 | return -EBUSY; | 103 | return -EBUSY; |
106 | } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) { | 104 | } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) { |
107 | /* Sorry, we lost the bus */ | 105 | /* Sorry, we lost the bus */ |
108 | dev_err(&adap->dev, "%s: Arbitration failure. " | 106 | dev_err(&alg_data->adapter.dev, "%s: Arbitration failure. " |
109 | "Slave addr = %02x\n", adap->name, slave_addr); | 107 | "Slave addr = %02x\n", alg_data->adapter.name, slave_addr); |
110 | return -EIO; | 108 | return -EIO; |
111 | } | 109 | } |
112 | 110 | ||
@@ -117,14 +115,14 @@ static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap) | |||
117 | iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi, | 115 | iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi, |
118 | I2C_REG_STS(alg_data)); | 116 | I2C_REG_STS(alg_data)); |
119 | 117 | ||
120 | dev_dbg(&adap->dev, "%s(): sending %#x\n", __func__, | 118 | dev_dbg(&alg_data->adapter.dev, "%s(): sending %#x\n", __func__, |
121 | (slave_addr << 1) | start_bit | alg_data->mif.mode); | 119 | (slave_addr << 1) | start_bit | alg_data->mif.mode); |
122 | 120 | ||
123 | /* Write the slave address, START bit and R/W bit */ | 121 | /* Write the slave address, START bit and R/W bit */ |
124 | iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode, | 122 | iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode, |
125 | I2C_REG_TX(alg_data)); | 123 | I2C_REG_TX(alg_data)); |
126 | 124 | ||
127 | dev_dbg(&adap->dev, "%s(): exit\n", __func__); | 125 | dev_dbg(&alg_data->adapter.dev, "%s(): exit\n", __func__); |
128 | 126 | ||
129 | return 0; | 127 | return 0; |
130 | } | 128 | } |
@@ -135,13 +133,12 @@ static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap) | |||
135 | * | 133 | * |
136 | * Generate a STOP signal to terminate the master transaction. | 134 | * Generate a STOP signal to terminate the master transaction. |
137 | */ | 135 | */ |
138 | static void i2c_pnx_stop(struct i2c_adapter *adap) | 136 | static void i2c_pnx_stop(struct i2c_pnx_algo_data *alg_data) |
139 | { | 137 | { |
140 | struct i2c_pnx_algo_data *alg_data = adap->algo_data; | ||
141 | /* Only 1 msec max timeout due to interrupt context */ | 138 | /* Only 1 msec max timeout due to interrupt context */ |
142 | long timeout = 1000; | 139 | long timeout = 1000; |
143 | 140 | ||
144 | dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n", | 141 | dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n", |
145 | __func__, ioread32(I2C_REG_STS(alg_data))); | 142 | __func__, ioread32(I2C_REG_STS(alg_data))); |
146 | 143 | ||
147 | /* Write a STOP bit to TX FIFO */ | 144 | /* Write a STOP bit to TX FIFO */ |
@@ -155,7 +152,7 @@ static void i2c_pnx_stop(struct i2c_adapter *adap) | |||
155 | timeout--; | 152 | timeout--; |
156 | } | 153 | } |
157 | 154 | ||
158 | dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n", | 155 | dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n", |
159 | __func__, ioread32(I2C_REG_STS(alg_data))); | 156 | __func__, ioread32(I2C_REG_STS(alg_data))); |
160 | } | 157 | } |
161 | 158 | ||
@@ -165,12 +162,11 @@ static void i2c_pnx_stop(struct i2c_adapter *adap) | |||
165 | * | 162 | * |
166 | * Sends one byte of data to the slave | 163 | * Sends one byte of data to the slave |
167 | */ | 164 | */ |
168 | static int i2c_pnx_master_xmit(struct i2c_adapter *adap) | 165 | static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data) |
169 | { | 166 | { |
170 | struct i2c_pnx_algo_data *alg_data = adap->algo_data; | ||
171 | u32 val; | 167 | u32 val; |
172 | 168 | ||
173 | dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n", | 169 | dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n", |
174 | __func__, ioread32(I2C_REG_STS(alg_data))); | 170 | __func__, ioread32(I2C_REG_STS(alg_data))); |
175 | 171 | ||
176 | if (alg_data->mif.len > 0) { | 172 | if (alg_data->mif.len > 0) { |
@@ -186,14 +182,14 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap) | |||
186 | alg_data->mif.len--; | 182 | alg_data->mif.len--; |
187 | iowrite32(val, I2C_REG_TX(alg_data)); | 183 | iowrite32(val, I2C_REG_TX(alg_data)); |
188 | 184 | ||
189 | dev_dbg(&adap->dev, "%s(): xmit %#x [%d]\n", __func__, | 185 | dev_dbg(&alg_data->adapter.dev, "%s(): xmit %#x [%d]\n", __func__, |
190 | val, alg_data->mif.len + 1); | 186 | val, alg_data->mif.len + 1); |
191 | 187 | ||
192 | if (alg_data->mif.len == 0) { | 188 | if (alg_data->mif.len == 0) { |
193 | if (alg_data->last) { | 189 | if (alg_data->last) { |
194 | /* Wait until the STOP is seen. */ | 190 | /* Wait until the STOP is seen. */ |
195 | if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) | 191 | if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) |
196 | dev_err(&adap->dev, "The bus is still " | 192 | dev_err(&alg_data->adapter.dev, "The bus is still " |
197 | "active after timeout\n"); | 193 | "active after timeout\n"); |
198 | } | 194 | } |
199 | /* Disable master interrupts */ | 195 | /* Disable master interrupts */ |
@@ -203,14 +199,14 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap) | |||
203 | 199 | ||
204 | del_timer_sync(&alg_data->mif.timer); | 200 | del_timer_sync(&alg_data->mif.timer); |
205 | 201 | ||
206 | dev_dbg(&adap->dev, "%s(): Waking up xfer routine.\n", | 202 | dev_dbg(&alg_data->adapter.dev, "%s(): Waking up xfer routine.\n", |
207 | __func__); | 203 | __func__); |
208 | 204 | ||
209 | complete(&alg_data->mif.complete); | 205 | complete(&alg_data->mif.complete); |
210 | } | 206 | } |
211 | } else if (alg_data->mif.len == 0) { | 207 | } else if (alg_data->mif.len == 0) { |
212 | /* zero-sized transfer */ | 208 | /* zero-sized transfer */ |
213 | i2c_pnx_stop(adap); | 209 | i2c_pnx_stop(alg_data); |
214 | 210 | ||
215 | /* Disable master interrupts. */ | 211 | /* Disable master interrupts. */ |
216 | iowrite32(ioread32(I2C_REG_CTL(alg_data)) & | 212 | iowrite32(ioread32(I2C_REG_CTL(alg_data)) & |
@@ -219,13 +215,13 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap) | |||
219 | 215 | ||
220 | /* Stop timer. */ | 216 | /* Stop timer. */ |
221 | del_timer_sync(&alg_data->mif.timer); | 217 | del_timer_sync(&alg_data->mif.timer); |
222 | dev_dbg(&adap->dev, "%s(): Waking up xfer routine after " | 218 | dev_dbg(&alg_data->adapter.dev, "%s(): Waking up xfer routine after " |
223 | "zero-xfer.\n", __func__); | 219 | "zero-xfer.\n", __func__); |
224 | 220 | ||
225 | complete(&alg_data->mif.complete); | 221 | complete(&alg_data->mif.complete); |
226 | } | 222 | } |
227 | 223 | ||
228 | dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n", | 224 | dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n", |
229 | __func__, ioread32(I2C_REG_STS(alg_data))); | 225 | __func__, ioread32(I2C_REG_STS(alg_data))); |
230 | 226 | ||
231 | return 0; | 227 | return 0; |
@@ -237,20 +233,19 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap) | |||
237 | * | 233 | * |
238 | * Reads one byte data from the slave | 234 | * Reads one byte data from the slave |
239 | */ | 235 | */ |
240 | static int i2c_pnx_master_rcv(struct i2c_adapter *adap) | 236 | static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data) |
241 | { | 237 | { |
242 | struct i2c_pnx_algo_data *alg_data = adap->algo_data; | ||
243 | unsigned int val = 0; | 238 | unsigned int val = 0; |
244 | u32 ctl = 0; | 239 | u32 ctl = 0; |
245 | 240 | ||
246 | dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n", | 241 | dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n", |
247 | __func__, ioread32(I2C_REG_STS(alg_data))); | 242 | __func__, ioread32(I2C_REG_STS(alg_data))); |
248 | 243 | ||
249 | /* Check, whether there is already data, | 244 | /* Check, whether there is already data, |
250 | * or we didn't 'ask' for it yet. | 245 | * or we didn't 'ask' for it yet. |
251 | */ | 246 | */ |
252 | if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) { | 247 | if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) { |
253 | dev_dbg(&adap->dev, "%s(): Write dummy data to fill " | 248 | dev_dbg(&alg_data->adapter.dev, "%s(): Write dummy data to fill " |
254 | "Rx-fifo...\n", __func__); | 249 | "Rx-fifo...\n", __func__); |
255 | 250 | ||
256 | if (alg_data->mif.len == 1) { | 251 | if (alg_data->mif.len == 1) { |
@@ -283,7 +278,7 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap) | |||
283 | if (alg_data->mif.len > 0) { | 278 | if (alg_data->mif.len > 0) { |
284 | val = ioread32(I2C_REG_RX(alg_data)); | 279 | val = ioread32(I2C_REG_RX(alg_data)); |
285 | *alg_data->mif.buf++ = (u8) (val & 0xff); | 280 | *alg_data->mif.buf++ = (u8) (val & 0xff); |
286 | dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]\n", __func__, val, | 281 | dev_dbg(&alg_data->adapter.dev, "%s(): rcv 0x%x [%d]\n", __func__, val, |
287 | alg_data->mif.len); | 282 | alg_data->mif.len); |
288 | 283 | ||
289 | alg_data->mif.len--; | 284 | alg_data->mif.len--; |
@@ -291,7 +286,7 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap) | |||
291 | if (alg_data->last) | 286 | if (alg_data->last) |
292 | /* Wait until the STOP is seen. */ | 287 | /* Wait until the STOP is seen. */ |
293 | if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) | 288 | if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) |
294 | dev_err(&adap->dev, "The bus is still " | 289 | dev_err(&alg_data->adapter.dev, "The bus is still " |
295 | "active after timeout\n"); | 290 | "active after timeout\n"); |
296 | 291 | ||
297 | /* Disable master interrupts */ | 292 | /* Disable master interrupts */ |
@@ -306,7 +301,7 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap) | |||
306 | } | 301 | } |
307 | } | 302 | } |
308 | 303 | ||
309 | dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n", | 304 | dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n", |
310 | __func__, ioread32(I2C_REG_STS(alg_data))); | 305 | __func__, ioread32(I2C_REG_STS(alg_data))); |
311 | 306 | ||
312 | return 0; | 307 | return 0; |
@@ -314,11 +309,10 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap) | |||
314 | 309 | ||
315 | static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id) | 310 | static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id) |
316 | { | 311 | { |
312 | struct i2c_pnx_algo_data *alg_data = dev_id; | ||
317 | u32 stat, ctl; | 313 | u32 stat, ctl; |
318 | struct i2c_adapter *adap = dev_id; | ||
319 | struct i2c_pnx_algo_data *alg_data = adap->algo_data; | ||
320 | 314 | ||
321 | dev_dbg(&adap->dev, "%s(): mstat = %x mctrl = %x, mode = %d\n", | 315 | dev_dbg(&alg_data->adapter.dev, "%s(): mstat = %x mctrl = %x, mode = %d\n", |
322 | __func__, | 316 | __func__, |
323 | ioread32(I2C_REG_STS(alg_data)), | 317 | ioread32(I2C_REG_STS(alg_data)), |
324 | ioread32(I2C_REG_CTL(alg_data)), | 318 | ioread32(I2C_REG_CTL(alg_data)), |
@@ -341,10 +335,10 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id) | |||
341 | complete(&alg_data->mif.complete); | 335 | complete(&alg_data->mif.complete); |
342 | } else if (stat & mstatus_nai) { | 336 | } else if (stat & mstatus_nai) { |
343 | /* Slave did not acknowledge, generate a STOP */ | 337 | /* Slave did not acknowledge, generate a STOP */ |
344 | dev_dbg(&adap->dev, "%s(): " | 338 | dev_dbg(&alg_data->adapter.dev, "%s(): " |
345 | "Slave did not acknowledge, generating a STOP.\n", | 339 | "Slave did not acknowledge, generating a STOP.\n", |
346 | __func__); | 340 | __func__); |
347 | i2c_pnx_stop(adap); | 341 | i2c_pnx_stop(alg_data); |
348 | 342 | ||
349 | /* Disable master interrupts. */ | 343 | /* Disable master interrupts. */ |
350 | ctl = ioread32(I2C_REG_CTL(alg_data)); | 344 | ctl = ioread32(I2C_REG_CTL(alg_data)); |
@@ -370,9 +364,9 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id) | |||
370 | */ | 364 | */ |
371 | if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) { | 365 | if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) { |
372 | if (alg_data->mif.mode == I2C_SMBUS_WRITE) { | 366 | if (alg_data->mif.mode == I2C_SMBUS_WRITE) { |
373 | i2c_pnx_master_xmit(adap); | 367 | i2c_pnx_master_xmit(alg_data); |
374 | } else if (alg_data->mif.mode == I2C_SMBUS_READ) { | 368 | } else if (alg_data->mif.mode == I2C_SMBUS_READ) { |
375 | i2c_pnx_master_rcv(adap); | 369 | i2c_pnx_master_rcv(alg_data); |
376 | } | 370 | } |
377 | } | 371 | } |
378 | } | 372 | } |
@@ -381,7 +375,7 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id) | |||
381 | stat = ioread32(I2C_REG_STS(alg_data)); | 375 | stat = ioread32(I2C_REG_STS(alg_data)); |
382 | iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data)); | 376 | iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data)); |
383 | 377 | ||
384 | dev_dbg(&adap->dev, "%s(): exiting, stat = %x ctrl = %x.\n", | 378 | dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x ctrl = %x.\n", |
385 | __func__, ioread32(I2C_REG_STS(alg_data)), | 379 | __func__, ioread32(I2C_REG_STS(alg_data)), |
386 | ioread32(I2C_REG_CTL(alg_data))); | 380 | ioread32(I2C_REG_CTL(alg_data))); |
387 | 381 | ||
@@ -390,11 +384,10 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id) | |||
390 | 384 | ||
391 | static void i2c_pnx_timeout(unsigned long data) | 385 | static void i2c_pnx_timeout(unsigned long data) |
392 | { | 386 | { |
393 | struct i2c_adapter *adap = (struct i2c_adapter *)data; | 387 | struct i2c_pnx_algo_data *alg_data = (struct i2c_pnx_algo_data *)data; |
394 | struct i2c_pnx_algo_data *alg_data = adap->algo_data; | ||
395 | u32 ctl; | 388 | u32 ctl; |
396 | 389 | ||
397 | dev_err(&adap->dev, "Master timed out. stat = %04x, cntrl = %04x. " | 390 | dev_err(&alg_data->adapter.dev, "Master timed out. stat = %04x, cntrl = %04x. " |
398 | "Resetting master...\n", | 391 | "Resetting master...\n", |
399 | ioread32(I2C_REG_STS(alg_data)), | 392 | ioread32(I2C_REG_STS(alg_data)), |
400 | ioread32(I2C_REG_CTL(alg_data))); | 393 | ioread32(I2C_REG_CTL(alg_data))); |
@@ -411,15 +404,14 @@ static void i2c_pnx_timeout(unsigned long data) | |||
411 | complete(&alg_data->mif.complete); | 404 | complete(&alg_data->mif.complete); |
412 | } | 405 | } |
413 | 406 | ||
414 | static inline void bus_reset_if_active(struct i2c_adapter *adap) | 407 | static inline void bus_reset_if_active(struct i2c_pnx_algo_data *alg_data) |
415 | { | 408 | { |
416 | struct i2c_pnx_algo_data *alg_data = adap->algo_data; | ||
417 | u32 stat; | 409 | u32 stat; |
418 | 410 | ||
419 | if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) { | 411 | if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) { |
420 | dev_err(&adap->dev, | 412 | dev_err(&alg_data->adapter.dev, |
421 | "%s: Bus is still active after xfer. Reset it...\n", | 413 | "%s: Bus is still active after xfer. Reset it...\n", |
422 | adap->name); | 414 | alg_data->adapter.name); |
423 | iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset, | 415 | iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset, |
424 | I2C_REG_CTL(alg_data)); | 416 | I2C_REG_CTL(alg_data)); |
425 | wait_reset(I2C_PNX_TIMEOUT, alg_data); | 417 | wait_reset(I2C_PNX_TIMEOUT, alg_data); |
@@ -453,10 +445,10 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) | |||
453 | struct i2c_pnx_algo_data *alg_data = adap->algo_data; | 445 | struct i2c_pnx_algo_data *alg_data = adap->algo_data; |
454 | u32 stat = ioread32(I2C_REG_STS(alg_data)); | 446 | u32 stat = ioread32(I2C_REG_STS(alg_data)); |
455 | 447 | ||
456 | dev_dbg(&adap->dev, "%s(): entering: %d messages, stat = %04x.\n", | 448 | dev_dbg(&alg_data->adapter.dev, "%s(): entering: %d messages, stat = %04x.\n", |
457 | __func__, num, ioread32(I2C_REG_STS(alg_data))); | 449 | __func__, num, ioread32(I2C_REG_STS(alg_data))); |
458 | 450 | ||
459 | bus_reset_if_active(adap); | 451 | bus_reset_if_active(alg_data); |
460 | 452 | ||
461 | /* Process transactions in a loop. */ | 453 | /* Process transactions in a loop. */ |
462 | for (i = 0; rc >= 0 && i < num; i++) { | 454 | for (i = 0; rc >= 0 && i < num; i++) { |
@@ -466,9 +458,9 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) | |||
466 | addr = pmsg->addr; | 458 | addr = pmsg->addr; |
467 | 459 | ||
468 | if (pmsg->flags & I2C_M_TEN) { | 460 | if (pmsg->flags & I2C_M_TEN) { |
469 | dev_err(&adap->dev, | 461 | dev_err(&alg_data->adapter.dev, |
470 | "%s: 10 bits addr not supported!\n", | 462 | "%s: 10 bits addr not supported!\n", |
471 | adap->name); | 463 | alg_data->adapter.name); |
472 | rc = -EINVAL; | 464 | rc = -EINVAL; |
473 | break; | 465 | break; |
474 | } | 466 | } |
@@ -480,11 +472,11 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) | |||
480 | alg_data->mif.ret = 0; | 472 | alg_data->mif.ret = 0; |
481 | alg_data->last = (i == num - 1); | 473 | alg_data->last = (i == num - 1); |
482 | 474 | ||
483 | dev_dbg(&adap->dev, "%s(): mode %d, %d bytes\n", __func__, | 475 | dev_dbg(&alg_data->adapter.dev, "%s(): mode %d, %d bytes\n", __func__, |
484 | alg_data->mif.mode, | 476 | alg_data->mif.mode, |
485 | alg_data->mif.len); | 477 | alg_data->mif.len); |
486 | 478 | ||
487 | i2c_pnx_arm_timer(adap); | 479 | i2c_pnx_arm_timer(alg_data); |
488 | 480 | ||
489 | /* initialize the completion var */ | 481 | /* initialize the completion var */ |
490 | init_completion(&alg_data->mif.complete); | 482 | init_completion(&alg_data->mif.complete); |
@@ -495,7 +487,7 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) | |||
495 | I2C_REG_CTL(alg_data)); | 487 | I2C_REG_CTL(alg_data)); |
496 | 488 | ||
497 | /* Put start-code and slave-address on the bus. */ | 489 | /* Put start-code and slave-address on the bus. */ |
498 | rc = i2c_pnx_start(addr, adap); | 490 | rc = i2c_pnx_start(addr, alg_data); |
499 | if (rc < 0) | 491 | if (rc < 0) |
500 | break; | 492 | break; |
501 | 493 | ||
@@ -504,31 +496,31 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) | |||
504 | 496 | ||
505 | if (!(rc = alg_data->mif.ret)) | 497 | if (!(rc = alg_data->mif.ret)) |
506 | completed++; | 498 | completed++; |
507 | dev_dbg(&adap->dev, "%s(): Complete, return code = %d.\n", | 499 | dev_dbg(&alg_data->adapter.dev, "%s(): Complete, return code = %d.\n", |
508 | __func__, rc); | 500 | __func__, rc); |
509 | 501 | ||
510 | /* Clear TDI and AFI bits in case they are set. */ | 502 | /* Clear TDI and AFI bits in case they are set. */ |
511 | if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) { | 503 | if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) { |
512 | dev_dbg(&adap->dev, | 504 | dev_dbg(&alg_data->adapter.dev, |
513 | "%s: TDI still set... clearing now.\n", | 505 | "%s: TDI still set... clearing now.\n", |
514 | adap->name); | 506 | alg_data->adapter.name); |
515 | iowrite32(stat, I2C_REG_STS(alg_data)); | 507 | iowrite32(stat, I2C_REG_STS(alg_data)); |
516 | } | 508 | } |
517 | if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) { | 509 | if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) { |
518 | dev_dbg(&adap->dev, | 510 | dev_dbg(&alg_data->adapter.dev, |
519 | "%s: AFI still set... clearing now.\n", | 511 | "%s: AFI still set... clearing now.\n", |
520 | adap->name); | 512 | alg_data->adapter.name); |
521 | iowrite32(stat, I2C_REG_STS(alg_data)); | 513 | iowrite32(stat, I2C_REG_STS(alg_data)); |
522 | } | 514 | } |
523 | } | 515 | } |
524 | 516 | ||
525 | bus_reset_if_active(adap); | 517 | bus_reset_if_active(alg_data); |
526 | 518 | ||
527 | /* Cleanup to be sure... */ | 519 | /* Cleanup to be sure... */ |
528 | alg_data->mif.buf = NULL; | 520 | alg_data->mif.buf = NULL; |
529 | alg_data->mif.len = 0; | 521 | alg_data->mif.len = 0; |
530 | 522 | ||
531 | dev_dbg(&adap->dev, "%s(): exiting, stat = %x\n", | 523 | dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x\n", |
532 | __func__, ioread32(I2C_REG_STS(alg_data))); | 524 | __func__, ioread32(I2C_REG_STS(alg_data))); |
533 | 525 | ||
534 | if (completed != num) | 526 | if (completed != num) |
@@ -609,7 +601,7 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev) | |||
609 | 601 | ||
610 | init_timer(&alg_data->mif.timer); | 602 | init_timer(&alg_data->mif.timer); |
611 | alg_data->mif.timer.function = i2c_pnx_timeout; | 603 | alg_data->mif.timer.function = i2c_pnx_timeout; |
612 | alg_data->mif.timer.data = (unsigned long)&alg_data->adapter; | 604 | alg_data->mif.timer.data = (unsigned long)alg_data; |
613 | 605 | ||
614 | /* Register I/O resource */ | 606 | /* Register I/O resource */ |
615 | if (!request_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE, | 607 | if (!request_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE, |
@@ -657,7 +649,7 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev) | |||
657 | init_completion(&alg_data->mif.complete); | 649 | init_completion(&alg_data->mif.complete); |
658 | 650 | ||
659 | ret = request_irq(i2c_pnx->irq, i2c_pnx_interrupt, | 651 | ret = request_irq(i2c_pnx->irq, i2c_pnx_interrupt, |
660 | 0, pdev->name, &alg_data->adapter); | 652 | 0, pdev->name, alg_data); |
661 | if (ret) | 653 | if (ret) |
662 | goto out_clock; | 654 | goto out_clock; |
663 | 655 | ||
@@ -674,7 +666,7 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev) | |||
674 | return 0; | 666 | return 0; |
675 | 667 | ||
676 | out_irq: | 668 | out_irq: |
677 | free_irq(i2c_pnx->irq, &alg_data->adapter); | 669 | free_irq(i2c_pnx->irq, alg_data); |
678 | out_clock: | 670 | out_clock: |
679 | clk_disable(alg_data->clk); | 671 | clk_disable(alg_data->clk); |
680 | out_unmap: | 672 | out_unmap: |
@@ -696,7 +688,7 @@ static int __devexit i2c_pnx_remove(struct platform_device *pdev) | |||
696 | struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev); | 688 | struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev); |
697 | struct i2c_pnx_data *i2c_pnx = alg_data->i2c_pnx; | 689 | struct i2c_pnx_data *i2c_pnx = alg_data->i2c_pnx; |
698 | 690 | ||
699 | free_irq(i2c_pnx->irq, &alg_data->adapter); | 691 | free_irq(i2c_pnx->irq, alg_data); |
700 | i2c_del_adapter(&alg_data->adapter); | 692 | i2c_del_adapter(&alg_data->adapter); |
701 | clk_disable(alg_data->clk); | 693 | clk_disable(alg_data->clk); |
702 | iounmap(alg_data->ioaddr); | 694 | iounmap(alg_data->ioaddr); |