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-rw-r--r--drivers/i2c/algos/Kconfig11
-rw-r--r--drivers/i2c/algos/Makefile1
-rw-r--r--drivers/i2c/algos/i2c-algo-bit.c8
-rw-r--r--drivers/i2c/algos/i2c-algo-ite.c806
-rw-r--r--drivers/i2c/algos/i2c-algo-ite.h117
-rw-r--r--drivers/i2c/algos/i2c-algo-pca.c7
-rw-r--r--drivers/i2c/algos/i2c-algo-pcf.c8
-rw-r--r--drivers/i2c/algos/i2c-algo-sgi.c8
-rw-r--r--drivers/i2c/busses/Kconfig49
-rw-r--r--drivers/i2c/busses/Makefile4
-rw-r--r--drivers/i2c/busses/i2c-at91.c325
-rw-r--r--drivers/i2c/busses/i2c-elektor.c2
-rw-r--r--drivers/i2c/busses/i2c-hydra.c2
-rw-r--r--drivers/i2c/busses/i2c-i801.c16
-rw-r--r--drivers/i2c/busses/i2c-i810.c6
-rw-r--r--drivers/i2c/busses/i2c-ibm_iic.c9
-rw-r--r--drivers/i2c/busses/i2c-ite.c278
-rw-r--r--drivers/i2c/busses/i2c-ixp2000.c2
-rw-r--r--drivers/i2c/busses/i2c-ixp4xx.c2
-rw-r--r--drivers/i2c/busses/i2c-nforce2.c89
-rw-r--r--drivers/i2c/busses/i2c-omap.c4
-rw-r--r--drivers/i2c/busses/i2c-parport-light.c2
-rw-r--r--drivers/i2c/busses/i2c-parport.c2
-rw-r--r--drivers/i2c/busses/i2c-pca-isa.c2
-rw-r--r--drivers/i2c/busses/i2c-pnx.c708
-rw-r--r--drivers/i2c/busses/i2c-prosavage.c2
-rw-r--r--drivers/i2c/busses/i2c-savage4.c2
-rw-r--r--drivers/i2c/busses/i2c-versatile.c153
-rw-r--r--drivers/i2c/busses/i2c-via.c2
-rw-r--r--drivers/i2c/busses/i2c-voodoo3.c6
-rw-r--r--drivers/i2c/busses/scx200_i2c.c2
-rw-r--r--drivers/i2c/chips/ds1337.c8
-rw-r--r--drivers/i2c/i2c-core.c67
-rw-r--r--drivers/i2c/i2c-dev.c44
34 files changed, 1340 insertions, 1414 deletions
diff --git a/drivers/i2c/algos/Kconfig b/drivers/i2c/algos/Kconfig
index c034820615bb..af0203409dd1 100644
--- a/drivers/i2c/algos/Kconfig
+++ b/drivers/i2c/algos/Kconfig
@@ -38,17 +38,6 @@ config I2C_ALGOPCA
38 This support is also available as a module. If so, the module 38 This support is also available as a module. If so, the module
39 will be called i2c-algo-pca. 39 will be called i2c-algo-pca.
40 40
41config I2C_ALGOITE
42 tristate "ITE I2C Algorithm"
43 depends on MIPS_ITE8172 && I2C
44 help
45 This supports the use of the ITE8172 I2C interface found on some MIPS
46 systems. Say Y if you have one of these. You should also say Y for
47 the ITE I2C peripheral driver support below.
48
49 This support is also available as a module. If so, the module
50 will be called i2c-algo-ite.
51
52config I2C_ALGO8XX 41config I2C_ALGO8XX
53 tristate "MPC8xx CPM I2C interface" 42 tristate "MPC8xx CPM I2C interface"
54 depends on 8xx && I2C 43 depends on 8xx && I2C
diff --git a/drivers/i2c/algos/Makefile b/drivers/i2c/algos/Makefile
index 208be04a3dbd..cac1051bd4f1 100644
--- a/drivers/i2c/algos/Makefile
+++ b/drivers/i2c/algos/Makefile
@@ -5,7 +5,6 @@
5obj-$(CONFIG_I2C_ALGOBIT) += i2c-algo-bit.o 5obj-$(CONFIG_I2C_ALGOBIT) += i2c-algo-bit.o
6obj-$(CONFIG_I2C_ALGOPCF) += i2c-algo-pcf.o 6obj-$(CONFIG_I2C_ALGOPCF) += i2c-algo-pcf.o
7obj-$(CONFIG_I2C_ALGOPCA) += i2c-algo-pca.o 7obj-$(CONFIG_I2C_ALGOPCA) += i2c-algo-pca.o
8obj-$(CONFIG_I2C_ALGOITE) += i2c-algo-ite.o
9obj-$(CONFIG_I2C_ALGO_SGI) += i2c-algo-sgi.o 8obj-$(CONFIG_I2C_ALGO_SGI) += i2c-algo-sgi.o
10 9
11ifeq ($(CONFIG_I2C_DEBUG_ALGO),y) 10ifeq ($(CONFIG_I2C_DEBUG_ALGO),y)
diff --git a/drivers/i2c/algos/i2c-algo-bit.c b/drivers/i2c/algos/i2c-algo-bit.c
index 21c36bfb5e6b..95aa5395a5be 100644
--- a/drivers/i2c/algos/i2c-algo-bit.c
+++ b/drivers/i2c/algos/i2c-algo-bit.c
@@ -540,15 +540,7 @@ int i2c_bit_add_bus(struct i2c_adapter *adap)
540 540
541 return i2c_add_adapter(adap); 541 return i2c_add_adapter(adap);
542} 542}
543
544
545int i2c_bit_del_bus(struct i2c_adapter *adap)
546{
547 return i2c_del_adapter(adap);
548}
549
550EXPORT_SYMBOL(i2c_bit_add_bus); 543EXPORT_SYMBOL(i2c_bit_add_bus);
551EXPORT_SYMBOL(i2c_bit_del_bus);
552 544
553MODULE_AUTHOR("Simon G. Vogl <simon@tk.uni-linz.ac.at>"); 545MODULE_AUTHOR("Simon G. Vogl <simon@tk.uni-linz.ac.at>");
554MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm"); 546MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm");
diff --git a/drivers/i2c/algos/i2c-algo-ite.c b/drivers/i2c/algos/i2c-algo-ite.c
deleted file mode 100644
index 70d8eefb5efc..000000000000
--- a/drivers/i2c/algos/i2c-algo-ite.c
+++ /dev/null
@@ -1,806 +0,0 @@
1/*
2 -------------------------------------------------------------------------
3 i2c-algo-ite.c i2c driver algorithms for ITE adapters
4
5 Hai-Pao Fan, MontaVista Software, Inc.
6 hpfan@mvista.com or source@mvista.com
7
8 Copyright 2000 MontaVista Software Inc.
9
10 ---------------------------------------------------------------------------
11 This file was highly leveraged from i2c-algo-pcf.c, which was created
12 by Simon G. Vogl and Hans Berglund:
13
14
15 Copyright (C) 1995-1997 Simon G. Vogl
16 1998-2000 Hans Berglund
17
18 This program is free software; you can redistribute it and/or modify
19 it under the terms of the GNU General Public License as published by
20 the Free Software Foundation; either version 2 of the License, or
21 (at your option) any later version.
22
23 This program is distributed in the hope that it will be useful,
24 but WITHOUT ANY WARRANTY; without even the implied warranty of
25 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 GNU General Public License for more details.
27
28 You should have received a copy of the GNU General Public License
29 along with this program; if not, write to the Free Software
30 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
31/* ------------------------------------------------------------------------- */
32
33/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
34 Frodo Looijaard <frodol@dds.nl> ,and also from Martin Bailey
35 <mbailey@littlefeet-inc.com> */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/delay.h>
40#include <linux/slab.h>
41#include <linux/init.h>
42#include <asm/uaccess.h>
43#include <linux/ioport.h>
44#include <linux/errno.h>
45#include <linux/sched.h>
46
47#include <linux/i2c.h>
48#include <linux/i2c-algo-ite.h>
49#include "i2c-algo-ite.h"
50
51#define PM_DSR IT8172_PCI_IO_BASE + IT_PM_DSR
52#define PM_IBSR IT8172_PCI_IO_BASE + IT_PM_DSR + 0x04
53#define GPIO_CCR IT8172_PCI_IO_BASE + IT_GPCCR
54
55#define DEB2(x) if (i2c_debug>=2) x
56#define DEB3(x) if (i2c_debug>=3) x /* print several statistical values*/
57#define DEF_TIMEOUT 16
58
59
60/* module parameters:
61 */
62static int i2c_debug;
63static int iic_test; /* see if the line-setting functions work */
64
65/* --- setting states on the bus with the right timing: --------------- */
66
67#define get_clock(adap) adap->getclock(adap->data)
68#define iic_outw(adap, reg, val) adap->setiic(adap->data, reg, val)
69#define iic_inw(adap, reg) adap->getiic(adap->data, reg)
70
71
72/* --- other auxiliary functions -------------------------------------- */
73
74static void iic_start(struct i2c_algo_iic_data *adap)
75{
76 iic_outw(adap,ITE_I2CHCR,ITE_CMD);
77}
78
79static void iic_stop(struct i2c_algo_iic_data *adap)
80{
81 iic_outw(adap,ITE_I2CHCR,0);
82 iic_outw(adap,ITE_I2CHSR,ITE_I2CHSR_TDI);
83}
84
85static void iic_reset(struct i2c_algo_iic_data *adap)
86{
87 iic_outw(adap, PM_IBSR, iic_inw(adap, PM_IBSR) | 0x80);
88}
89
90
91static int wait_for_bb(struct i2c_algo_iic_data *adap)
92{
93 int timeout = DEF_TIMEOUT;
94 short status;
95
96 status = iic_inw(adap, ITE_I2CHSR);
97#ifndef STUB_I2C
98 while (timeout-- && (status & ITE_I2CHSR_HB)) {
99 udelay(1000); /* How much is this? */
100 status = iic_inw(adap, ITE_I2CHSR);
101 }
102#endif
103 if (timeout<=0) {
104 printk(KERN_ERR "Timeout, host is busy\n");
105 iic_reset(adap);
106 }
107 return(timeout<=0);
108}
109
110/* After we issue a transaction on the IIC bus, this function
111 * is called. It puts this process to sleep until we get an interrupt from
112 * from the controller telling us that the transaction we requested in complete.
113 */
114static int wait_for_pin(struct i2c_algo_iic_data *adap, short *status) {
115
116 int timeout = DEF_TIMEOUT;
117
118 timeout = wait_for_bb(adap);
119 if (timeout) {
120 DEB2(printk("Timeout waiting for host not busy\n");)
121 return -EIO;
122 }
123 timeout = DEF_TIMEOUT;
124
125 *status = iic_inw(adap, ITE_I2CHSR);
126#ifndef STUB_I2C
127 while (timeout-- && !(*status & ITE_I2CHSR_TDI)) {
128 adap->waitforpin();
129 *status = iic_inw(adap, ITE_I2CHSR);
130 }
131#endif
132 if (timeout <= 0)
133 return(-1);
134 else
135 return(0);
136}
137
138static int wait_for_fe(struct i2c_algo_iic_data *adap, short *status)
139{
140 int timeout = DEF_TIMEOUT;
141
142 *status = iic_inw(adap, ITE_I2CFSR);
143#ifndef STUB_I2C
144 while (timeout-- && (*status & ITE_I2CFSR_FE)) {
145 udelay(1000);
146 iic_inw(adap, ITE_I2CFSR);
147 }
148#endif
149 if (timeout <= 0)
150 return(-1);
151 else
152 return(0);
153}
154
155static int iic_init (struct i2c_algo_iic_data *adap)
156{
157 short i;
158
159 /* Clear bit 7 to set I2C to normal operation mode */
160 i=iic_inw(adap, PM_DSR)& 0xff7f;
161 iic_outw(adap, PM_DSR, i);
162
163 /* set IT_GPCCR port C bit 2&3 as function 2 */
164 i = iic_inw(adap, GPIO_CCR) & 0xfc0f;
165 iic_outw(adap,GPIO_CCR,i);
166
167 /* Clear slave address/sub-address */
168 iic_outw(adap,ITE_I2CSAR, 0);
169 iic_outw(adap,ITE_I2CSSAR, 0);
170
171 /* Set clock counter register */
172 iic_outw(adap,ITE_I2CCKCNT, get_clock(adap));
173
174 /* Set START/reSTART/STOP time registers */
175 iic_outw(adap,ITE_I2CSHDR, 0x0a);
176 iic_outw(adap,ITE_I2CRSUR, 0x0a);
177 iic_outw(adap,ITE_I2CPSUR, 0x0a);
178
179 /* Enable interrupts on completing the current transaction */
180 iic_outw(adap,ITE_I2CHCR, ITE_I2CHCR_IE | ITE_I2CHCR_HCE);
181
182 /* Clear transfer count */
183 iic_outw(adap,ITE_I2CFBCR, 0x0);
184
185 DEB2(printk("iic_init: Initialized IIC on ITE 0x%x\n",
186 iic_inw(adap, ITE_I2CHSR)));
187 return 0;
188}
189
190
191/*
192 * Sanity check for the adapter hardware - check the reaction of
193 * the bus lines only if it seems to be idle.
194 */
195static int test_bus(struct i2c_algo_iic_data *adap, char *name) {
196#if 0
197 int scl,sda;
198 sda=getsda(adap);
199 if (adap->getscl==NULL) {
200 printk("test_bus: Warning: Adapter can't read from clock line - skipping test.\n");
201 return 0;
202 }
203 scl=getscl(adap);
204 printk("test_bus: Adapter: %s scl: %d sda: %d -- testing...\n",
205 name,getscl(adap),getsda(adap));
206 if (!scl || !sda ) {
207 printk("test_bus: %s seems to be busy.\n",adap->name);
208 goto bailout;
209 }
210 sdalo(adap);
211 printk("test_bus:1 scl: %d sda: %d\n", getscl(adap),
212 getsda(adap));
213 if ( 0 != getsda(adap) ) {
214 printk("test_bus: %s SDA stuck high!\n",name);
215 sdahi(adap);
216 goto bailout;
217 }
218 if ( 0 == getscl(adap) ) {
219 printk("test_bus: %s SCL unexpected low while pulling SDA low!\n",
220 name);
221 goto bailout;
222 }
223 sdahi(adap);
224 printk("test_bus:2 scl: %d sda: %d\n", getscl(adap),
225 getsda(adap));
226 if ( 0 == getsda(adap) ) {
227 printk("test_bus: %s SDA stuck low!\n",name);
228 sdahi(adap);
229 goto bailout;
230 }
231 if ( 0 == getscl(adap) ) {
232 printk("test_bus: %s SCL unexpected low while SDA high!\n",
233 adap->name);
234 goto bailout;
235 }
236 scllo(adap);
237 printk("test_bus:3 scl: %d sda: %d\n", getscl(adap),
238 getsda(adap));
239 if ( 0 != getscl(adap) ) {
240
241 sclhi(adap);
242 goto bailout;
243 }
244 if ( 0 == getsda(adap) ) {
245 printk("test_bus: %s SDA unexpected low while pulling SCL low!\n",
246 name);
247 goto bailout;
248 }
249 sclhi(adap);
250 printk("test_bus:4 scl: %d sda: %d\n", getscl(adap),
251 getsda(adap));
252 if ( 0 == getscl(adap) ) {
253 printk("test_bus: %s SCL stuck low!\n",name);
254 sclhi(adap);
255 goto bailout;
256 }
257 if ( 0 == getsda(adap) ) {
258 printk("test_bus: %s SDA unexpected low while SCL high!\n",
259 name);
260 goto bailout;
261 }
262 printk("test_bus: %s passed test.\n",name);
263 return 0;
264bailout:
265 sdahi(adap);
266 sclhi(adap);
267 return -ENODEV;
268#endif
269 return (0);
270}
271
272/* ----- Utility functions
273 */
274
275
276/* Verify the device we want to talk to on the IIC bus really exists. */
277static inline int try_address(struct i2c_algo_iic_data *adap,
278 unsigned int addr, int retries)
279{
280 int i, ret = -1;
281 short status;
282
283 for (i=0;i<retries;i++) {
284 iic_outw(adap, ITE_I2CSAR, addr);
285 iic_start(adap);
286 if (wait_for_pin(adap, &status) == 0) {
287 if ((status & ITE_I2CHSR_DNE) == 0) {
288 iic_stop(adap);
289 iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
290 ret=1;
291 break; /* success! */
292 }
293 }
294 iic_stop(adap);
295 udelay(adap->udelay);
296 }
297 DEB2(if (i) printk("try_address: needed %d retries for 0x%x\n",i,
298 addr));
299 return ret;
300}
301
302
303static int iic_sendbytes(struct i2c_adapter *i2c_adap,const char *buf,
304 int count)
305{
306 struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
307 int wrcount=0, timeout;
308 short status;
309 int loops, remainder, i, j;
310 union {
311 char byte[2];
312 unsigned short word;
313 } tmp;
314
315 iic_outw(adap, ITE_I2CSSAR, (unsigned short)buf[wrcount++]);
316 count--;
317 if (count == 0)
318 return -EIO;
319
320 loops = count / 32; /* 32-byte FIFO */
321 remainder = count % 32;
322
323 if(loops) {
324 for(i=0; i<loops; i++) {
325
326 iic_outw(adap, ITE_I2CFBCR, 32);
327 for(j=0; j<32/2; j++) {
328 tmp.byte[1] = buf[wrcount++];
329 tmp.byte[0] = buf[wrcount++];
330 iic_outw(adap, ITE_I2CFDR, tmp.word);
331 }
332
333 /* status FIFO overrun */
334 iic_inw(adap, ITE_I2CFSR);
335 iic_inw(adap, ITE_I2CFBCR);
336
337 iic_outw(adap, ITE_I2CHCR, ITE_WRITE); /* Issue WRITE command */
338
339 /* Wait for transmission to complete */
340 timeout = wait_for_pin(adap, &status);
341 if(timeout) {
342 iic_stop(adap);
343 printk("iic_sendbytes: %s write timeout.\n", i2c_adap->name);
344 return -EREMOTEIO; /* got a better one ?? */
345 }
346 if (status & ITE_I2CHSR_DB) {
347 iic_stop(adap);
348 printk("iic_sendbytes: %s write error - no ack.\n", i2c_adap->name);
349 return -EREMOTEIO; /* got a better one ?? */
350 }
351 }
352 }
353 if(remainder) {
354 iic_outw(adap, ITE_I2CFBCR, remainder);
355 for(i=0; i<remainder/2; i++) {
356 tmp.byte[1] = buf[wrcount++];
357 tmp.byte[0] = buf[wrcount++];
358 iic_outw(adap, ITE_I2CFDR, tmp.word);
359 }
360
361 /* status FIFO overrun */
362 iic_inw(adap, ITE_I2CFSR);
363 iic_inw(adap, ITE_I2CFBCR);
364
365 iic_outw(adap, ITE_I2CHCR, ITE_WRITE); /* Issue WRITE command */
366
367 timeout = wait_for_pin(adap, &status);
368 if(timeout) {
369 iic_stop(adap);
370 printk("iic_sendbytes: %s write timeout.\n", i2c_adap->name);
371 return -EREMOTEIO; /* got a better one ?? */
372 }
373#ifndef STUB_I2C
374 if (status & ITE_I2CHSR_DB) {
375 iic_stop(adap);
376 printk("iic_sendbytes: %s write error - no ack.\n", i2c_adap->name);
377 return -EREMOTEIO; /* got a better one ?? */
378 }
379#endif
380 }
381 iic_stop(adap);
382 return wrcount;
383}
384
385
386static int iic_readbytes(struct i2c_adapter *i2c_adap, char *buf, int count,
387 int sread)
388{
389 int rdcount=0, i, timeout;
390 short status;
391 struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
392 int loops, remainder, j;
393 union {
394 char byte[2];
395 unsigned short word;
396 } tmp;
397
398 loops = count / 32; /* 32-byte FIFO */
399 remainder = count % 32;
400
401 if(loops) {
402 for(i=0; i<loops; i++) {
403 iic_outw(adap, ITE_I2CFBCR, 32);
404 if (sread)
405 iic_outw(adap, ITE_I2CHCR, ITE_SREAD);
406 else
407 iic_outw(adap, ITE_I2CHCR, ITE_READ); /* Issue READ command */
408
409 timeout = wait_for_pin(adap, &status);
410 if(timeout) {
411 iic_stop(adap);
412 printk("iic_readbytes: %s read timeout.\n", i2c_adap->name);
413 return (-1);
414 }
415#ifndef STUB_I2C
416 if (status & ITE_I2CHSR_DB) {
417 iic_stop(adap);
418 printk("iic_readbytes: %s read error - no ack.\n", i2c_adap->name);
419 return (-1);
420 }
421#endif
422
423 timeout = wait_for_fe(adap, &status);
424 if(timeout) {
425 iic_stop(adap);
426 printk("iic_readbytes: %s FIFO is empty\n", i2c_adap->name);
427 return (-1);
428 }
429
430 for(j=0; j<32/2; j++) {
431 tmp.word = iic_inw(adap, ITE_I2CFDR);
432 buf[rdcount++] = tmp.byte[1];
433 buf[rdcount++] = tmp.byte[0];
434 }
435
436 /* status FIFO underrun */
437 iic_inw(adap, ITE_I2CFSR);
438
439 }
440 }
441
442
443 if(remainder) {
444 remainder=(remainder+1)/2 * 2;
445 iic_outw(adap, ITE_I2CFBCR, remainder);
446 if (sread)
447 iic_outw(adap, ITE_I2CHCR, ITE_SREAD);
448 else
449 iic_outw(adap, ITE_I2CHCR, ITE_READ); /* Issue READ command */
450
451 timeout = wait_for_pin(adap, &status);
452 if(timeout) {
453 iic_stop(adap);
454 printk("iic_readbytes: %s read timeout.\n", i2c_adap->name);
455 return (-1);
456 }
457#ifndef STUB_I2C
458 if (status & ITE_I2CHSR_DB) {
459 iic_stop(adap);
460 printk("iic_readbytes: %s read error - no ack.\n", i2c_adap->name);
461 return (-1);
462 }
463#endif
464 timeout = wait_for_fe(adap, &status);
465 if(timeout) {
466 iic_stop(adap);
467 printk("iic_readbytes: %s FIFO is empty\n", i2c_adap->name);
468 return (-1);
469 }
470
471 for(i=0; i<(remainder+1)/2; i++) {
472 tmp.word = iic_inw(adap, ITE_I2CFDR);
473 buf[rdcount++] = tmp.byte[1];
474 buf[rdcount++] = tmp.byte[0];
475 }
476
477 /* status FIFO underrun */
478 iic_inw(adap, ITE_I2CFSR);
479
480 }
481
482 iic_stop(adap);
483 return rdcount;
484}
485
486
487/* This function implements combined transactions. Combined
488 * transactions consist of combinations of reading and writing blocks of data.
489 * Each transfer (i.e. a read or a write) is separated by a repeated start
490 * condition.
491 */
492#if 0
493static int iic_combined_transaction(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num)
494{
495 int i;
496 struct i2c_msg *pmsg;
497 int ret;
498
499 DEB2(printk("Beginning combined transaction\n"));
500
501 for(i=0; i<(num-1); i++) {
502 pmsg = &msgs[i];
503 if(pmsg->flags & I2C_M_RD) {
504 DEB2(printk(" This one is a read\n"));
505 ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_COMBINED_XFER);
506 }
507 else if(!(pmsg->flags & I2C_M_RD)) {
508 DEB2(printk("This one is a write\n"));
509 ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_COMBINED_XFER);
510 }
511 }
512 /* Last read or write segment needs to be terminated with a stop */
513 pmsg = &msgs[i];
514
515 if(pmsg->flags & I2C_M_RD) {
516 DEB2(printk("Doing the last read\n"));
517 ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_SINGLE_XFER);
518 }
519 else if(!(pmsg->flags & I2C_M_RD)) {
520 DEB2(printk("Doing the last write\n"));
521 ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_SINGLE_XFER);
522 }
523
524 return ret;
525}
526#endif
527
528
529/* Whenever we initiate a transaction, the first byte clocked
530 * onto the bus after the start condition is the address (7 bit) of the
531 * device we want to talk to. This function manipulates the address specified
532 * so that it makes sense to the hardware when written to the IIC peripheral.
533 *
534 * Note: 10 bit addresses are not supported in this driver, although they are
535 * supported by the hardware. This functionality needs to be implemented.
536 */
537static inline int iic_doAddress(struct i2c_algo_iic_data *adap,
538 struct i2c_msg *msg, int retries)
539{
540 unsigned short flags = msg->flags;
541 unsigned int addr;
542 int ret;
543
544/* Ten bit addresses not supported right now */
545 if ( (flags & I2C_M_TEN) ) {
546#if 0
547 addr = 0xf0 | (( msg->addr >> 7) & 0x03);
548 DEB2(printk("addr0: %d\n",addr));
549 ret = try_address(adap, addr, retries);
550 if (ret!=1) {
551 printk("iic_doAddress: died at extended address code.\n");
552 return -EREMOTEIO;
553 }
554 iic_outw(adap,msg->addr & 0x7f);
555 if (ret != 1) {
556 printk("iic_doAddress: died at 2nd address code.\n");
557 return -EREMOTEIO;
558 }
559 if ( flags & I2C_M_RD ) {
560 i2c_repstart(adap);
561 addr |= 0x01;
562 ret = try_address(adap, addr, retries);
563 if (ret!=1) {
564 printk("iic_doAddress: died at extended address code.\n");
565 return -EREMOTEIO;
566 }
567 }
568#endif
569 } else {
570
571 addr = ( msg->addr << 1 );
572
573#if 0
574 if (flags & I2C_M_RD )
575 addr |= 1;
576 if (flags & I2C_M_REV_DIR_ADDR )
577 addr ^= 1;
578#endif
579
580 if (iic_inw(adap, ITE_I2CSAR) != addr) {
581 iic_outw(adap, ITE_I2CSAR, addr);
582 ret = try_address(adap, addr, retries);
583 if (ret!=1) {
584 printk("iic_doAddress: died at address code.\n");
585 return -EREMOTEIO;
586 }
587 }
588
589 }
590
591 return 0;
592}
593
594
595/* Description: Prepares the controller for a transaction (clearing status
596 * registers, data buffers, etc), and then calls either iic_readbytes or
597 * iic_sendbytes to do the actual transaction.
598 *
599 * still to be done: Before we issue a transaction, we should
600 * verify that the bus is not busy or in some unknown state.
601 */
602static int iic_xfer(struct i2c_adapter *i2c_adap,
603 struct i2c_msg *msgs,
604 int num)
605{
606 struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
607 struct i2c_msg *pmsg;
608 int i = 0;
609 int ret, timeout;
610
611 pmsg = &msgs[i];
612
613 if(!pmsg->len) {
614 DEB2(printk("iic_xfer: read/write length is 0\n");)
615 return -EIO;
616 }
617 if(!(pmsg->flags & I2C_M_RD) && (!(pmsg->len)%2) ) {
618 DEB2(printk("iic_xfer: write buffer length is not odd\n");)
619 return -EIO;
620 }
621
622 /* Wait for any pending transfers to complete */
623 timeout = wait_for_bb(adap);
624 if (timeout) {
625 DEB2(printk("iic_xfer: Timeout waiting for host not busy\n");)
626 return -EIO;
627 }
628
629 /* Flush FIFO */
630 iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
631
632 /* Load address */
633 ret = iic_doAddress(adap, pmsg, i2c_adap->retries);
634 if (ret)
635 return -EIO;
636
637#if 0
638 /* Combined transaction (read and write) */
639 if(num > 1) {
640 DEB2(printk("iic_xfer: Call combined transaction\n"));
641 ret = iic_combined_transaction(i2c_adap, msgs, num);
642 }
643#endif
644
645 DEB3(printk("iic_xfer: Msg %d, addr=0x%x, flags=0x%x, len=%d\n",
646 i, msgs[i].addr, msgs[i].flags, msgs[i].len);)
647
648 if(pmsg->flags & I2C_M_RD) /* Read */
649 ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, 0);
650 else { /* Write */
651 udelay(1000);
652 ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len);
653 }
654
655 if (ret != pmsg->len)
656 DEB3(printk("iic_xfer: error or fail on read/write %d bytes.\n",ret));
657 else
658 DEB3(printk("iic_xfer: read/write %d bytes.\n",ret));
659
660 return ret;
661}
662
663
664/* Implements device specific ioctls. Higher level ioctls can
665 * be found in i2c-core.c and are typical of any i2c controller (specifying
666 * slave address, timeouts, etc). These ioctls take advantage of any hardware
667 * features built into the controller for which this algorithm-adapter set
668 * was written. These ioctls allow you to take control of the data and clock
669 * lines and set the either high or low,
670 * similar to a GPIO pin.
671 */
672static int algo_control(struct i2c_adapter *adapter,
673 unsigned int cmd, unsigned long arg)
674{
675
676 struct i2c_algo_iic_data *adap = adapter->algo_data;
677 struct i2c_iic_msg s_msg;
678 char *buf;
679 int ret;
680
681 if (cmd == I2C_SREAD) {
682 if(copy_from_user(&s_msg, (struct i2c_iic_msg *)arg,
683 sizeof(struct i2c_iic_msg)))
684 return -EFAULT;
685 buf = kmalloc(s_msg.len, GFP_KERNEL);
686 if (buf== NULL)
687 return -ENOMEM;
688
689 /* Flush FIFO */
690 iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
691
692 /* Load address */
693 iic_outw(adap, ITE_I2CSAR,s_msg.addr<<1);
694 iic_outw(adap, ITE_I2CSSAR,s_msg.waddr & 0xff);
695
696 ret = iic_readbytes(adapter, buf, s_msg.len, 1);
697 if (ret>=0) {
698 if(copy_to_user( s_msg.buf, buf, s_msg.len) )
699 ret = -EFAULT;
700 }
701 kfree(buf);
702 }
703 return 0;
704}
705
706
707static u32 iic_func(struct i2c_adapter *adap)
708{
709 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR |
710 I2C_FUNC_PROTOCOL_MANGLING;
711}
712
713/* -----exported algorithm data: ------------------------------------- */
714
715static struct i2c_algorithm iic_algo = {
716 .master_xfer = iic_xfer,
717 .algo_control = algo_control, /* ioctl */
718 .functionality = iic_func,
719};
720
721
722/*
723 * registering functions to load algorithms at runtime
724 */
725int i2c_iic_add_bus(struct i2c_adapter *adap)
726{
727 struct i2c_algo_iic_data *iic_adap = adap->algo_data;
728
729 if (iic_test) {
730 int ret = test_bus(iic_adap, adap->name);
731 if (ret<0)
732 return -ENODEV;
733 }
734
735 DEB2(printk("i2c-algo-ite: hw routines for %s registered.\n",
736 adap->name));
737
738 /* register new adapter to i2c module... */
739 adap->algo = &iic_algo;
740
741 adap->timeout = 100; /* default values, should */
742 adap->retries = 3; /* be replaced by defines */
743 adap->flags = 0;
744
745 iic_init(iic_adap);
746 return i2c_add_adapter(adap);
747}
748
749
750int i2c_iic_del_bus(struct i2c_adapter *adap)
751{
752 int res;
753 if ((res = i2c_del_adapter(adap)) < 0)
754 return res;
755 DEB2(printk("i2c-algo-ite: adapter unregistered: %s\n",adap->name));
756
757 return 0;
758}
759
760
761int __init i2c_algo_iic_init (void)
762{
763 printk(KERN_INFO "ITE iic (i2c) algorithm module\n");
764 return 0;
765}
766
767
768void i2c_algo_iic_exit(void)
769{
770 return;
771}
772
773
774EXPORT_SYMBOL(i2c_iic_add_bus);
775EXPORT_SYMBOL(i2c_iic_del_bus);
776
777/* The MODULE_* macros resolve to nothing if MODULES is not defined
778 * when this file is compiled.
779 */
780MODULE_AUTHOR("MontaVista Software <www.mvista.com>");
781MODULE_DESCRIPTION("ITE iic algorithm");
782MODULE_LICENSE("GPL");
783
784module_param(iic_test, bool, 0);
785module_param(i2c_debug, int, S_IRUGO | S_IWUSR);
786
787MODULE_PARM_DESC(iic_test, "Test if the I2C bus is available");
788MODULE_PARM_DESC(i2c_debug,
789 "debug level - 0 off; 1 normal; 2,3 more verbose; 9 iic-protocol");
790
791
792/* This function resolves to init_module (the function invoked when a module
793 * is loaded via insmod) when this file is compiled with MODULES defined.
794 * Otherwise (i.e. if you want this driver statically linked to the kernel),
795 * a pointer to this function is stored in a table and called
796 * during the initialization of the kernel (in do_basic_setup in /init/main.c)
797 *
798 * All this functionality is complements of the macros defined in linux/init.h
799 */
800module_init(i2c_algo_iic_init);
801
802
803/* If MODULES is defined when this file is compiled, then this function will
804 * resolved to cleanup_module.
805 */
806module_exit(i2c_algo_iic_exit);
diff --git a/drivers/i2c/algos/i2c-algo-ite.h b/drivers/i2c/algos/i2c-algo-ite.h
deleted file mode 100644
index a8ca3c9b546a..000000000000
--- a/drivers/i2c/algos/i2c-algo-ite.h
+++ /dev/null
@@ -1,117 +0,0 @@
1/*
2 --------------------------------------------------------------------
3 i2c-ite.h: Global defines for the I2C controller on board the
4 ITE MIPS processor.
5 --------------------------------------------------------------------
6 Hai-Pao Fan, MontaVista Software, Inc.
7 hpfan@mvista.com or source@mvista.com
8
9 Copyright 2001 MontaVista Software Inc.
10
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
19 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
22 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
23 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 * You should have received a copy of the GNU General Public License along
28 * with this program; if not, write to the Free Software Foundation, Inc.,
29 * 675 Mass Ave, Cambridge, MA 02139, USA.
30
31 */
32
33#ifndef I2C_ITE_H
34#define I2C_ITE_H 1
35
36#include <asm/it8172/it8172.h>
37
38/* I2C Registers */
39#define ITE_I2CHCR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x30
40#define ITE_I2CHSR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x34
41#define ITE_I2CSAR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x38
42#define ITE_I2CSSAR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x3c
43#define ITE_I2CCKCNT IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x48
44#define ITE_I2CSHDR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x4c
45#define ITE_I2CRSUR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x50
46#define ITE_I2CPSUR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x54
47
48#define ITE_I2CFDR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x70
49#define ITE_I2CFBCR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x74
50#define ITE_I2CFCR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x78
51#define ITE_I2CFSR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x7c
52
53
54/* Host Control Register ITE_I2CHCR */
55#define ITE_I2CHCR_HCE 0x01 /* Enable I2C Host Controller */
56#define ITE_I2CHCR_IE 0x02 /* Enable the interrupt after completing
57 the current transaction */
58#define ITE_I2CHCR_CP_W 0x00 /* bit2-4 000 - Write */
59#define ITE_I2CHCR_CP_R 0x08 /* 010 - Current address read */
60#define ITE_I2CHCR_CP_S 0x10 /* 100 - Sequential read */
61#define ITE_I2CHCR_ST 0x20 /* Initiates the I2C host controller to execute
62 the command and send the data programmed in
63 all required registers to I2C bus */
64#define ITE_CMD ITE_I2CHCR_HCE | ITE_I2CHCR_IE | ITE_I2CHCR_ST
65#define ITE_WRITE ITE_CMD | ITE_I2CHCR_CP_W
66#define ITE_READ ITE_CMD | ITE_I2CHCR_CP_R
67#define ITE_SREAD ITE_CMD | ITE_I2CHCR_CP_S
68
69/* Host Status Register ITE_I2CHSR */
70#define ITE_I2CHSR_DB 0x01 /* Device is busy, receives NACK response except
71 in the first and last bytes */
72#define ITE_I2CHSR_DNE 0x02 /* Target address on I2C bus does not exist */
73#define ITE_I2CHSR_TDI 0x04 /* R/W Transaction on I2C bus was completed */
74#define ITE_I2CHSR_HB 0x08 /* Host controller is processing transactions */
75#define ITE_I2CHSR_FER 0x10 /* Error occurs in the FIFO */
76
77/* Slave Address Register ITE_I2CSAR */
78#define ITE_I2CSAR_SA_MASK 0xfe /* Target I2C device address */
79#define ITE_I2CSAR_ASO 0x0100 /* Output 1/0 to I2CAS port when the
80 next slave address is addressed */
81
82/* Slave Sub-address Register ITE_I2CSSAR */
83#define ITE_I2CSSAR_SUBA_MASK 0xff /* Target I2C device sub-address */
84
85/* Clock Counter Register ITE_I2CCKCNT */
86#define ITE_I2CCKCNT_STOP 0x00 /* stop I2C clock */
87#define ITE_I2CCKCNT_HPCC_MASK 0x7f /* SCL high period counter */
88#define ITE_I2CCKCNT_LPCC_MASK 0x7f00 /* SCL low period counter */
89
90/* START Hold Time Register ITE_I2CSHDR */
91/* value is counted based on 16 MHz internal clock */
92#define ITE_I2CSHDR_FM 0x0a /* START condition at fast mode */
93#define ITE_I2CSHDR_SM 0x47 /* START contition at standard mode */
94
95/* (Repeated) START Setup Time Register ITE_I2CRSUR */
96/* value is counted based on 16 MHz internal clock */
97#define ITE_I2CRSUR_FM 0x0a /* repeated START condition at fast mode */
98#define ITE_I2CRSUR_SM 0x50 /* repeated START condition at standard mode */
99
100/* STOP setup Time Register ITE_I2CPSUR */
101
102/* FIFO Data Register ITE_I2CFDR */
103#define ITE_I2CFDR_MASK 0xff
104
105/* FIFO Byte Count Register ITE_I2CFBCR */
106#define ITE_I2CFBCR_MASK 0x3f
107
108/* FIFO Control Register ITE_I2CFCR */
109#define ITE_I2CFCR_FLUSH 0x01 /* Flush FIFO and reset the FIFO point
110 and I2CFSR */
111/* FIFO Status Register ITE_I2CFSR */
112#define ITE_I2CFSR_FO 0x01 /* FIFO is overrun when write */
113#define ITE_I2CFSR_FU 0x02 /* FIFO is underrun when read */
114#define ITE_I2CFSR_FF 0x04 /* FIFO is full when write */
115#define ITE_I2CFSR_FE 0x08 /* FIFO is empty when read */
116
117#endif /* I2C_ITE_H */
diff --git a/drivers/i2c/algos/i2c-algo-pca.c b/drivers/i2c/algos/i2c-algo-pca.c
index 9081c9fbcd29..36fdf971f080 100644
--- a/drivers/i2c/algos/i2c-algo-pca.c
+++ b/drivers/i2c/algos/i2c-algo-pca.c
@@ -381,14 +381,7 @@ int i2c_pca_add_bus(struct i2c_adapter *adap)
381 381
382 return rval; 382 return rval;
383} 383}
384
385int i2c_pca_del_bus(struct i2c_adapter *adap)
386{
387 return i2c_del_adapter(adap);
388}
389
390EXPORT_SYMBOL(i2c_pca_add_bus); 384EXPORT_SYMBOL(i2c_pca_add_bus);
391EXPORT_SYMBOL(i2c_pca_del_bus);
392 385
393MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>"); 386MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>");
394MODULE_DESCRIPTION("I2C-Bus PCA9564 algorithm"); 387MODULE_DESCRIPTION("I2C-Bus PCA9564 algorithm");
diff --git a/drivers/i2c/algos/i2c-algo-pcf.c b/drivers/i2c/algos/i2c-algo-pcf.c
index 3b2003398966..ecb2c2d7d540 100644
--- a/drivers/i2c/algos/i2c-algo-pcf.c
+++ b/drivers/i2c/algos/i2c-algo-pcf.c
@@ -486,15 +486,7 @@ int i2c_pcf_add_bus(struct i2c_adapter *adap)
486 486
487 return rval; 487 return rval;
488} 488}
489
490
491int i2c_pcf_del_bus(struct i2c_adapter *adap)
492{
493 return i2c_del_adapter(adap);
494}
495
496EXPORT_SYMBOL(i2c_pcf_add_bus); 489EXPORT_SYMBOL(i2c_pcf_add_bus);
497EXPORT_SYMBOL(i2c_pcf_del_bus);
498 490
499MODULE_AUTHOR("Hans Berglund <hb@spacetec.no>"); 491MODULE_AUTHOR("Hans Berglund <hb@spacetec.no>");
500MODULE_DESCRIPTION("I2C-Bus PCF8584 algorithm"); 492MODULE_DESCRIPTION("I2C-Bus PCF8584 algorithm");
diff --git a/drivers/i2c/algos/i2c-algo-sgi.c b/drivers/i2c/algos/i2c-algo-sgi.c
index 490d99997fd0..ac2d5053078a 100644
--- a/drivers/i2c/algos/i2c-algo-sgi.c
+++ b/drivers/i2c/algos/i2c-algo-sgi.c
@@ -171,15 +171,7 @@ int i2c_sgi_add_bus(struct i2c_adapter *adap)
171 171
172 return i2c_add_adapter(adap); 172 return i2c_add_adapter(adap);
173} 173}
174
175
176int i2c_sgi_del_bus(struct i2c_adapter *adap)
177{
178 return i2c_del_adapter(adap);
179}
180
181EXPORT_SYMBOL(i2c_sgi_add_bus); 174EXPORT_SYMBOL(i2c_sgi_add_bus);
182EXPORT_SYMBOL(i2c_sgi_del_bus);
183 175
184MODULE_AUTHOR("Ladislav Michl <ladis@linux-mips.org>"); 176MODULE_AUTHOR("Ladislav Michl <ladis@linux-mips.org>");
185MODULE_DESCRIPTION("I2C-Bus SGI algorithm"); 177MODULE_DESCRIPTION("I2C-Bus SGI algorithm");
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 90f91d039ee2..e1989f3a2684 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -74,6 +74,13 @@ config I2C_AMD8111
74 This driver can also be built as a module. If so, the module 74 This driver can also be built as a module. If so, the module
75 will be called i2c-amd8111. 75 will be called i2c-amd8111.
76 76
77config I2C_AT91
78 tristate "Atmel AT91 I2C Two-Wire interface (TWI)"
79 depends on I2C && ARCH_AT91 && EXPERIMENTAL
80 help
81 This supports the use of the I2C interface on Atmel AT91
82 processors.
83
77config I2C_AU1550 84config I2C_AU1550
78 tristate "Au1550/Au1200 SMBus interface" 85 tristate "Au1550/Au1200 SMBus interface"
79 depends on I2C && (SOC_AU1550 || SOC_AU1200) 86 depends on I2C && (SOC_AU1550 || SOC_AU1200)
@@ -209,18 +216,6 @@ config I2C_ISA
209 tristate 216 tristate
210 depends on I2C 217 depends on I2C
211 218
212config I2C_ITE
213 tristate "ITE I2C Adapter"
214 depends on I2C && MIPS_ITE8172
215 select I2C_ALGOITE
216 help
217 This supports the ITE8172 I2C peripheral found on some MIPS
218 systems. Say Y if you have one of these. You should also say Y for
219 the ITE I2C driver algorithm support above.
220
221 This support is also available as a module. If so, the module
222 will be called i2c-ite.
223
224config I2C_IXP4XX 219config I2C_IXP4XX
225 tristate "IXP4xx GPIO-Based I2C Interface" 220 tristate "IXP4xx GPIO-Based I2C Interface"
226 depends on I2C && ARCH_IXP4XX 221 depends on I2C && ARCH_IXP4XX
@@ -481,6 +476,17 @@ config I2C_STUB
481 476
482 If you don't know what to do here, definitely say N. 477 If you don't know what to do here, definitely say N.
483 478
479config I2C_VERSATILE
480 tristate "ARM Versatile/Realview I2C bus support"
481 depends on I2C && (ARCH_VERSATILE || ARCH_REALVIEW)
482 select I2C_ALGOBIT
483 help
484 Say yes if you want to support the I2C serial bus on ARMs Versatile
485 range of platforms.
486
487 This driver can also be built as a module. If so, the module
488 will be called i2c-versatile.
489
484config I2C_VIA 490config I2C_VIA
485 tristate "VIA 82C586B" 491 tristate "VIA 82C586B"
486 depends on I2C && PCI && EXPERIMENTAL 492 depends on I2C && PCI && EXPERIMENTAL
@@ -548,4 +554,23 @@ config I2C_MV64XXX
548 This driver can also be built as a module. If so, the module 554 This driver can also be built as a module. If so, the module
549 will be called i2c-mv64xxx. 555 will be called i2c-mv64xxx.
550 556
557config I2C_PNX
558 tristate "I2C bus support for Philips PNX targets"
559 depends on ARCH_PNX4008 && I2C
560 help
561 This driver supports the Philips IP3204 I2C IP block master and/or
562 slave controller
563
564 This driver can also be built as a module. If so, the module
565 will be called i2c-pnx.
566
567config I2C_PNX_EARLY
568 bool "Early initialization for I2C on PNXxxxx"
569 depends on I2C_PNX=y
570 help
571 Under certain circumstances one may need to make sure I2C on PNXxxxx
572 is initialized earlier than some other driver that depends on it
573 (for instance, that might be USB in case of PNX4008). With this
574 option turned on you can guarantee that.
575
551endmenu 576endmenu
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 493c87289b62..37196c1d0794 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o
8obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o 8obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o
9obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o 9obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o
10obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o 10obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
11obj-$(CONFIG_I2C_AT91) += i2c-at91.o
11obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o 12obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o
12obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o 13obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o
13obj-$(CONFIG_I2C_HYDRA) += i2c-hydra.o 14obj-$(CONFIG_I2C_HYDRA) += i2c-hydra.o
@@ -16,7 +17,6 @@ obj-$(CONFIG_I2C_I810) += i2c-i810.o
16obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o 17obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o
17obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o 18obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
18obj-$(CONFIG_I2C_ISA) += i2c-isa.o 19obj-$(CONFIG_I2C_ISA) += i2c-isa.o
19obj-$(CONFIG_I2C_ITE) += i2c-ite.o
20obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o 20obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
21obj-$(CONFIG_I2C_IXP4XX) += i2c-ixp4xx.o 21obj-$(CONFIG_I2C_IXP4XX) += i2c-ixp4xx.o
22obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o 22obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o
@@ -29,6 +29,7 @@ obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o
29obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o 29obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o
30obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o 30obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o
31obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o 31obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o
32obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
32obj-$(CONFIG_I2C_PROSAVAGE) += i2c-prosavage.o 33obj-$(CONFIG_I2C_PROSAVAGE) += i2c-prosavage.o
33obj-$(CONFIG_I2C_PXA) += i2c-pxa.o 34obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
34obj-$(CONFIG_I2C_RPXLITE) += i2c-rpx.o 35obj-$(CONFIG_I2C_RPXLITE) += i2c-rpx.o
@@ -39,6 +40,7 @@ obj-$(CONFIG_I2C_SIS5595) += i2c-sis5595.o
39obj-$(CONFIG_I2C_SIS630) += i2c-sis630.o 40obj-$(CONFIG_I2C_SIS630) += i2c-sis630.o
40obj-$(CONFIG_I2C_SIS96X) += i2c-sis96x.o 41obj-$(CONFIG_I2C_SIS96X) += i2c-sis96x.o
41obj-$(CONFIG_I2C_STUB) += i2c-stub.o 42obj-$(CONFIG_I2C_STUB) += i2c-stub.o
43obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o
42obj-$(CONFIG_I2C_VIA) += i2c-via.o 44obj-$(CONFIG_I2C_VIA) += i2c-via.o
43obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o 45obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o
44obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o 46obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
diff --git a/drivers/i2c/busses/i2c-at91.c b/drivers/i2c/busses/i2c-at91.c
new file mode 100644
index 000000000000..67f91bdda089
--- /dev/null
+++ b/drivers/i2c/busses/i2c-at91.c
@@ -0,0 +1,325 @@
1/*
2 i2c Support for Atmel's AT91 Two-Wire Interface (TWI)
3
4 Copyright (C) 2004 Rick Bronson
5 Converted to 2.6 by Andrew Victor <andrew@sanpeople.com>
6
7 Borrowed heavily from original work by:
8 Copyright (C) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14*/
15
16#include <linux/module.h>
17#include <linux/version.h>
18#include <linux/kernel.h>
19#include <linux/slab.h>
20#include <linux/pci.h>
21#include <linux/types.h>
22#include <linux/delay.h>
23#include <linux/i2c.h>
24#include <linux/init.h>
25#include <linux/clk.h>
26#include <linux/platform_device.h>
27
28#include <asm/io.h>
29
30#include <asm/arch/at91_twi.h>
31#include <asm/arch/board.h>
32#include <asm/arch/cpu.h>
33
34#define TWI_CLOCK 100000 /* Hz. max 400 Kbits/sec */
35
36
37static struct clk *twi_clk;
38static void __iomem *twi_base;
39
40#define at91_twi_read(reg) __raw_readl(twi_base + (reg))
41#define at91_twi_write(reg, val) __raw_writel((val), twi_base + (reg))
42
43
44/*
45 * Initialize the TWI hardware registers.
46 */
47static void __devinit at91_twi_hwinit(void)
48{
49 unsigned long cdiv, ckdiv;
50
51 at91_twi_write(AT91_TWI_IDR, 0xffffffff); /* Disable all interrupts */
52 at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST); /* Reset peripheral */
53 at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN); /* Set Master mode */
54
55 /* Calcuate clock dividers */
56 cdiv = (clk_get_rate(twi_clk) / (2 * TWI_CLOCK)) - 3;
57 cdiv = cdiv + 1; /* round up */
58 ckdiv = 0;
59 while (cdiv > 255) {
60 ckdiv++;
61 cdiv = cdiv >> 1;
62 }
63
64 if (cpu_is_at91rm9200()) { /* AT91RM9200 Errata #22 */
65 if (ckdiv > 5) {
66 printk(KERN_ERR "AT91 I2C: Invalid TWI_CLOCK value!\n");
67 ckdiv = 5;
68 }
69 }
70
71 at91_twi_write(AT91_TWI_CWGR, (ckdiv << 16) | (cdiv << 8) | cdiv);
72}
73
74/*
75 * Poll the i2c status register until the specified bit is set.
76 * Returns 0 if timed out (100 msec).
77 */
78static short at91_poll_status(unsigned long bit)
79{
80 int loop_cntr = 10000;
81
82 do {
83 udelay(10);
84 } while (!(at91_twi_read(AT91_TWI_SR) & bit) && (--loop_cntr > 0));
85
86 return (loop_cntr > 0);
87}
88
89static int xfer_read(struct i2c_adapter *adap, unsigned char *buf, int length)
90{
91 /* Send Start */
92 at91_twi_write(AT91_TWI_CR, AT91_TWI_START);
93
94 /* Read data */
95 while (length--) {
96 if (!length) /* need to send Stop before reading last byte */
97 at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP);
98 if (!at91_poll_status(AT91_TWI_RXRDY)) {
99 dev_dbg(&adap->dev, "RXRDY timeout\n");
100 return -ETIMEDOUT;
101 }
102 *buf++ = (at91_twi_read(AT91_TWI_RHR) & 0xff);
103 }
104
105 return 0;
106}
107
108static int xfer_write(struct i2c_adapter *adap, unsigned char *buf, int length)
109{
110 /* Load first byte into transmitter */
111 at91_twi_write(AT91_TWI_THR, *buf++);
112
113 /* Send Start */
114 at91_twi_write(AT91_TWI_CR, AT91_TWI_START);
115
116 do {
117 if (!at91_poll_status(AT91_TWI_TXRDY)) {
118 dev_dbg(&adap->dev, "TXRDY timeout\n");
119 return -ETIMEDOUT;
120 }
121
122 length--; /* byte was transmitted */
123
124 if (length > 0) /* more data to send? */
125 at91_twi_write(AT91_TWI_THR, *buf++);
126 } while (length);
127
128 /* Send Stop */
129 at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP);
130
131 return 0;
132}
133
134/*
135 * Generic i2c master transfer entrypoint.
136 *
137 * Note: We do not use Atmel's feature of storing the "internal device address".
138 * Instead the "internal device address" has to be written using a seperate
139 * i2c message.
140 * http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2004-September/024411.html
141 */
142static int at91_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
143{
144 int i, ret;
145
146 dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num);
147
148 for (i = 0; i < num; i++) {
149 dev_dbg(&adap->dev, " #%d: %sing %d byte%s %s 0x%02x\n", i,
150 pmsg->flags & I2C_M_RD ? "read" : "writ",
151 pmsg->len, pmsg->len > 1 ? "s" : "",
152 pmsg->flags & I2C_M_RD ? "from" : "to", pmsg->addr);
153
154 at91_twi_write(AT91_TWI_MMR, (pmsg->addr << 16)
155 | ((pmsg->flags & I2C_M_RD) ? AT91_TWI_MREAD : 0));
156
157 if (pmsg->len && pmsg->buf) { /* sanity check */
158 if (pmsg->flags & I2C_M_RD)
159 ret = xfer_read(adap, pmsg->buf, pmsg->len);
160 else
161 ret = xfer_write(adap, pmsg->buf, pmsg->len);
162
163 if (ret)
164 return ret;
165
166 /* Wait until transfer is finished */
167 if (!at91_poll_status(AT91_TWI_TXCOMP)) {
168 dev_dbg(&adap->dev, "TXCOMP timeout\n");
169 return -ETIMEDOUT;
170 }
171 }
172 dev_dbg(&adap->dev, "transfer complete\n");
173 pmsg++; /* next message */
174 }
175 return i;
176}
177
178/*
179 * Return list of supported functionality.
180 */
181static u32 at91_func(struct i2c_adapter *adapter)
182{
183 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
184}
185
186static struct i2c_algorithm at91_algorithm = {
187 .master_xfer = at91_xfer,
188 .functionality = at91_func,
189};
190
191/*
192 * Main initialization routine.
193 */
194static int __devinit at91_i2c_probe(struct platform_device *pdev)
195{
196 struct i2c_adapter *adapter;
197 struct resource *res;
198 int rc;
199
200 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
201 if (!res)
202 return -ENXIO;
203
204 if (!request_mem_region(res->start, res->end - res->start + 1, "at91_i2c"))
205 return -EBUSY;
206
207 twi_base = ioremap(res->start, res->end - res->start + 1);
208 if (!twi_base) {
209 rc = -ENOMEM;
210 goto fail0;
211 }
212
213 twi_clk = clk_get(NULL, "twi_clk");
214 if (IS_ERR(twi_clk)) {
215 dev_err(&pdev->dev, "no clock defined\n");
216 rc = -ENODEV;
217 goto fail1;
218 }
219
220 adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
221 if (adapter == NULL) {
222 dev_err(&pdev->dev, "can't allocate inteface!\n");
223 rc = -ENOMEM;
224 goto fail2;
225 }
226 sprintf(adapter->name, "AT91");
227 adapter->algo = &at91_algorithm;
228 adapter->class = I2C_CLASS_HWMON;
229 adapter->dev.parent = &pdev->dev;
230
231 platform_set_drvdata(pdev, adapter);
232
233 clk_enable(twi_clk); /* enable peripheral clock */
234 at91_twi_hwinit(); /* initialize TWI controller */
235
236 rc = i2c_add_adapter(adapter);
237 if (rc) {
238 dev_err(&pdev->dev, "Adapter %s registration failed\n",
239 adapter->name);
240 goto fail3;
241 }
242
243 dev_info(&pdev->dev, "AT91 i2c bus driver.\n");
244 return 0;
245
246fail3:
247 platform_set_drvdata(pdev, NULL);
248 kfree(adapter);
249 clk_disable(twi_clk);
250fail2:
251 clk_put(twi_clk);
252fail1:
253 iounmap(twi_base);
254fail0:
255 release_mem_region(res->start, res->end - res->start + 1);
256
257 return rc;
258}
259
260static int __devexit at91_i2c_remove(struct platform_device *pdev)
261{
262 struct i2c_adapter *adapter = platform_get_drvdata(pdev);
263 struct resource *res;
264 int rc;
265
266 rc = i2c_del_adapter(adapter);
267 platform_set_drvdata(pdev, NULL);
268
269 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
270 iounmap(twi_base);
271 release_mem_region(res->start, res->end - res->start + 1);
272
273 clk_disable(twi_clk); /* disable peripheral clock */
274 clk_put(twi_clk);
275
276 return rc;
277}
278
279#ifdef CONFIG_PM
280
281/* NOTE: could save a few mA by keeping clock off outside of at91_xfer... */
282
283static int at91_i2c_suspend(struct platform_device *pdev, pm_message_t mesg)
284{
285 clk_disable(twi_clk);
286 return 0;
287}
288
289static int at91_i2c_resume(struct platform_device *pdev)
290{
291 return clk_enable(twi_clk);
292}
293
294#else
295#define at91_i2c_suspend NULL
296#define at91_i2c_resume NULL
297#endif
298
299static struct platform_driver at91_i2c_driver = {
300 .probe = at91_i2c_probe,
301 .remove = __devexit_p(at91_i2c_remove),
302 .suspend = at91_i2c_suspend,
303 .resume = at91_i2c_resume,
304 .driver = {
305 .name = "at91_i2c",
306 .owner = THIS_MODULE,
307 },
308};
309
310static int __init at91_i2c_init(void)
311{
312 return platform_driver_register(&at91_i2c_driver);
313}
314
315static void __exit at91_i2c_exit(void)
316{
317 platform_driver_unregister(&at91_i2c_driver);
318}
319
320module_init(at91_i2c_init);
321module_exit(at91_i2c_exit);
322
323MODULE_AUTHOR("Rick Bronson");
324MODULE_DESCRIPTION("I2C (TWI) driver for Atmel AT91");
325MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-elektor.c b/drivers/i2c/busses/i2c-elektor.c
index a591fe685f06..834967464814 100644
--- a/drivers/i2c/busses/i2c-elektor.c
+++ b/drivers/i2c/busses/i2c-elektor.c
@@ -293,7 +293,7 @@ static int __init i2c_pcfisa_init(void)
293 293
294static void i2c_pcfisa_exit(void) 294static void i2c_pcfisa_exit(void)
295{ 295{
296 i2c_pcf_del_bus(&pcf_isa_ops); 296 i2c_del_adapter(&pcf_isa_ops);
297 297
298 if (irq > 0) { 298 if (irq > 0) {
299 disable_irq(irq); 299 disable_irq(irq);
diff --git a/drivers/i2c/busses/i2c-hydra.c b/drivers/i2c/busses/i2c-hydra.c
index 457d48a0ab9d..9832f773651d 100644
--- a/drivers/i2c/busses/i2c-hydra.c
+++ b/drivers/i2c/busses/i2c-hydra.c
@@ -146,7 +146,7 @@ static int __devinit hydra_probe(struct pci_dev *dev,
146static void __devexit hydra_remove(struct pci_dev *dev) 146static void __devexit hydra_remove(struct pci_dev *dev)
147{ 147{
148 pdregw(hydra_bit_data.data, 0); /* clear SCLK_OE and SDAT_OE */ 148 pdregw(hydra_bit_data.data, 0); /* clear SCLK_OE and SDAT_OE */
149 i2c_bit_del_bus(&hydra_adap); 149 i2c_del_adapter(&hydra_adap);
150 iounmap(hydra_bit_data.data); 150 iounmap(hydra_bit_data.data);
151 release_mem_region(pci_resource_start(dev, 0)+ 151 release_mem_region(pci_resource_start(dev, 0)+
152 offsetof(struct Hydra, CachePD), 4); 152 offsetof(struct Hydra, CachePD), 4);
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index c7be2fdbd86b..ae625b854470 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -470,12 +470,20 @@ static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id
470 int err; 470 int err;
471 471
472 I801_dev = dev; 472 I801_dev = dev;
473 if ((dev->device == PCI_DEVICE_ID_INTEL_82801DB_3) || 473 switch (dev->device) {
474 (dev->device == PCI_DEVICE_ID_INTEL_82801EB_3) || 474 case PCI_DEVICE_ID_INTEL_82801DB_3:
475 (dev->device == PCI_DEVICE_ID_INTEL_ESB_4)) 475 case PCI_DEVICE_ID_INTEL_82801EB_3:
476 case PCI_DEVICE_ID_INTEL_ESB_4:
477 case PCI_DEVICE_ID_INTEL_ICH6_16:
478 case PCI_DEVICE_ID_INTEL_ICH7_17:
479 case PCI_DEVICE_ID_INTEL_ESB2_17:
480 case PCI_DEVICE_ID_INTEL_ICH8_5:
481 case PCI_DEVICE_ID_INTEL_ICH9_6:
476 isich4 = 1; 482 isich4 = 1;
477 else 483 break;
484 default:
478 isich4 = 0; 485 isich4 = 0;
486 }
479 487
480 err = pci_enable_device(dev); 488 err = pci_enable_device(dev);
481 if (err) { 489 if (err) {
diff --git a/drivers/i2c/busses/i2c-i810.c b/drivers/i2c/busses/i2c-i810.c
index b66fb6bb1870..10c98bc88aa6 100644
--- a/drivers/i2c/busses/i2c-i810.c
+++ b/drivers/i2c/busses/i2c-i810.c
@@ -219,14 +219,14 @@ static int __devinit i810_probe(struct pci_dev *dev, const struct pci_device_id
219 return retval; 219 return retval;
220 retval = i2c_bit_add_bus(&i810_ddc_adapter); 220 retval = i2c_bit_add_bus(&i810_ddc_adapter);
221 if (retval) 221 if (retval)
222 i2c_bit_del_bus(&i810_i2c_adapter); 222 i2c_del_adapter(&i810_i2c_adapter);
223 return retval; 223 return retval;
224} 224}
225 225
226static void __devexit i810_remove(struct pci_dev *dev) 226static void __devexit i810_remove(struct pci_dev *dev)
227{ 227{
228 i2c_bit_del_bus(&i810_ddc_adapter); 228 i2c_del_adapter(&i810_ddc_adapter);
229 i2c_bit_del_bus(&i810_i2c_adapter); 229 i2c_del_adapter(&i810_i2c_adapter);
230 iounmap(ioaddr); 230 iounmap(ioaddr);
231} 231}
232 232
diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c
index 781a99c1647a..1898e9987021 100644
--- a/drivers/i2c/busses/i2c-ibm_iic.c
+++ b/drivers/i2c/busses/i2c-ibm_iic.c
@@ -680,6 +680,12 @@ static int __devinit iic_probe(struct ocp_device *ocp){
680 dev->idx = ocp->def->index; 680 dev->idx = ocp->def->index;
681 ocp_set_drvdata(ocp, dev); 681 ocp_set_drvdata(ocp, dev);
682 682
683 if (!request_mem_region(ocp->def->paddr, sizeof(struct iic_regs),
684 "ibm_iic")) {
685 ret = -EBUSY;
686 goto fail1;
687 }
688
683 if (!(dev->vaddr = ioremap(ocp->def->paddr, sizeof(struct iic_regs)))){ 689 if (!(dev->vaddr = ioremap(ocp->def->paddr, sizeof(struct iic_regs)))){
684 printk(KERN_CRIT "ibm-iic%d: failed to ioremap device registers\n", 690 printk(KERN_CRIT "ibm-iic%d: failed to ioremap device registers\n",
685 dev->idx); 691 dev->idx);
@@ -750,6 +756,8 @@ fail:
750 756
751 iounmap(dev->vaddr); 757 iounmap(dev->vaddr);
752fail2: 758fail2:
759 release_mem_region(ocp->def->paddr, sizeof(struct iic_regs));
760fail1:
753 ocp_set_drvdata(ocp, NULL); 761 ocp_set_drvdata(ocp, NULL);
754 kfree(dev); 762 kfree(dev);
755 return ret; 763 return ret;
@@ -777,6 +785,7 @@ static void __devexit iic_remove(struct ocp_device *ocp)
777 free_irq(dev->irq, dev); 785 free_irq(dev->irq, dev);
778 } 786 }
779 iounmap(dev->vaddr); 787 iounmap(dev->vaddr);
788 release_mem_region(ocp->def->paddr, sizeof(struct iic_regs));
780 kfree(dev); 789 kfree(dev);
781 } 790 }
782} 791}
diff --git a/drivers/i2c/busses/i2c-ite.c b/drivers/i2c/busses/i2c-ite.c
deleted file mode 100644
index f7d71869b3b9..000000000000
--- a/drivers/i2c/busses/i2c-ite.c
+++ /dev/null
@@ -1,278 +0,0 @@
1/*
2 -------------------------------------------------------------------------
3 i2c-adap-ite.c i2c-hw access for the IIC peripheral on the ITE MIPS system
4 -------------------------------------------------------------------------
5 Hai-Pao Fan, MontaVista Software, Inc.
6 hpfan@mvista.com or source@mvista.com
7
8 Copyright 2001 MontaVista Software Inc.
9
10 ----------------------------------------------------------------------------
11 This file was highly leveraged from i2c-elektor.c, which was created
12 by Simon G. Vogl and Hans Berglund:
13
14
15 Copyright (C) 1995-97 Simon G. Vogl
16 1998-99 Hans Berglund
17
18 This program is free software; you can redistribute it and/or modify
19 it under the terms of the GNU General Public License as published by
20 the Free Software Foundation; either version 2 of the License, or
21 (at your option) any later version.
22
23 This program is distributed in the hope that it will be useful,
24 but WITHOUT ANY WARRANTY; without even the implied warranty of
25 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 GNU General Public License for more details.
27
28 You should have received a copy of the GNU General Public License
29 along with this program; if not, write to the Free Software
30 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
31/* ------------------------------------------------------------------------- */
32
33/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even
34 Frodo Looijaard <frodol@dds.nl> */
35
36#include <linux/kernel.h>
37#include <linux/ioport.h>
38#include <linux/module.h>
39#include <linux/delay.h>
40#include <linux/slab.h>
41#include <linux/init.h>
42#include <linux/wait.h>
43#include <asm/irq.h>
44#include <asm/io.h>
45
46#include <linux/i2c.h>
47#include <linux/i2c-algo-ite.h>
48#include <linux/i2c-adap-ite.h>
49#include "../i2c-ite.h"
50
51#define DEFAULT_BASE 0x14014030
52#define ITE_IIC_IO_SIZE 0x40
53#define DEFAULT_IRQ 0
54#define DEFAULT_CLOCK 0x1b0e /* default 16MHz/(27+14) = 400KHz */
55#define DEFAULT_OWN 0x55
56
57static int base;
58static int irq;
59static int clock;
60static int own;
61
62static struct iic_ite gpi;
63static wait_queue_head_t iic_wait;
64static int iic_pending;
65static spinlock_t lock;
66
67/* ----- local functions ---------------------------------------------- */
68
69static void iic_ite_setiic(void *data, int ctl, short val)
70{
71 unsigned long j = jiffies + 10;
72
73 pr_debug(" Write 0x%02x to 0x%x\n",(unsigned short)val, ctl&0xff);
74#ifdef DEBUG
75 while (time_before(jiffies, j))
76 schedule();
77#endif
78 outw(val,ctl);
79}
80
81static short iic_ite_getiic(void *data, int ctl)
82{
83 short val;
84
85 val = inw(ctl);
86 pr_debug("Read 0x%02x from 0x%x\n",(unsigned short)val, ctl&0xff);
87 return (val);
88}
89
90/* Return our slave address. This is the address
91 * put on the I2C bus when another master on the bus wants to address us
92 * as a slave
93 */
94static int iic_ite_getown(void *data)
95{
96 return (gpi.iic_own);
97}
98
99
100static int iic_ite_getclock(void *data)
101{
102 return (gpi.iic_clock);
103}
104
105
106/* Put this process to sleep. We will wake up when the
107 * IIC controller interrupts.
108 */
109static void iic_ite_waitforpin(void) {
110 DEFINE_WAIT(wait);
111 int timeout = 2;
112 unsigned long flags;
113
114 /* If interrupts are enabled (which they are), then put the process to
115 * sleep. This process will be awakened by two events -- either the
116 * the IIC peripheral interrupts or the timeout expires.
117 * If interrupts are not enabled then delay for a reasonable amount
118 * of time and return.
119 */
120 if (gpi.iic_irq > 0) {
121 spin_lock_irqsave(&lock, flags);
122 if (iic_pending == 0) {
123 spin_unlock_irqrestore(&lock, flags);
124 prepare_to_wait(&iic_wait, &wait, TASK_INTERRUPTIBLE);
125 if (schedule_timeout(timeout*HZ)) {
126 spin_lock_irqsave(&lock, flags);
127 if (iic_pending == 1) {
128 iic_pending = 0;
129 }
130 spin_unlock_irqrestore(&lock, flags);
131 }
132 finish_wait(&iic_wait, &wait);
133 } else {
134 iic_pending = 0;
135 spin_unlock_irqrestore(&lock, flags);
136 }
137 } else {
138 udelay(100);
139 }
140}
141
142
143static irqreturn_t iic_ite_handler(int this_irq, void *dev_id)
144{
145 spin_lock(&lock);
146 iic_pending = 1;
147 spin_unlock(&lock);
148
149 wake_up_interruptible(&iic_wait);
150
151 return IRQ_HANDLED;
152}
153
154
155/* Lock the region of memory where I/O registers exist. Request our
156 * interrupt line and register its associated handler.
157 */
158static int iic_hw_resrc_init(void)
159{
160 if (!request_region(gpi.iic_base, ITE_IIC_IO_SIZE, "i2c"))
161 return -ENODEV;
162
163 if (gpi.iic_irq <= 0)
164 return 0;
165
166 if (request_irq(gpi.iic_irq, iic_ite_handler, 0, "ITE IIC", 0) < 0)
167 gpi.iic_irq = 0;
168 else
169 enable_irq(gpi.iic_irq);
170
171 return 0;
172}
173
174
175static void iic_ite_release(void)
176{
177 if (gpi.iic_irq > 0) {
178 disable_irq(gpi.iic_irq);
179 free_irq(gpi.iic_irq, 0);
180 }
181 release_region(gpi.iic_base , 2);
182}
183
184/* ------------------------------------------------------------------------
185 * Encapsulate the above functions in the correct operations structure.
186 * This is only done when more than one hardware adapter is supported.
187 */
188static struct i2c_algo_iic_data iic_ite_data = {
189 NULL,
190 iic_ite_setiic,
191 iic_ite_getiic,
192 iic_ite_getown,
193 iic_ite_getclock,
194 iic_ite_waitforpin,
195 80, 80, 100, /* waits, timeout */
196};
197
198static struct i2c_adapter iic_ite_ops = {
199 .owner = THIS_MODULE,
200 .id = I2C_HW_I_IIC,
201 .algo_data = &iic_ite_data,
202 .name = "ITE IIC adapter",
203};
204
205/* Called when the module is loaded. This function starts the
206 * cascade of calls up through the hierarchy of i2c modules (i.e. up to the
207 * algorithm layer and into to the core layer)
208 */
209static int __init iic_ite_init(void)
210{
211
212 struct iic_ite *piic = &gpi;
213
214 printk(KERN_INFO "Initialize ITE IIC adapter module\n");
215 if (base == 0)
216 piic->iic_base = DEFAULT_BASE;
217 else
218 piic->iic_base = base;
219
220 if (irq == 0)
221 piic->iic_irq = DEFAULT_IRQ;
222 else
223 piic->iic_irq = irq;
224
225 if (clock == 0)
226 piic->iic_clock = DEFAULT_CLOCK;
227 else
228 piic->iic_clock = clock;
229
230 if (own == 0)
231 piic->iic_own = DEFAULT_OWN;
232 else
233 piic->iic_own = own;
234
235 iic_ite_data.data = (void *)piic;
236 init_waitqueue_head(&iic_wait);
237 spin_lock_init(&lock);
238 if (iic_hw_resrc_init() == 0) {
239 if (i2c_iic_add_bus(&iic_ite_ops) < 0)
240 return -ENODEV;
241 } else {
242 return -ENODEV;
243 }
244 printk(KERN_INFO " found device at %#x irq %d.\n",
245 piic->iic_base, piic->iic_irq);
246 return 0;
247}
248
249
250static void iic_ite_exit(void)
251{
252 i2c_iic_del_bus(&iic_ite_ops);
253 iic_ite_release();
254}
255
256/* If modules is NOT defined when this file is compiled, then the MODULE_*
257 * macros will resolve to nothing
258 */
259MODULE_AUTHOR("MontaVista Software <www.mvista.com>");
260MODULE_DESCRIPTION("I2C-Bus adapter routines for ITE IIC bus adapter");
261MODULE_LICENSE("GPL");
262
263module_param(base, int, 0);
264module_param(irq, int, 0);
265module_param(clock, int, 0);
266module_param(own, int, 0);
267
268
269/* Called when module is loaded or when kernel is initialized.
270 * If MODULES is defined when this file is compiled, then this function will
271 * resolve to init_module (the function called when insmod is invoked for a
272 * module). Otherwise, this function is called early in the boot, when the
273 * kernel is intialized. Check out /include/init.h to see how this works.
274 */
275module_init(iic_ite_init);
276
277/* Resolves to module_cleanup when MODULES is defined. */
278module_exit(iic_ite_exit);
diff --git a/drivers/i2c/busses/i2c-ixp2000.c b/drivers/i2c/busses/i2c-ixp2000.c
index dd3f4cd3aa68..efa3ecc5522a 100644
--- a/drivers/i2c/busses/i2c-ixp2000.c
+++ b/drivers/i2c/busses/i2c-ixp2000.c
@@ -90,7 +90,7 @@ static int ixp2000_i2c_remove(struct platform_device *plat_dev)
90 90
91 platform_set_drvdata(plat_dev, NULL); 91 platform_set_drvdata(plat_dev, NULL);
92 92
93 i2c_bit_del_bus(&drv_data->adapter); 93 i2c_del_adapter(&drv_data->adapter);
94 94
95 kfree(drv_data); 95 kfree(drv_data);
96 96
diff --git a/drivers/i2c/busses/i2c-ixp4xx.c b/drivers/i2c/busses/i2c-ixp4xx.c
index 68fe863f9d54..08e89b83984a 100644
--- a/drivers/i2c/busses/i2c-ixp4xx.c
+++ b/drivers/i2c/busses/i2c-ixp4xx.c
@@ -91,7 +91,7 @@ static int ixp4xx_i2c_remove(struct platform_device *plat_dev)
91 91
92 platform_set_drvdata(plat_dev, NULL); 92 platform_set_drvdata(plat_dev, NULL);
93 93
94 i2c_bit_del_bus(&drv_data->adapter); 94 i2c_del_adapter(&drv_data->adapter);
95 95
96 kfree(drv_data); 96 kfree(drv_data);
97 97
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index e0292e414ab2..ad37c10e7fec 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -35,7 +35,7 @@
35 nForce4 MCP55 0368 35 nForce4 MCP55 0368
36 36
37 This driver supports the 2 SMBuses that are included in the MCP of the 37 This driver supports the 2 SMBuses that are included in the MCP of the
38 nForce2/3/4 chipsets. 38 nForce2/3/4/5xx chipsets.
39*/ 39*/
40 40
41/* Note: we assume there can only be one nForce2, with two SMBus interfaces */ 41/* Note: we assume there can only be one nForce2, with two SMBus interfaces */
@@ -52,8 +52,8 @@
52#include <asm/io.h> 52#include <asm/io.h>
53 53
54MODULE_LICENSE("GPL"); 54MODULE_LICENSE("GPL");
55MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@arcor.de>"); 55MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
56MODULE_DESCRIPTION("nForce2 SMBus driver"); 56MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
57 57
58 58
59struct nforce2_smbus { 59struct nforce2_smbus {
@@ -80,9 +80,6 @@ struct nforce2_smbus {
80#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */ 80#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
81#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */ 81#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
82#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */ 82#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
83#define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data bytes */
84#define NVIDIA_SMB_ALRM_A (smbus->base + 0x25) /* alarm address */
85#define NVIDIA_SMB_ALRM_D (smbus->base + 0x26) /* 2 bytes alarm data */
86 83
87#define NVIDIA_SMB_STS_DONE 0x80 84#define NVIDIA_SMB_STS_DONE 0x80
88#define NVIDIA_SMB_STS_ALRM 0x40 85#define NVIDIA_SMB_STS_ALRM 0x40
@@ -95,40 +92,17 @@ struct nforce2_smbus {
95#define NVIDIA_SMB_PRTCL_BYTE 0x04 92#define NVIDIA_SMB_PRTCL_BYTE 0x04
96#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06 93#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
97#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08 94#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
98#define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a
99#define NVIDIA_SMB_PRTCL_PROC_CALL 0x0c
100#define NVIDIA_SMB_PRTCL_BLOCK_PROC_CALL 0x0d
101#define NVIDIA_SMB_PRTCL_I2C_BLOCK_DATA 0x4a
102#define NVIDIA_SMB_PRTCL_PEC 0x80 95#define NVIDIA_SMB_PRTCL_PEC 0x80
103 96
104static struct pci_driver nforce2_driver; 97static struct pci_driver nforce2_driver;
105 98
106static s32 nforce2_access(struct i2c_adapter *adap, u16 addr, 99/* Return -1 on error */
107 unsigned short flags, char read_write,
108 u8 command, int size, union i2c_smbus_data *data);
109static u32 nforce2_func(struct i2c_adapter *adapter);
110
111
112static const struct i2c_algorithm smbus_algorithm = {
113 .smbus_xfer = nforce2_access,
114 .functionality = nforce2_func,
115};
116
117static struct i2c_adapter nforce2_adapter = {
118 .owner = THIS_MODULE,
119 .class = I2C_CLASS_HWMON,
120 .algo = &smbus_algorithm,
121};
122
123/* Return -1 on error. See smbus.h for more information */
124static s32 nforce2_access(struct i2c_adapter * adap, u16 addr, 100static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
125 unsigned short flags, char read_write, 101 unsigned short flags, char read_write,
126 u8 command, int size, union i2c_smbus_data * data) 102 u8 command, int size, union i2c_smbus_data * data)
127{ 103{
128 struct nforce2_smbus *smbus = adap->algo_data; 104 struct nforce2_smbus *smbus = adap->algo_data;
129 unsigned char protocol, pec, temp; 105 unsigned char protocol, pec, temp;
130 unsigned char len = 0; /* to keep the compiler quiet */
131 int i;
132 106
133 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ : 107 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
134 NVIDIA_SMB_PRTCL_WRITE; 108 NVIDIA_SMB_PRTCL_WRITE;
@@ -163,35 +137,6 @@ static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
163 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec; 137 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
164 break; 138 break;
165 139
166 case I2C_SMBUS_BLOCK_DATA:
167 outb_p(command, NVIDIA_SMB_CMD);
168 if (read_write == I2C_SMBUS_WRITE) {
169 len = min_t(u8, data->block[0], 32);
170 outb_p(len, NVIDIA_SMB_BCNT);
171 for (i = 0; i < len; i++)
172 outb_p(data->block[i + 1], NVIDIA_SMB_DATA+i);
173 }
174 protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
175 break;
176
177 case I2C_SMBUS_I2C_BLOCK_DATA:
178 len = min_t(u8, data->block[0], 32);
179 outb_p(command, NVIDIA_SMB_CMD);
180 outb_p(len, NVIDIA_SMB_BCNT);
181 if (read_write == I2C_SMBUS_WRITE)
182 for (i = 0; i < len; i++)
183 outb_p(data->block[i + 1], NVIDIA_SMB_DATA+i);
184 protocol |= NVIDIA_SMB_PRTCL_I2C_BLOCK_DATA;
185 break;
186
187 case I2C_SMBUS_PROC_CALL:
188 dev_err(&adap->dev, "I2C_SMBUS_PROC_CALL not supported!\n");
189 return -1;
190
191 case I2C_SMBUS_BLOCK_PROC_CALL:
192 dev_err(&adap->dev, "I2C_SMBUS_BLOCK_PROC_CALL not supported!\n");
193 return -1;
194
195 default: 140 default:
196 dev_err(&adap->dev, "Unsupported transaction %d\n", size); 141 dev_err(&adap->dev, "Unsupported transaction %d\n", size);
197 return -1; 142 return -1;
@@ -227,19 +172,8 @@ static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
227 break; 172 break;
228 173
229 case I2C_SMBUS_WORD_DATA: 174 case I2C_SMBUS_WORD_DATA:
230 /* case I2C_SMBUS_PROC_CALL: not supported */
231 data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8); 175 data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
232 break; 176 break;
233
234 case I2C_SMBUS_BLOCK_DATA:
235 /* case I2C_SMBUS_BLOCK_PROC_CALL: not supported */
236 len = inb_p(NVIDIA_SMB_BCNT);
237 len = min_t(u8, len, 32);
238 case I2C_SMBUS_I2C_BLOCK_DATA:
239 for (i = 0; i < len; i++)
240 data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
241 data->block[0] = len;
242 break;
243 } 177 }
244 178
245 return 0; 179 return 0;
@@ -250,10 +184,14 @@ static u32 nforce2_func(struct i2c_adapter *adapter)
250{ 184{
251 /* other functionality might be possible, but is not tested */ 185 /* other functionality might be possible, but is not tested */
252 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 186 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
253 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA /* | 187 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA;
254 I2C_FUNC_SMBUS_BLOCK_DATA */;
255} 188}
256 189
190static struct i2c_algorithm smbus_algorithm = {
191 .smbus_xfer = nforce2_access,
192 .functionality = nforce2_func,
193};
194
257 195
258static struct pci_device_id nforce2_ids[] = { 196static struct pci_device_id nforce2_ids[] = {
259 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) }, 197 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
@@ -267,7 +205,6 @@ static struct pci_device_id nforce2_ids[] = {
267 { 0 } 205 { 0 }
268}; 206};
269 207
270
271MODULE_DEVICE_TABLE (pci, nforce2_ids); 208MODULE_DEVICE_TABLE (pci, nforce2_ids);
272 209
273 210
@@ -291,7 +228,7 @@ static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
291 } 228 }
292 229
293 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK; 230 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
294 smbus->size = 8; 231 smbus->size = 64;
295 } 232 }
296 smbus->dev = dev; 233 smbus->dev = dev;
297 234
@@ -300,7 +237,9 @@ static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
300 smbus->base, smbus->base+smbus->size-1, name); 237 smbus->base, smbus->base+smbus->size-1, name);
301 return -1; 238 return -1;
302 } 239 }
303 smbus->adapter = nforce2_adapter; 240 smbus->adapter.owner = THIS_MODULE;
241 smbus->adapter.class = I2C_CLASS_HWMON;
242 smbus->adapter.algo = &smbus_algorithm;
304 smbus->adapter.algo_data = smbus; 243 smbus->adapter.algo_data = smbus;
305 smbus->adapter.dev.parent = &dev->dev; 244 smbus->adapter.dev.parent = &dev->dev;
306 snprintf(smbus->adapter.name, I2C_NAME_SIZE, 245 snprintf(smbus->adapter.name, I2C_NAME_SIZE,
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index dec04da0455c..bcd8367cede1 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -231,8 +231,8 @@ static int omap_i2c_init(struct omap_i2c_dev *dev)
231 * 13 2 1 231 * 13 2 1
232 * 19.2 2 1 232 * 19.2 2 1
233 */ 233 */
234 if (fclk_rate > 16000000) 234 if (fclk_rate > 12000000)
235 psc = (fclk_rate + 8000000) / 12000000; 235 psc = fclk_rate / 12000000;
236 } 236 }
237 237
238 /* Setup clock prescaler to obtain approx 12MHz I2C module clock: */ 238 /* Setup clock prescaler to obtain approx 12MHz I2C module clock: */
diff --git a/drivers/i2c/busses/i2c-parport-light.c b/drivers/i2c/busses/i2c-parport-light.c
index 5eb2bd294fd9..4bc42810b9aa 100644
--- a/drivers/i2c/busses/i2c-parport-light.c
+++ b/drivers/i2c/busses/i2c-parport-light.c
@@ -163,7 +163,7 @@ static void __exit i2c_parport_exit(void)
163 if (adapter_parm[type].init.val) 163 if (adapter_parm[type].init.val)
164 line_set(0, &adapter_parm[type].init); 164 line_set(0, &adapter_parm[type].init);
165 165
166 i2c_bit_del_bus(&parport_adapter); 166 i2c_del_adapter(&parport_adapter);
167 release_region(base, 3); 167 release_region(base, 3);
168} 168}
169 169
diff --git a/drivers/i2c/busses/i2c-parport.c b/drivers/i2c/busses/i2c-parport.c
index 48a829431c7b..66696a40c7b5 100644
--- a/drivers/i2c/busses/i2c-parport.c
+++ b/drivers/i2c/busses/i2c-parport.c
@@ -218,7 +218,7 @@ static void i2c_parport_detach (struct parport *port)
218 if (adapter_parm[type].init.val) 218 if (adapter_parm[type].init.val)
219 line_set(port, 0, &adapter_parm[type].init); 219 line_set(port, 0, &adapter_parm[type].init);
220 220
221 i2c_bit_del_bus(&adapter->adapter); 221 i2c_del_adapter(&adapter->adapter);
222 parport_unregister_device(adapter->pdev); 222 parport_unregister_device(adapter->pdev);
223 if (prev) 223 if (prev)
224 prev->next = adapter->next; 224 prev->next = adapter->next;
diff --git a/drivers/i2c/busses/i2c-pca-isa.c b/drivers/i2c/busses/i2c-pca-isa.c
index 407840b6a260..cc6536a19eca 100644
--- a/drivers/i2c/busses/i2c-pca-isa.c
+++ b/drivers/i2c/busses/i2c-pca-isa.c
@@ -156,7 +156,7 @@ static int __init pca_isa_init(void)
156 156
157static void pca_isa_exit(void) 157static void pca_isa_exit(void)
158{ 158{
159 i2c_pca_del_bus(&pca_isa_ops); 159 i2c_del_adapter(&pca_isa_ops);
160 160
161 if (irq > 0) { 161 if (irq > 0) {
162 disable_irq(irq); 162 disable_irq(irq);
diff --git a/drivers/i2c/busses/i2c-pnx.c b/drivers/i2c/busses/i2c-pnx.c
new file mode 100644
index 000000000000..de0bca77e926
--- /dev/null
+++ b/drivers/i2c/busses/i2c-pnx.c
@@ -0,0 +1,708 @@
1/*
2 * Provides I2C support for Philips PNX010x/PNX4008 boards.
3 *
4 * Authors: Dennis Kovalev <dkovalev@ru.mvista.com>
5 * Vitaly Wool <vwool@ru.mvista.com>
6 *
7 * 2004-2006 (c) MontaVista Software, Inc. This file is licensed under
8 * the terms of the GNU General Public License version 2. This program
9 * is licensed "as is" without any warranty of any kind, whether express
10 * or implied.
11 */
12
13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/ioport.h>
16#include <linux/delay.h>
17#include <linux/i2c.h>
18#include <linux/timer.h>
19#include <linux/completion.h>
20#include <linux/platform_device.h>
21#include <linux/i2c-pnx.h>
22#include <asm/hardware.h>
23#include <asm/irq.h>
24#include <asm/uaccess.h>
25
26#define I2C_PNX_TIMEOUT 10 /* msec */
27#define I2C_PNX_SPEED_KHZ 100
28#define I2C_PNX_REGION_SIZE 0x100
29#define PNX_DEFAULT_FREQ 13 /* MHz */
30
31static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
32{
33 while (timeout > 0 &&
34 (ioread32(I2C_REG_STS(data)) & mstatus_active)) {
35 mdelay(1);
36 timeout--;
37 }
38 return (timeout <= 0);
39}
40
41static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
42{
43 while (timeout > 0 &&
44 (ioread32(I2C_REG_CTL(data)) & mcntrl_reset)) {
45 mdelay(1);
46 timeout--;
47 }
48 return (timeout <= 0);
49}
50
51static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap)
52{
53 struct i2c_pnx_algo_data *data = adap->algo_data;
54 struct timer_list *timer = &data->mif.timer;
55 int expires = I2C_PNX_TIMEOUT / (1000 / HZ);
56
57 del_timer_sync(timer);
58
59 dev_dbg(&adap->dev, "Timer armed at %lu plus %u jiffies.\n",
60 jiffies, expires);
61
62 timer->expires = jiffies + expires;
63 timer->data = (unsigned long)adap;
64
65 add_timer(timer);
66}
67
68/**
69 * i2c_pnx_start - start a device
70 * @slave_addr: slave address
71 * @adap: pointer to adapter structure
72 *
73 * Generate a START signal in the desired mode.
74 */
75static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
76{
77 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
78
79 dev_dbg(&adap->dev, "%s(): addr 0x%x mode %d\n", __FUNCTION__,
80 slave_addr, alg_data->mif.mode);
81
82 /* Check for 7 bit slave addresses only */
83 if (slave_addr & ~0x7f) {
84 dev_err(&adap->dev, "%s: Invalid slave address %x. "
85 "Only 7-bit addresses are supported\n",
86 adap->name, slave_addr);
87 return -EINVAL;
88 }
89
90 /* First, make sure bus is idle */
91 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
92 /* Somebody else is monopolizing the bus */
93 dev_err(&adap->dev, "%s: Bus busy. Slave addr = %02x, "
94 "cntrl = %x, stat = %x\n",
95 adap->name, slave_addr,
96 ioread32(I2C_REG_CTL(alg_data)),
97 ioread32(I2C_REG_STS(alg_data)));
98 return -EBUSY;
99 } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {
100 /* Sorry, we lost the bus */
101 dev_err(&adap->dev, "%s: Arbitration failure. "
102 "Slave addr = %02x\n", adap->name, slave_addr);
103 return -EIO;
104 }
105
106 /*
107 * OK, I2C is enabled and we have the bus.
108 * Clear the current TDI and AFI status flags.
109 */
110 iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
111 I2C_REG_STS(alg_data));
112
113 dev_dbg(&adap->dev, "%s(): sending %#x\n", __FUNCTION__,
114 (slave_addr << 1) | start_bit | alg_data->mif.mode);
115
116 /* Write the slave address, START bit and R/W bit */
117 iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
118 I2C_REG_TX(alg_data));
119
120 dev_dbg(&adap->dev, "%s(): exit\n", __FUNCTION__);
121
122 return 0;
123}
124
125/**
126 * i2c_pnx_stop - stop a device
127 * @adap: pointer to I2C adapter structure
128 *
129 * Generate a STOP signal to terminate the master transaction.
130 */
131static void i2c_pnx_stop(struct i2c_adapter *adap)
132{
133 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
134 /* Only 1 msec max timeout due to interrupt context */
135 long timeout = 1000;
136
137 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
138 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
139
140 /* Write a STOP bit to TX FIFO */
141 iowrite32(0xff | stop_bit, I2C_REG_TX(alg_data));
142
143 /* Wait until the STOP is seen. */
144 while (timeout > 0 &&
145 (ioread32(I2C_REG_STS(alg_data)) & mstatus_active)) {
146 /* may be called from interrupt context */
147 udelay(1);
148 timeout--;
149 }
150
151 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
152 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
153}
154
155/**
156 * i2c_pnx_master_xmit - transmit data to slave
157 * @adap: pointer to I2C adapter structure
158 *
159 * Sends one byte of data to the slave
160 */
161static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
162{
163 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
164 u32 val;
165
166 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
167 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
168
169 if (alg_data->mif.len > 0) {
170 /* We still have something to talk about... */
171 val = *alg_data->mif.buf++;
172
173 if (alg_data->mif.len == 1) {
174 val |= stop_bit;
175 if (!alg_data->last)
176 val |= start_bit;
177 }
178
179 alg_data->mif.len--;
180 iowrite32(val, I2C_REG_TX(alg_data));
181
182 dev_dbg(&adap->dev, "%s(): xmit %#x [%d]\n", __FUNCTION__,
183 val, alg_data->mif.len + 1);
184
185 if (alg_data->mif.len == 0) {
186 if (alg_data->last) {
187 /* Wait until the STOP is seen. */
188 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
189 dev_err(&adap->dev, "The bus is still "
190 "active after timeout\n");
191 }
192 /* Disable master interrupts */
193 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
194 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
195 I2C_REG_CTL(alg_data));
196
197 del_timer_sync(&alg_data->mif.timer);
198
199 dev_dbg(&adap->dev, "%s(): Waking up xfer routine.\n",
200 __FUNCTION__);
201
202 complete(&alg_data->mif.complete);
203 }
204 } else if (alg_data->mif.len == 0) {
205 /* zero-sized transfer */
206 i2c_pnx_stop(adap);
207
208 /* Disable master interrupts. */
209 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
210 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
211 I2C_REG_CTL(alg_data));
212
213 /* Stop timer. */
214 del_timer_sync(&alg_data->mif.timer);
215 dev_dbg(&adap->dev, "%s(): Waking up xfer routine after "
216 "zero-xfer.\n", __FUNCTION__);
217
218 complete(&alg_data->mif.complete);
219 }
220
221 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
222 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
223
224 return 0;
225}
226
227/**
228 * i2c_pnx_master_rcv - receive data from slave
229 * @adap: pointer to I2C adapter structure
230 *
231 * Reads one byte data from the slave
232 */
233static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
234{
235 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
236 unsigned int val = 0;
237 u32 ctl = 0;
238
239 dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
240 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
241
242 /* Check, whether there is already data,
243 * or we didn't 'ask' for it yet.
244 */
245 if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
246 dev_dbg(&adap->dev, "%s(): Write dummy data to fill "
247 "Rx-fifo...\n", __FUNCTION__);
248
249 if (alg_data->mif.len == 1) {
250 /* Last byte, do not acknowledge next rcv. */
251 val |= stop_bit;
252 if (!alg_data->last)
253 val |= start_bit;
254
255 /*
256 * Enable interrupt RFDAIE (data in Rx fifo),
257 * and disable DRMIE (need data for Tx)
258 */
259 ctl = ioread32(I2C_REG_CTL(alg_data));
260 ctl |= mcntrl_rffie | mcntrl_daie;
261 ctl &= ~mcntrl_drmie;
262 iowrite32(ctl, I2C_REG_CTL(alg_data));
263 }
264
265 /*
266 * Now we'll 'ask' for data:
267 * For each byte we want to receive, we must
268 * write a (dummy) byte to the Tx-FIFO.
269 */
270 iowrite32(val, I2C_REG_TX(alg_data));
271
272 return 0;
273 }
274
275 /* Handle data. */
276 if (alg_data->mif.len > 0) {
277 val = ioread32(I2C_REG_RX(alg_data));
278 *alg_data->mif.buf++ = (u8) (val & 0xff);
279 dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]\n", __FUNCTION__, val,
280 alg_data->mif.len);
281
282 alg_data->mif.len--;
283 if (alg_data->mif.len == 0) {
284 if (alg_data->last)
285 /* Wait until the STOP is seen. */
286 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
287 dev_err(&adap->dev, "The bus is still "
288 "active after timeout\n");
289
290 /* Disable master interrupts */
291 ctl = ioread32(I2C_REG_CTL(alg_data));
292 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
293 mcntrl_drmie | mcntrl_daie);
294 iowrite32(ctl, I2C_REG_CTL(alg_data));
295
296 /* Kill timer. */
297 del_timer_sync(&alg_data->mif.timer);
298 complete(&alg_data->mif.complete);
299 }
300 }
301
302 dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
303 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
304
305 return 0;
306}
307
308static irqreturn_t
309i2c_pnx_interrupt(int irq, void *dev_id, struct pt_regs *regs)
310{
311 u32 stat, ctl;
312 struct i2c_adapter *adap = dev_id;
313 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
314
315 dev_dbg(&adap->dev, "%s(): mstat = %x mctrl = %x, mode = %d\n",
316 __FUNCTION__,
317 ioread32(I2C_REG_STS(alg_data)),
318 ioread32(I2C_REG_CTL(alg_data)),
319 alg_data->mif.mode);
320 stat = ioread32(I2C_REG_STS(alg_data));
321
322 /* let's see what kind of event this is */
323 if (stat & mstatus_afi) {
324 /* We lost arbitration in the midst of a transfer */
325 alg_data->mif.ret = -EIO;
326
327 /* Disable master interrupts. */
328 ctl = ioread32(I2C_REG_CTL(alg_data));
329 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
330 mcntrl_drmie);
331 iowrite32(ctl, I2C_REG_CTL(alg_data));
332
333 /* Stop timer, to prevent timeout. */
334 del_timer_sync(&alg_data->mif.timer);
335 complete(&alg_data->mif.complete);
336 } else if (stat & mstatus_nai) {
337 /* Slave did not acknowledge, generate a STOP */
338 dev_dbg(&adap->dev, "%s(): "
339 "Slave did not acknowledge, generating a STOP.\n",
340 __FUNCTION__);
341 i2c_pnx_stop(adap);
342
343 /* Disable master interrupts. */
344 ctl = ioread32(I2C_REG_CTL(alg_data));
345 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
346 mcntrl_drmie);
347 iowrite32(ctl, I2C_REG_CTL(alg_data));
348
349 /* Our return value. */
350 alg_data->mif.ret = -EIO;
351
352 /* Stop timer, to prevent timeout. */
353 del_timer_sync(&alg_data->mif.timer);
354 complete(&alg_data->mif.complete);
355 } else {
356 /*
357 * Two options:
358 * - Master Tx needs data.
359 * - There is data in the Rx-fifo
360 * The latter is only the case if we have requested for data,
361 * via a dummy write. (See 'i2c_pnx_master_rcv'.)
362 * We therefore check, as a sanity check, whether that interrupt
363 * has been enabled.
364 */
365 if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) {
366 if (alg_data->mif.mode == I2C_SMBUS_WRITE) {
367 i2c_pnx_master_xmit(adap);
368 } else if (alg_data->mif.mode == I2C_SMBUS_READ) {
369 i2c_pnx_master_rcv(adap);
370 }
371 }
372 }
373
374 /* Clear TDI and AFI bits */
375 stat = ioread32(I2C_REG_STS(alg_data));
376 iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
377
378 dev_dbg(&adap->dev, "%s(): exiting, stat = %x ctrl = %x.\n",
379 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)),
380 ioread32(I2C_REG_CTL(alg_data)));
381
382 return IRQ_HANDLED;
383}
384
385static void i2c_pnx_timeout(unsigned long data)
386{
387 struct i2c_adapter *adap = (struct i2c_adapter *)data;
388 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
389 u32 ctl;
390
391 dev_err(&adap->dev, "Master timed out. stat = %04x, cntrl = %04x. "
392 "Resetting master...\n",
393 ioread32(I2C_REG_STS(alg_data)),
394 ioread32(I2C_REG_CTL(alg_data)));
395
396 /* Reset master and disable interrupts */
397 ctl = ioread32(I2C_REG_CTL(alg_data));
398 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | mcntrl_drmie);
399 iowrite32(ctl, I2C_REG_CTL(alg_data));
400
401 ctl |= mcntrl_reset;
402 iowrite32(ctl, I2C_REG_CTL(alg_data));
403 wait_reset(I2C_PNX_TIMEOUT, alg_data);
404 alg_data->mif.ret = -EIO;
405 complete(&alg_data->mif.complete);
406}
407
408static inline void bus_reset_if_active(struct i2c_adapter *adap)
409{
410 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
411 u32 stat;
412
413 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {
414 dev_err(&adap->dev,
415 "%s: Bus is still active after xfer. Reset it...\n",
416 adap->name);
417 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
418 I2C_REG_CTL(alg_data));
419 wait_reset(I2C_PNX_TIMEOUT, alg_data);
420 } else if (!(stat & mstatus_rfe) || !(stat & mstatus_tfe)) {
421 /* If there is data in the fifo's after transfer,
422 * flush fifo's by reset.
423 */
424 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
425 I2C_REG_CTL(alg_data));
426 wait_reset(I2C_PNX_TIMEOUT, alg_data);
427 } else if (stat & mstatus_nai) {
428 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
429 I2C_REG_CTL(alg_data));
430 wait_reset(I2C_PNX_TIMEOUT, alg_data);
431 }
432}
433
434/**
435 * i2c_pnx_xfer - generic transfer entry point
436 * @adap: pointer to I2C adapter structure
437 * @msgs: array of messages
438 * @num: number of messages
439 *
440 * Initiates the transfer
441 */
442static int
443i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
444{
445 struct i2c_msg *pmsg;
446 int rc = 0, completed = 0, i;
447 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
448 u32 stat = ioread32(I2C_REG_STS(alg_data));
449
450 dev_dbg(&adap->dev, "%s(): entering: %d messages, stat = %04x.\n",
451 __FUNCTION__, num, ioread32(I2C_REG_STS(alg_data)));
452
453 bus_reset_if_active(adap);
454
455 /* Process transactions in a loop. */
456 for (i = 0; rc >= 0 && i < num; i++) {
457 u8 addr;
458
459 pmsg = &msgs[i];
460 addr = pmsg->addr;
461
462 if (pmsg->flags & I2C_M_TEN) {
463 dev_err(&adap->dev,
464 "%s: 10 bits addr not supported!\n",
465 adap->name);
466 rc = -EINVAL;
467 break;
468 }
469
470 alg_data->mif.buf = pmsg->buf;
471 alg_data->mif.len = pmsg->len;
472 alg_data->mif.mode = (pmsg->flags & I2C_M_RD) ?
473 I2C_SMBUS_READ : I2C_SMBUS_WRITE;
474 alg_data->mif.ret = 0;
475 alg_data->last = (i == num - 1);
476
477 dev_dbg(&adap->dev, "%s(): mode %d, %d bytes\n", __FUNCTION__,
478 alg_data->mif.mode,
479 alg_data->mif.len);
480
481 i2c_pnx_arm_timer(adap);
482
483 /* initialize the completion var */
484 init_completion(&alg_data->mif.complete);
485
486 /* Enable master interrupt */
487 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_afie |
488 mcntrl_naie | mcntrl_drmie,
489 I2C_REG_CTL(alg_data));
490
491 /* Put start-code and slave-address on the bus. */
492 rc = i2c_pnx_start(addr, adap);
493 if (rc < 0)
494 break;
495
496 /* Wait for completion */
497 wait_for_completion(&alg_data->mif.complete);
498
499 if (!(rc = alg_data->mif.ret))
500 completed++;
501 dev_dbg(&adap->dev, "%s(): Complete, return code = %d.\n",
502 __FUNCTION__, rc);
503
504 /* Clear TDI and AFI bits in case they are set. */
505 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
506 dev_dbg(&adap->dev,
507 "%s: TDI still set... clearing now.\n",
508 adap->name);
509 iowrite32(stat, I2C_REG_STS(alg_data));
510 }
511 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {
512 dev_dbg(&adap->dev,
513 "%s: AFI still set... clearing now.\n",
514 adap->name);
515 iowrite32(stat, I2C_REG_STS(alg_data));
516 }
517 }
518
519 bus_reset_if_active(adap);
520
521 /* Cleanup to be sure... */
522 alg_data->mif.buf = NULL;
523 alg_data->mif.len = 0;
524
525 dev_dbg(&adap->dev, "%s(): exiting, stat = %x\n",
526 __FUNCTION__, ioread32(I2C_REG_STS(alg_data)));
527
528 if (completed != num)
529 return ((rc < 0) ? rc : -EREMOTEIO);
530
531 return num;
532}
533
534static u32 i2c_pnx_func(struct i2c_adapter *adapter)
535{
536 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
537}
538
539static struct i2c_algorithm pnx_algorithm = {
540 .master_xfer = i2c_pnx_xfer,
541 .functionality = i2c_pnx_func,
542};
543
544static int i2c_pnx_controller_suspend(struct platform_device *pdev,
545 pm_message_t state)
546{
547 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
548 return i2c_pnx->suspend(pdev, state);
549}
550
551static int i2c_pnx_controller_resume(struct platform_device *pdev)
552{
553 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
554 return i2c_pnx->resume(pdev);
555}
556
557static int __devinit i2c_pnx_probe(struct platform_device *pdev)
558{
559 unsigned long tmp;
560 int ret = 0;
561 struct i2c_pnx_algo_data *alg_data;
562 int freq_mhz;
563 struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
564
565 if (!i2c_pnx || !i2c_pnx->adapter) {
566 dev_err(&pdev->dev, "%s: no platform data supplied\n",
567 __FUNCTION__);
568 ret = -EINVAL;
569 goto out;
570 }
571
572 platform_set_drvdata(pdev, i2c_pnx);
573
574 if (i2c_pnx->calculate_input_freq)
575 freq_mhz = i2c_pnx->calculate_input_freq(pdev);
576 else {
577 freq_mhz = PNX_DEFAULT_FREQ;
578 dev_info(&pdev->dev, "Setting bus frequency to default value: "
579 "%d MHz", freq_mhz);
580 }
581
582 i2c_pnx->adapter->algo = &pnx_algorithm;
583
584 alg_data = i2c_pnx->adapter->algo_data;
585 init_timer(&alg_data->mif.timer);
586 alg_data->mif.timer.function = i2c_pnx_timeout;
587 alg_data->mif.timer.data = (unsigned long)i2c_pnx->adapter;
588
589 /* Register I/O resource */
590 if (!request_region(alg_data->base, I2C_PNX_REGION_SIZE, pdev->name)) {
591 dev_err(&pdev->dev,
592 "I/O region 0x%08x for I2C already in use.\n",
593 alg_data->base);
594 ret = -ENODEV;
595 goto out_drvdata;
596 }
597
598 if (!(alg_data->ioaddr =
599 (u32)ioremap(alg_data->base, I2C_PNX_REGION_SIZE))) {
600 dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
601 ret = -ENOMEM;
602 goto out_release;
603 }
604
605 i2c_pnx->set_clock_run(pdev);
606
607 /*
608 * Clock Divisor High This value is the number of system clocks
609 * the serial clock (SCL) will be high.
610 * For example, if the system clock period is 50 ns and the maximum
611 * desired serial period is 10000 ns (100 kHz), then CLKHI would be
612 * set to 0.5*(f_sys/f_i2c)-2=0.5*(20e6/100e3)-2=98. The actual value
613 * programmed into CLKHI will vary from this slightly due to
614 * variations in the output pad's rise and fall times as well as
615 * the deglitching filter length.
616 */
617
618 tmp = ((freq_mhz * 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
619 iowrite32(tmp, I2C_REG_CKH(alg_data));
620 iowrite32(tmp, I2C_REG_CKL(alg_data));
621
622 iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
623 if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
624 ret = -ENODEV;
625 goto out_unmap;
626 }
627 init_completion(&alg_data->mif.complete);
628
629 ret = request_irq(alg_data->irq, i2c_pnx_interrupt,
630 0, pdev->name, i2c_pnx->adapter);
631 if (ret)
632 goto out_clock;
633
634 /* Register this adapter with the I2C subsystem */
635 i2c_pnx->adapter->dev.parent = &pdev->dev;
636 ret = i2c_add_adapter(i2c_pnx->adapter);
637 if (ret < 0) {
638 dev_err(&pdev->dev, "I2C: Failed to add bus\n");
639 goto out_irq;
640 }
641
642 dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
643 i2c_pnx->adapter->name, alg_data->base, alg_data->irq);
644
645 return 0;
646
647out_irq:
648 free_irq(alg_data->irq, alg_data);
649out_clock:
650 i2c_pnx->set_clock_stop(pdev);
651out_unmap:
652 iounmap((void *)alg_data->ioaddr);
653out_release:
654 release_region(alg_data->base, I2C_PNX_REGION_SIZE);
655out_drvdata:
656 platform_set_drvdata(pdev, NULL);
657out:
658 return ret;
659}
660
661static int __devexit i2c_pnx_remove(struct platform_device *pdev)
662{
663 struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
664 struct i2c_adapter *adap = i2c_pnx->adapter;
665 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
666
667 free_irq(alg_data->irq, alg_data);
668 i2c_del_adapter(adap);
669 i2c_pnx->set_clock_stop(pdev);
670 iounmap((void *)alg_data->ioaddr);
671 release_region(alg_data->base, I2C_PNX_REGION_SIZE);
672 platform_set_drvdata(pdev, NULL);
673
674 return 0;
675}
676
677static struct platform_driver i2c_pnx_driver = {
678 .driver = {
679 .name = "pnx-i2c",
680 .owner = THIS_MODULE,
681 },
682 .probe = i2c_pnx_probe,
683 .remove = __devexit_p(i2c_pnx_remove),
684 .suspend = i2c_pnx_controller_suspend,
685 .resume = i2c_pnx_controller_resume,
686};
687
688static int __init i2c_adap_pnx_init(void)
689{
690 return platform_driver_register(&i2c_pnx_driver);
691}
692
693static void __exit i2c_adap_pnx_exit(void)
694{
695 platform_driver_unregister(&i2c_pnx_driver);
696}
697
698MODULE_AUTHOR("Vitaly Wool, Dennis Kovalev <source@mvista.com>");
699MODULE_DESCRIPTION("I2C driver for Philips IP3204-based I2C busses");
700MODULE_LICENSE("GPL");
701
702#ifdef CONFIG_I2C_PNX_EARLY
703/* We need to make sure I2C is initialized before USB */
704subsys_initcall(i2c_adap_pnx_init);
705#else
706mudule_init(i2c_adap_pnx_init);
707#endif
708module_exit(i2c_adap_pnx_exit);
diff --git a/drivers/i2c/busses/i2c-prosavage.c b/drivers/i2c/busses/i2c-prosavage.c
index 7745e21874a8..07c1f1e27df1 100644
--- a/drivers/i2c/busses/i2c-prosavage.c
+++ b/drivers/i2c/busses/i2c-prosavage.c
@@ -212,7 +212,7 @@ static void prosavage_remove(struct pci_dev *dev)
212 if (chip->i2c_bus[i].adap_ok == 0) 212 if (chip->i2c_bus[i].adap_ok == 0)
213 continue; 213 continue;
214 214
215 ret = i2c_bit_del_bus(&chip->i2c_bus[i].adap); 215 ret = i2c_del_adapter(&chip->i2c_bus[i].adap);
216 if (ret) { 216 if (ret) {
217 dev_err(&dev->dev, "%s not removed\n", 217 dev_err(&dev->dev, "%s not removed\n",
218 chip->i2c_bus[i].adap.name); 218 chip->i2c_bus[i].adap.name);
diff --git a/drivers/i2c/busses/i2c-savage4.c b/drivers/i2c/busses/i2c-savage4.c
index 209f47ea1750..844b4ff90893 100644
--- a/drivers/i2c/busses/i2c-savage4.c
+++ b/drivers/i2c/busses/i2c-savage4.c
@@ -173,7 +173,7 @@ static int __devinit savage4_probe(struct pci_dev *dev, const struct pci_device_
173 173
174static void __devexit savage4_remove(struct pci_dev *dev) 174static void __devexit savage4_remove(struct pci_dev *dev)
175{ 175{
176 i2c_bit_del_bus(&savage4_i2c_adapter); 176 i2c_del_adapter(&savage4_i2c_adapter);
177 iounmap(ioaddr); 177 iounmap(ioaddr);
178} 178}
179 179
diff --git a/drivers/i2c/busses/i2c-versatile.c b/drivers/i2c/busses/i2c-versatile.c
new file mode 100644
index 000000000000..081d9578ce10
--- /dev/null
+++ b/drivers/i2c/busses/i2c-versatile.c
@@ -0,0 +1,153 @@
1/*
2 * i2c-versatile.c
3 *
4 * Copyright (C) 2006 ARM Ltd.
5 * written by Russell King, Deep Blue Solutions Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/i2c.h>
14#include <linux/i2c-algo-bit.h>
15#include <linux/init.h>
16#include <linux/platform_device.h>
17
18#include <asm/io.h>
19
20#define I2C_CONTROL 0x00
21#define I2C_CONTROLS 0x00
22#define I2C_CONTROLC 0x04
23#define SCL (1 << 0)
24#define SDA (1 << 1)
25
26struct i2c_versatile {
27 struct i2c_adapter adap;
28 struct i2c_algo_bit_data algo;
29 void __iomem *base;
30};
31
32static void i2c_versatile_setsda(void *data, int state)
33{
34 struct i2c_versatile *i2c = data;
35
36 writel(SDA, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC));
37}
38
39static void i2c_versatile_setscl(void *data, int state)
40{
41 struct i2c_versatile *i2c = data;
42
43 writel(SCL, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC));
44}
45
46static int i2c_versatile_getsda(void *data)
47{
48 struct i2c_versatile *i2c = data;
49 return !!(readl(i2c->base + I2C_CONTROL) & SDA);
50}
51
52static int i2c_versatile_getscl(void *data)
53{
54 struct i2c_versatile *i2c = data;
55 return !!(readl(i2c->base + I2C_CONTROL) & SCL);
56}
57
58static struct i2c_algo_bit_data i2c_versatile_algo = {
59 .setsda = i2c_versatile_setsda,
60 .setscl = i2c_versatile_setscl,
61 .getsda = i2c_versatile_getsda,
62 .getscl = i2c_versatile_getscl,
63 .udelay = 30,
64 .timeout = HZ,
65};
66
67static int i2c_versatile_probe(struct platform_device *dev)
68{
69 struct i2c_versatile *i2c;
70 struct resource *r;
71 int ret;
72
73 r = platform_get_resource(dev, IORESOURCE_MEM, 0);
74 if (!r) {
75 ret = -EINVAL;
76 goto err_out;
77 }
78
79 if (!request_mem_region(r->start, r->end - r->start + 1, "versatile-i2c")) {
80 ret = -EBUSY;
81 goto err_out;
82 }
83
84 i2c = kzalloc(sizeof(struct i2c_versatile), GFP_KERNEL);
85 if (!i2c) {
86 ret = -ENOMEM;
87 goto err_release;
88 }
89
90 i2c->base = ioremap(r->start, r->end - r->start + 1);
91 if (!i2c->base) {
92 ret = -ENOMEM;
93 goto err_free;
94 }
95
96 writel(SCL | SDA, i2c->base + I2C_CONTROLS);
97
98 i2c->adap.owner = THIS_MODULE;
99 strlcpy(i2c->adap.name, "Versatile I2C adapter", sizeof(i2c->adap.name));
100 i2c->adap.algo_data = &i2c->algo;
101 i2c->adap.dev.parent = &dev->dev;
102 i2c->algo = i2c_versatile_algo;
103 i2c->algo.data = i2c;
104
105 ret = i2c_bit_add_bus(&i2c->adap);
106 if (ret >= 0) {
107 platform_set_drvdata(dev, i2c);
108 return 0;
109 }
110
111 iounmap(i2c->base);
112 err_free:
113 kfree(i2c);
114 err_release:
115 release_mem_region(r->start, r->end - r->start + 1);
116 err_out:
117 return ret;
118}
119
120static int i2c_versatile_remove(struct platform_device *dev)
121{
122 struct i2c_versatile *i2c = platform_get_drvdata(dev);
123
124 platform_set_drvdata(dev, NULL);
125
126 i2c_del_adapter(&i2c->adap);
127 return 0;
128}
129
130static struct platform_driver i2c_versatile_driver = {
131 .probe = i2c_versatile_probe,
132 .remove = i2c_versatile_remove,
133 .driver = {
134 .name = "versatile-i2c",
135 .owner = THIS_MODULE,
136 },
137};
138
139static int __init i2c_versatile_init(void)
140{
141 return platform_driver_register(&i2c_versatile_driver);
142}
143
144static void __exit i2c_versatile_exit(void)
145{
146 platform_driver_unregister(&i2c_versatile_driver);
147}
148
149module_init(i2c_versatile_init);
150module_exit(i2c_versatile_exit);
151
152MODULE_DESCRIPTION("ARM Versatile I2C bus driver");
153MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-via.c b/drivers/i2c/busses/i2c-via.c
index 910e200ad500..15d7e00e47e6 100644
--- a/drivers/i2c/busses/i2c-via.c
+++ b/drivers/i2c/busses/i2c-via.c
@@ -151,7 +151,7 @@ static int __devinit vt586b_probe(struct pci_dev *dev, const struct pci_device_i
151 151
152static void __devexit vt586b_remove(struct pci_dev *dev) 152static void __devexit vt586b_remove(struct pci_dev *dev)
153{ 153{
154 i2c_bit_del_bus(&vt586b_adapter); 154 i2c_del_adapter(&vt586b_adapter);
155 release_region(I2C_DIR, IOSPACE); 155 release_region(I2C_DIR, IOSPACE);
156 pm_io_base = 0; 156 pm_io_base = 0;
157} 157}
diff --git a/drivers/i2c/busses/i2c-voodoo3.c b/drivers/i2c/busses/i2c-voodoo3.c
index 6c8d25183382..b0377b81744b 100644
--- a/drivers/i2c/busses/i2c-voodoo3.c
+++ b/drivers/i2c/busses/i2c-voodoo3.c
@@ -211,14 +211,14 @@ static int __devinit voodoo3_probe(struct pci_dev *dev, const struct pci_device_
211 return retval; 211 return retval;
212 retval = i2c_bit_add_bus(&voodoo3_ddc_adapter); 212 retval = i2c_bit_add_bus(&voodoo3_ddc_adapter);
213 if (retval) 213 if (retval)
214 i2c_bit_del_bus(&voodoo3_i2c_adapter); 214 i2c_del_adapter(&voodoo3_i2c_adapter);
215 return retval; 215 return retval;
216} 216}
217 217
218static void __devexit voodoo3_remove(struct pci_dev *dev) 218static void __devexit voodoo3_remove(struct pci_dev *dev)
219{ 219{
220 i2c_bit_del_bus(&voodoo3_i2c_adapter); 220 i2c_del_adapter(&voodoo3_i2c_adapter);
221 i2c_bit_del_bus(&voodoo3_ddc_adapter); 221 i2c_del_adapter(&voodoo3_ddc_adapter);
222 iounmap(ioaddr); 222 iounmap(ioaddr);
223} 223}
224 224
diff --git a/drivers/i2c/busses/scx200_i2c.c b/drivers/i2c/busses/scx200_i2c.c
index 8ddbae4fafe6..6cd96e43aa72 100644
--- a/drivers/i2c/busses/scx200_i2c.c
+++ b/drivers/i2c/busses/scx200_i2c.c
@@ -116,7 +116,7 @@ static int scx200_i2c_init(void)
116 116
117static void scx200_i2c_cleanup(void) 117static void scx200_i2c_cleanup(void)
118{ 118{
119 i2c_bit_del_bus(&scx200_i2c_ops); 119 i2c_del_adapter(&scx200_i2c_ops);
120} 120}
121 121
122module_init(scx200_i2c_init); 122module_init(scx200_i2c_init);
diff --git a/drivers/i2c/chips/ds1337.c b/drivers/i2c/chips/ds1337.c
index 93d483b8b770..ec17d6b684a2 100644
--- a/drivers/i2c/chips/ds1337.c
+++ b/drivers/i2c/chips/ds1337.c
@@ -347,13 +347,19 @@ static void ds1337_init_client(struct i2c_client *client)
347 347
348 if ((status & 0x80) || (control & 0x80)) { 348 if ((status & 0x80) || (control & 0x80)) {
349 /* RTC not running */ 349 /* RTC not running */
350 u8 buf[16]; 350 u8 buf[1+16]; /* First byte is interpreted as address */
351 struct i2c_msg msg[1]; 351 struct i2c_msg msg[1];
352 352
353 dev_dbg(&client->dev, "%s: RTC not running!\n", __FUNCTION__); 353 dev_dbg(&client->dev, "%s: RTC not running!\n", __FUNCTION__);
354 354
355 /* Initialize all, including STATUS and CONTROL to zero */ 355 /* Initialize all, including STATUS and CONTROL to zero */
356 memset(buf, 0, sizeof(buf)); 356 memset(buf, 0, sizeof(buf));
357
358 /* Write valid values in the date/time registers */
359 buf[1+DS1337_REG_DAY] = 1;
360 buf[1+DS1337_REG_DATE] = 1;
361 buf[1+DS1337_REG_MONTH] = 1;
362
357 msg[0].addr = client->addr; 363 msg[0].addr = client->addr;
358 msg[0].flags = 0; 364 msg[0].flags = 0;
359 msg[0].len = sizeof(buf); 365 msg[0].len = sizeof(buf);
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 7ca81f42d14b..3e31f1d265c9 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -127,20 +127,17 @@ static ssize_t show_client_name(struct device *dev, struct device_attribute *att
127 return sprintf(buf, "%s\n", client->name); 127 return sprintf(buf, "%s\n", client->name);
128} 128}
129 129
130/* 130/*
131 * We can't use the DEVICE_ATTR() macro here as we want the same filename for a 131 * We can't use the DEVICE_ATTR() macro here, as we used the same name for
132 * different type of a device. So beware if the DEVICE_ATTR() macro ever 132 * an i2c adapter attribute (above).
133 * changes, this definition will also have to change.
134 */ 133 */
135static struct device_attribute dev_attr_client_name = { 134static struct device_attribute dev_attr_client_name =
136 .attr = {.name = "name", .mode = S_IRUGO, .owner = THIS_MODULE }, 135 __ATTR(name, S_IRUGO, &show_client_name, NULL);
137 .show = &show_client_name,
138};
139 136
140 137
141/* --------------------------------------------------- 138/* ---------------------------------------------------
142 * registering functions 139 * registering functions
143 * --------------------------------------------------- 140 * ---------------------------------------------------
144 */ 141 */
145 142
146/* ----- 143/* -----
@@ -314,7 +311,7 @@ int i2c_register_driver(struct module *owner, struct i2c_driver *driver)
314 res = driver_register(&driver->driver); 311 res = driver_register(&driver->driver);
315 if (res) 312 if (res)
316 return res; 313 return res;
317 314
318 mutex_lock(&core_lists); 315 mutex_lock(&core_lists);
319 316
320 list_add_tail(&driver->list,&drivers); 317 list_add_tail(&driver->list,&drivers);
@@ -338,13 +335,13 @@ int i2c_del_driver(struct i2c_driver *driver)
338 struct list_head *item1, *item2, *_n; 335 struct list_head *item1, *item2, *_n;
339 struct i2c_client *client; 336 struct i2c_client *client;
340 struct i2c_adapter *adap; 337 struct i2c_adapter *adap;
341 338
342 int res = 0; 339 int res = 0;
343 340
344 mutex_lock(&core_lists); 341 mutex_lock(&core_lists);
345 342
346 /* Have a look at each adapter, if clients of this driver are still 343 /* Have a look at each adapter, if clients of this driver are still
347 * attached. If so, detach them to be able to kill the driver 344 * attached. If so, detach them to be able to kill the driver
348 * afterwards. 345 * afterwards.
349 */ 346 */
350 list_for_each(item1,&adapters) { 347 list_for_each(item1,&adapters) {
@@ -419,14 +416,14 @@ int i2c_attach_client(struct i2c_client *client)
419 goto out_unlock; 416 goto out_unlock;
420 } 417 }
421 list_add_tail(&client->list,&adapter->clients); 418 list_add_tail(&client->list,&adapter->clients);
422 419
423 client->usage_count = 0; 420 client->usage_count = 0;
424 421
425 client->dev.parent = &client->adapter->dev; 422 client->dev.parent = &client->adapter->dev;
426 client->dev.driver = &client->driver->driver; 423 client->dev.driver = &client->driver->driver;
427 client->dev.bus = &i2c_bus_type; 424 client->dev.bus = &i2c_bus_type;
428 client->dev.release = &i2c_client_release; 425 client->dev.release = &i2c_client_release;
429 426
430 snprintf(&client->dev.bus_id[0], sizeof(client->dev.bus_id), 427 snprintf(&client->dev.bus_id[0], sizeof(client->dev.bus_id),
431 "%d-%04x", i2c_adapter_id(adapter), client->addr); 428 "%d-%04x", i2c_adapter_id(adapter), client->addr);
432 dev_dbg(&adapter->dev, "client [%s] registered with bus id %s\n", 429 dev_dbg(&adapter->dev, "client [%s] registered with bus id %s\n",
@@ -467,7 +464,7 @@ int i2c_detach_client(struct i2c_client *client)
467{ 464{
468 struct i2c_adapter *adapter = client->adapter; 465 struct i2c_adapter *adapter = client->adapter;
469 int res = 0; 466 int res = 0;
470 467
471 if (client->usage_count > 0) { 468 if (client->usage_count > 0) {
472 dev_warn(&client->dev, "Client [%s] still busy, " 469 dev_warn(&client->dev, "Client [%s] still busy, "
473 "can't detach\n", client->name); 470 "can't detach\n", client->name);
@@ -535,10 +532,10 @@ int i2c_release_client(struct i2c_client *client)
535 __FUNCTION__); 532 __FUNCTION__);
536 return -EPERM; 533 return -EPERM;
537 } 534 }
538 535
539 client->usage_count--; 536 client->usage_count--;
540 i2c_dec_use_client(client); 537 i2c_dec_use_client(client);
541 538
542 return 0; 539 return 0;
543} 540}
544 541
@@ -603,7 +600,7 @@ int i2c_transfer(struct i2c_adapter * adap, struct i2c_msg *msgs, int num)
603 } 600 }
604#endif 601#endif
605 602
606 mutex_lock(&adap->bus_lock); 603 mutex_lock_nested(&adap->bus_lock, adap->level);
607 ret = adap->algo->master_xfer(adap,msgs,num); 604 ret = adap->algo->master_xfer(adap,msgs,num);
608 mutex_unlock(&adap->bus_lock); 605 mutex_unlock(&adap->bus_lock);
609 606
@@ -624,7 +621,7 @@ int i2c_master_send(struct i2c_client *client,const char *buf ,int count)
624 msg.flags = client->flags & I2C_M_TEN; 621 msg.flags = client->flags & I2C_M_TEN;
625 msg.len = count; 622 msg.len = count;
626 msg.buf = (char *)buf; 623 msg.buf = (char *)buf;
627 624
628 ret = i2c_transfer(adap, &msg, 1); 625 ret = i2c_transfer(adap, &msg, 1);
629 626
630 /* If everything went ok (i.e. 1 msg transmitted), return #bytes 627 /* If everything went ok (i.e. 1 msg transmitted), return #bytes
@@ -757,7 +754,7 @@ int i2c_probe(struct i2c_adapter *adapter,
757 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_QUICK)) { 754 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_QUICK)) {
758 if (address_data->probe[0] == I2C_CLIENT_END 755 if (address_data->probe[0] == I2C_CLIENT_END
759 && address_data->normal_i2c[0] == I2C_CLIENT_END) 756 && address_data->normal_i2c[0] == I2C_CLIENT_END)
760 return 0; 757 return 0;
761 758
762 dev_warn(&adapter->dev, "SMBus Quick command not supported, " 759 dev_warn(&adapter->dev, "SMBus Quick command not supported, "
763 "can't probe for chips\n"); 760 "can't probe for chips\n");
@@ -817,7 +814,7 @@ int i2c_probe(struct i2c_adapter *adapter,
817struct i2c_adapter* i2c_get_adapter(int id) 814struct i2c_adapter* i2c_get_adapter(int id)
818{ 815{
819 struct i2c_adapter *adapter; 816 struct i2c_adapter *adapter;
820 817
821 mutex_lock(&core_lists); 818 mutex_lock(&core_lists);
822 adapter = (struct i2c_adapter *)idr_find(&i2c_adapter_idr, id); 819 adapter = (struct i2c_adapter *)idr_find(&i2c_adapter_idr, id);
823 if (adapter && !try_module_get(adapter->owner)) 820 if (adapter && !try_module_get(adapter->owner))
@@ -834,14 +831,14 @@ void i2c_put_adapter(struct i2c_adapter *adap)
834 831
835/* The SMBus parts */ 832/* The SMBus parts */
836 833
837#define POLY (0x1070U << 3) 834#define POLY (0x1070U << 3)
838static u8 835static u8
839crc8(u16 data) 836crc8(u16 data)
840{ 837{
841 int i; 838 int i;
842 839
843 for(i = 0; i < 8; i++) { 840 for(i = 0; i < 8; i++) {
844 if (data & 0x8000) 841 if (data & 0x8000)
845 data = data ^ POLY; 842 data = data ^ POLY;
846 data = data << 1; 843 data = data << 1;
847 } 844 }
@@ -891,13 +888,13 @@ static int i2c_smbus_check_pec(u8 cpec, struct i2c_msg *msg)
891 rpec, cpec); 888 rpec, cpec);
892 return -1; 889 return -1;
893 } 890 }
894 return 0; 891 return 0;
895} 892}
896 893
897s32 i2c_smbus_write_quick(struct i2c_client *client, u8 value) 894s32 i2c_smbus_write_quick(struct i2c_client *client, u8 value)
898{ 895{
899 return i2c_smbus_xfer(client->adapter,client->addr,client->flags, 896 return i2c_smbus_xfer(client->adapter,client->addr,client->flags,
900 value,0,I2C_SMBUS_QUICK,NULL); 897 value,0,I2C_SMBUS_QUICK,NULL);
901} 898}
902 899
903s32 i2c_smbus_read_byte(struct i2c_client *client) 900s32 i2c_smbus_read_byte(struct i2c_client *client)
@@ -996,11 +993,11 @@ s32 i2c_smbus_write_i2c_block_data(struct i2c_client *client, u8 command,
996 I2C_SMBUS_I2C_BLOCK_DATA, &data); 993 I2C_SMBUS_I2C_BLOCK_DATA, &data);
997} 994}
998 995
999/* Simulate a SMBus command using the i2c protocol 996/* Simulate a SMBus command using the i2c protocol
1000 No checking of parameters is done! */ 997 No checking of parameters is done! */
1001static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr, 998static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
1002 unsigned short flags, 999 unsigned short flags,
1003 char read_write, u8 command, int size, 1000 char read_write, u8 command, int size,
1004 union i2c_smbus_data * data) 1001 union i2c_smbus_data * data)
1005{ 1002{
1006 /* So we need to generate a series of msgs. In the case of writing, we 1003 /* So we need to generate a series of msgs. In the case of writing, we
@@ -1010,7 +1007,7 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
1010 unsigned char msgbuf0[I2C_SMBUS_BLOCK_MAX+3]; 1007 unsigned char msgbuf0[I2C_SMBUS_BLOCK_MAX+3];
1011 unsigned char msgbuf1[I2C_SMBUS_BLOCK_MAX+2]; 1008 unsigned char msgbuf1[I2C_SMBUS_BLOCK_MAX+2];
1012 int num = read_write == I2C_SMBUS_READ?2:1; 1009 int num = read_write == I2C_SMBUS_READ?2:1;
1013 struct i2c_msg msg[2] = { { addr, flags, 1, msgbuf0 }, 1010 struct i2c_msg msg[2] = { { addr, flags, 1, msgbuf0 },
1014 { addr, flags | I2C_M_RD, 0, msgbuf1 } 1011 { addr, flags | I2C_M_RD, 0, msgbuf1 }
1015 }; 1012 };
1016 int i; 1013 int i;
@@ -1103,14 +1100,14 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
1103 if (i) { 1100 if (i) {
1104 /* Compute PEC if first message is a write */ 1101 /* Compute PEC if first message is a write */
1105 if (!(msg[0].flags & I2C_M_RD)) { 1102 if (!(msg[0].flags & I2C_M_RD)) {
1106 if (num == 1) /* Write only */ 1103 if (num == 1) /* Write only */
1107 i2c_smbus_add_pec(&msg[0]); 1104 i2c_smbus_add_pec(&msg[0]);
1108 else /* Write followed by read */ 1105 else /* Write followed by read */
1109 partial_pec = i2c_smbus_msg_pec(0, &msg[0]); 1106 partial_pec = i2c_smbus_msg_pec(0, &msg[0]);
1110 } 1107 }
1111 /* Ask for PEC if last message is a read */ 1108 /* Ask for PEC if last message is a read */
1112 if (msg[num-1].flags & I2C_M_RD) 1109 if (msg[num-1].flags & I2C_M_RD)
1113 msg[num-1].len++; 1110 msg[num-1].len++;
1114 } 1111 }
1115 1112
1116 if (i2c_transfer(adapter, msg, num) < 0) 1113 if (i2c_transfer(adapter, msg, num) < 0)
@@ -1130,7 +1127,7 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
1130 case I2C_SMBUS_BYTE_DATA: 1127 case I2C_SMBUS_BYTE_DATA:
1131 data->byte = msgbuf1[0]; 1128 data->byte = msgbuf1[0];
1132 break; 1129 break;
1133 case I2C_SMBUS_WORD_DATA: 1130 case I2C_SMBUS_WORD_DATA:
1134 case I2C_SMBUS_PROC_CALL: 1131 case I2C_SMBUS_PROC_CALL:
1135 data->word = msgbuf1[0] | (msgbuf1[1] << 8); 1132 data->word = msgbuf1[0] | (msgbuf1[1] << 8);
1136 break; 1133 break;
@@ -1146,7 +1143,7 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
1146 1143
1147 1144
1148s32 i2c_smbus_xfer(struct i2c_adapter * adapter, u16 addr, unsigned short flags, 1145s32 i2c_smbus_xfer(struct i2c_adapter * adapter, u16 addr, unsigned short flags,
1149 char read_write, u8 command, int size, 1146 char read_write, u8 command, int size,
1150 union i2c_smbus_data * data) 1147 union i2c_smbus_data * data)
1151{ 1148{
1152 s32 res; 1149 s32 res;
diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c
index 2e22a2ffa606..ac5bd2a7ca99 100644
--- a/drivers/i2c/i2c-dev.c
+++ b/drivers/i2c/i2c-dev.c
@@ -1,5 +1,5 @@
1/* 1/*
2 i2c-dev.c - i2c-bus driver, char device interface 2 i2c-dev.c - i2c-bus driver, char device interface
3 3
4 Copyright (C) 1995-97 Simon G. Vogl 4 Copyright (C) 1995-97 Simon G. Vogl
5 Copyright (C) 1998-99 Frodo Looijaard <frodol@dds.nl> 5 Copyright (C) 1998-99 Frodo Looijaard <frodol@dds.nl>
@@ -90,6 +90,7 @@ static void return_i2c_dev(struct i2c_dev *i2c_dev)
90 spin_lock(&i2c_dev_list_lock); 90 spin_lock(&i2c_dev_list_lock);
91 list_del(&i2c_dev->list); 91 list_del(&i2c_dev->list);
92 spin_unlock(&i2c_dev_list_lock); 92 spin_unlock(&i2c_dev_list_lock);
93 kfree(i2c_dev);
93} 94}
94 95
95static ssize_t show_adapter_name(struct device *dev, 96static ssize_t show_adapter_name(struct device *dev,
@@ -172,7 +173,7 @@ static int i2cdev_ioctl(struct inode *inode, struct file *file,
172 switch ( cmd ) { 173 switch ( cmd ) {
173 case I2C_SLAVE: 174 case I2C_SLAVE:
174 case I2C_SLAVE_FORCE: 175 case I2C_SLAVE_FORCE:
175 if ((arg > 0x3ff) || 176 if ((arg > 0x3ff) ||
176 (((client->flags & I2C_M_TEN) == 0) && arg > 0x7f)) 177 (((client->flags & I2C_M_TEN) == 0) && arg > 0x7f))
177 return -EINVAL; 178 return -EINVAL;
178 if ((cmd == I2C_SLAVE) && i2c_check_addr(client->adapter,arg)) 179 if ((cmd == I2C_SLAVE) && i2c_check_addr(client->adapter,arg))
@@ -193,12 +194,11 @@ static int i2cdev_ioctl(struct inode *inode, struct file *file,
193 return 0; 194 return 0;
194 case I2C_FUNCS: 195 case I2C_FUNCS:
195 funcs = i2c_get_functionality(client->adapter); 196 funcs = i2c_get_functionality(client->adapter);
196 return (copy_to_user((unsigned long __user *)arg, &funcs, 197 return put_user(funcs, (unsigned long __user *)arg);
197 sizeof(unsigned long)))?-EFAULT:0;
198 198
199 case I2C_RDWR: 199 case I2C_RDWR:
200 if (copy_from_user(&rdwr_arg, 200 if (copy_from_user(&rdwr_arg,
201 (struct i2c_rdwr_ioctl_data __user *)arg, 201 (struct i2c_rdwr_ioctl_data __user *)arg,
202 sizeof(rdwr_arg))) 202 sizeof(rdwr_arg)))
203 return -EFAULT; 203 return -EFAULT;
204 204
@@ -206,9 +206,9 @@ static int i2cdev_ioctl(struct inode *inode, struct file *file,
206 * be sent at once */ 206 * be sent at once */
207 if (rdwr_arg.nmsgs > I2C_RDRW_IOCTL_MAX_MSGS) 207 if (rdwr_arg.nmsgs > I2C_RDRW_IOCTL_MAX_MSGS)
208 return -EINVAL; 208 return -EINVAL;
209 209
210 rdwr_pa = (struct i2c_msg *) 210 rdwr_pa = (struct i2c_msg *)
211 kmalloc(rdwr_arg.nmsgs * sizeof(struct i2c_msg), 211 kmalloc(rdwr_arg.nmsgs * sizeof(struct i2c_msg),
212 GFP_KERNEL); 212 GFP_KERNEL);
213 213
214 if (rdwr_pa == NULL) return -ENOMEM; 214 if (rdwr_pa == NULL) return -ENOMEM;
@@ -278,9 +278,9 @@ static int i2cdev_ioctl(struct inode *inode, struct file *file,
278 (struct i2c_smbus_ioctl_data __user *) arg, 278 (struct i2c_smbus_ioctl_data __user *) arg,
279 sizeof(struct i2c_smbus_ioctl_data))) 279 sizeof(struct i2c_smbus_ioctl_data)))
280 return -EFAULT; 280 return -EFAULT;
281 if ((data_arg.size != I2C_SMBUS_BYTE) && 281 if ((data_arg.size != I2C_SMBUS_BYTE) &&
282 (data_arg.size != I2C_SMBUS_QUICK) && 282 (data_arg.size != I2C_SMBUS_QUICK) &&
283 (data_arg.size != I2C_SMBUS_BYTE_DATA) && 283 (data_arg.size != I2C_SMBUS_BYTE_DATA) &&
284 (data_arg.size != I2C_SMBUS_WORD_DATA) && 284 (data_arg.size != I2C_SMBUS_WORD_DATA) &&
285 (data_arg.size != I2C_SMBUS_PROC_CALL) && 285 (data_arg.size != I2C_SMBUS_PROC_CALL) &&
286 (data_arg.size != I2C_SMBUS_BLOCK_DATA) && 286 (data_arg.size != I2C_SMBUS_BLOCK_DATA) &&
@@ -291,11 +291,11 @@ static int i2cdev_ioctl(struct inode *inode, struct file *file,
291 data_arg.size); 291 data_arg.size);
292 return -EINVAL; 292 return -EINVAL;
293 } 293 }
294 /* Note that I2C_SMBUS_READ and I2C_SMBUS_WRITE are 0 and 1, 294 /* Note that I2C_SMBUS_READ and I2C_SMBUS_WRITE are 0 and 1,
295 so the check is valid if size==I2C_SMBUS_QUICK too. */ 295 so the check is valid if size==I2C_SMBUS_QUICK too. */
296 if ((data_arg.read_write != I2C_SMBUS_READ) && 296 if ((data_arg.read_write != I2C_SMBUS_READ) &&
297 (data_arg.read_write != I2C_SMBUS_WRITE)) { 297 (data_arg.read_write != I2C_SMBUS_WRITE)) {
298 dev_dbg(&client->adapter->dev, 298 dev_dbg(&client->adapter->dev,
299 "read_write out of range (%x) in ioctl I2C_SMBUS.\n", 299 "read_write out of range (%x) in ioctl I2C_SMBUS.\n",
300 data_arg.read_write); 300 data_arg.read_write);
301 return -EINVAL; 301 return -EINVAL;
@@ -304,7 +304,7 @@ static int i2cdev_ioctl(struct inode *inode, struct file *file,
304 /* Note that command values are always valid! */ 304 /* Note that command values are always valid! */
305 305
306 if ((data_arg.size == I2C_SMBUS_QUICK) || 306 if ((data_arg.size == I2C_SMBUS_QUICK) ||
307 ((data_arg.size == I2C_SMBUS_BYTE) && 307 ((data_arg.size == I2C_SMBUS_BYTE) &&
308 (data_arg.read_write == I2C_SMBUS_WRITE))) 308 (data_arg.read_write == I2C_SMBUS_WRITE)))
309 /* These are special: we do not use data */ 309 /* These are special: we do not use data */
310 return i2c_smbus_xfer(client->adapter, client->addr, 310 return i2c_smbus_xfer(client->adapter, client->addr,
@@ -322,14 +322,14 @@ static int i2cdev_ioctl(struct inode *inode, struct file *file,
322 if ((data_arg.size == I2C_SMBUS_BYTE_DATA) || 322 if ((data_arg.size == I2C_SMBUS_BYTE_DATA) ||
323 (data_arg.size == I2C_SMBUS_BYTE)) 323 (data_arg.size == I2C_SMBUS_BYTE))
324 datasize = sizeof(data_arg.data->byte); 324 datasize = sizeof(data_arg.data->byte);
325 else if ((data_arg.size == I2C_SMBUS_WORD_DATA) || 325 else if ((data_arg.size == I2C_SMBUS_WORD_DATA) ||
326 (data_arg.size == I2C_SMBUS_PROC_CALL)) 326 (data_arg.size == I2C_SMBUS_PROC_CALL))
327 datasize = sizeof(data_arg.data->word); 327 datasize = sizeof(data_arg.data->word);
328 else /* size == smbus block, i2c block, or block proc. call */ 328 else /* size == smbus block, i2c block, or block proc. call */
329 datasize = sizeof(data_arg.data->block); 329 datasize = sizeof(data_arg.data->block);
330 330
331 if ((data_arg.size == I2C_SMBUS_PROC_CALL) || 331 if ((data_arg.size == I2C_SMBUS_PROC_CALL) ||
332 (data_arg.size == I2C_SMBUS_BLOCK_PROC_CALL) || 332 (data_arg.size == I2C_SMBUS_BLOCK_PROC_CALL) ||
333 (data_arg.read_write == I2C_SMBUS_WRITE)) { 333 (data_arg.read_write == I2C_SMBUS_WRITE)) {
334 if (copy_from_user(&temp, data_arg.data, datasize)) 334 if (copy_from_user(&temp, data_arg.data, datasize))
335 return -EFAULT; 335 return -EFAULT;
@@ -337,8 +337,8 @@ static int i2cdev_ioctl(struct inode *inode, struct file *file,
337 res = i2c_smbus_xfer(client->adapter,client->addr,client->flags, 337 res = i2c_smbus_xfer(client->adapter,client->addr,client->flags,
338 data_arg.read_write, 338 data_arg.read_write,
339 data_arg.command,data_arg.size,&temp); 339 data_arg.command,data_arg.size,&temp);
340 if (! res && ((data_arg.size == I2C_SMBUS_PROC_CALL) || 340 if (! res && ((data_arg.size == I2C_SMBUS_PROC_CALL) ||
341 (data_arg.size == I2C_SMBUS_BLOCK_PROC_CALL) || 341 (data_arg.size == I2C_SMBUS_BLOCK_PROC_CALL) ||
342 (data_arg.read_write == I2C_SMBUS_READ))) { 342 (data_arg.read_write == I2C_SMBUS_READ))) {
343 if (copy_to_user(data_arg.data, &temp, datasize)) 343 if (copy_to_user(data_arg.data, &temp, datasize))
344 return -EFAULT; 344 return -EFAULT;
@@ -417,8 +417,8 @@ static int i2cdev_attach_adapter(struct i2c_adapter *adap)
417 i2c_dev->dev = device_create(i2c_dev_class, &adap->dev, 417 i2c_dev->dev = device_create(i2c_dev_class, &adap->dev,
418 MKDEV(I2C_MAJOR, adap->nr), 418 MKDEV(I2C_MAJOR, adap->nr),
419 "i2c-%d", adap->nr); 419 "i2c-%d", adap->nr);
420 if (!i2c_dev->dev) { 420 if (IS_ERR(i2c_dev->dev)) {
421 res = -ENODEV; 421 res = PTR_ERR(i2c_dev->dev);
422 goto error; 422 goto error;
423 } 423 }
424 res = device_create_file(i2c_dev->dev, &dev_attr_name); 424 res = device_create_file(i2c_dev->dev, &dev_attr_name);
@@ -432,7 +432,6 @@ error_destroy:
432 device_destroy(i2c_dev_class, MKDEV(I2C_MAJOR, adap->nr)); 432 device_destroy(i2c_dev_class, MKDEV(I2C_MAJOR, adap->nr));
433error: 433error:
434 return_i2c_dev(i2c_dev); 434 return_i2c_dev(i2c_dev);
435 kfree(i2c_dev);
436 return res; 435 return res;
437} 436}
438 437
@@ -447,7 +446,6 @@ static int i2cdev_detach_adapter(struct i2c_adapter *adap)
447 device_remove_file(i2c_dev->dev, &dev_attr_name); 446 device_remove_file(i2c_dev->dev, &dev_attr_name);
448 return_i2c_dev(i2c_dev); 447 return_i2c_dev(i2c_dev);
449 device_destroy(i2c_dev_class, MKDEV(I2C_MAJOR, adap->nr)); 448 device_destroy(i2c_dev_class, MKDEV(I2C_MAJOR, adap->nr));
450 kfree(i2c_dev);
451 449
452 pr_debug("i2c-dev: adapter [%s] unregistered\n", adap->name); 450 pr_debug("i2c-dev: adapter [%s] unregistered\n", adap->name);
453 return 0; 451 return 0;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 09:01:57 -0500