aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/i2c/i2c-core.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/i2c/i2c-core.c')
-rw-r--r--drivers/i2c/i2c-core.c198
1 files changed, 71 insertions, 127 deletions
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index dda472e5e8be..02e335a04f09 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -19,7 +19,8 @@
19 19
20/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi>. 20/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi>.
21 All SMBus-related things are written by Frodo Looijaard <frodol@dds.nl> 21 All SMBus-related things are written by Frodo Looijaard <frodol@dds.nl>
22 SMBus 2.0 support by Mark Studebaker <mdsxyz123@yahoo.com> */ 22 SMBus 2.0 support by Mark Studebaker <mdsxyz123@yahoo.com> and
23 Jean Delvare <khali@linux-fr.org> */
23 24
24#include <linux/module.h> 25#include <linux/module.h>
25#include <linux/kernel.h> 26#include <linux/kernel.h>
@@ -48,7 +49,7 @@ static int i2c_bus_suspend(struct device * dev, pm_message_t state)
48 int rc = 0; 49 int rc = 0;
49 50
50 if (dev->driver && dev->driver->suspend) 51 if (dev->driver && dev->driver->suspend)
51 rc = dev->driver->suspend(dev,state,0); 52 rc = dev->driver->suspend(dev, state);
52 return rc; 53 return rc;
53} 54}
54 55
@@ -57,7 +58,7 @@ static int i2c_bus_resume(struct device * dev)
57 int rc = 0; 58 int rc = 0;
58 59
59 if (dev->driver && dev->driver->resume) 60 if (dev->driver && dev->driver->resume)
60 rc = dev->driver->resume(dev,0); 61 rc = dev->driver->resume(dev);
61 return rc; 62 return rc;
62} 63}
63 64
@@ -85,6 +86,7 @@ void i2c_adapter_dev_release(struct device *dev)
85} 86}
86 87
87struct device_driver i2c_adapter_driver = { 88struct device_driver i2c_adapter_driver = {
89 .owner = THIS_MODULE,
88 .name = "i2c_adapter", 90 .name = "i2c_adapter",
89 .bus = &i2c_bus_type, 91 .bus = &i2c_bus_type,
90 .probe = i2c_device_probe, 92 .probe = i2c_device_probe,
@@ -98,6 +100,7 @@ static void i2c_adapter_class_dev_release(struct class_device *dev)
98} 100}
99 101
100struct class i2c_adapter_class = { 102struct class i2c_adapter_class = {
103 .owner = THIS_MODULE,
101 .name = "i2c-adapter", 104 .name = "i2c-adapter",
102 .release = &i2c_adapter_class_dev_release, 105 .release = &i2c_adapter_class_dev_release,
103}; 106};
@@ -291,6 +294,7 @@ int i2c_add_driver(struct i2c_driver *driver)
291 down(&core_lists); 294 down(&core_lists);
292 295
293 /* add the driver to the list of i2c drivers in the driver core */ 296 /* add the driver to the list of i2c drivers in the driver core */
297 driver->driver.owner = driver->owner;
294 driver->driver.name = driver->name; 298 driver->driver.name = driver->name;
295 driver->driver.bus = &i2c_bus_type; 299 driver->driver.bus = &i2c_bus_type;
296 driver->driver.probe = i2c_device_probe; 300 driver->driver.probe = i2c_device_probe;
@@ -706,10 +710,6 @@ int i2c_probe(struct i2c_adapter *adapter,
706 int i, err; 710 int i, err;
707 int adap_id = i2c_adapter_id(adapter); 711 int adap_id = i2c_adapter_id(adapter);
708 712
709 /* Forget it if we can't probe using SMBUS_QUICK */
710 if (! i2c_check_functionality(adapter,I2C_FUNC_SMBUS_QUICK))
711 return -1;
712
713 /* Force entries are done first, and are not affected by ignore 713 /* Force entries are done first, and are not affected by ignore
714 entries */ 714 entries */
715 if (address_data->forces) { 715 if (address_data->forces) {
@@ -736,6 +736,17 @@ int i2c_probe(struct i2c_adapter *adapter,
736 } 736 }
737 } 737 }
738 738
739 /* Stop here if we can't use SMBUS_QUICK */
740 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_QUICK)) {
741 if (address_data->probe[0] == I2C_CLIENT_END
742 && address_data->normal_i2c[0] == I2C_CLIENT_END)
743 return 0;
744
745 dev_warn(&adapter->dev, "SMBus Quick command not supported, "
746 "can't probe for chips\n");
747 return -1;
748 }
749
739 /* Probe entries are done second, and are not affected by ignore 750 /* Probe entries are done second, and are not affected by ignore
740 entries either */ 751 entries either */
741 for (i = 0; address_data->probe[i] != I2C_CLIENT_END; i += 2) { 752 for (i = 0; address_data->probe[i] != I2C_CLIENT_END; i += 2) {
@@ -820,101 +831,44 @@ crc8(u16 data)
820 return (u8)(data >> 8); 831 return (u8)(data >> 8);
821} 832}
822 833
823/* CRC over count bytes in the first array plus the bytes in the rest 834/* Incremental CRC8 over count bytes in the array pointed to by p */
824 array if it is non-null. rest[0] is the (length of rest) - 1 835static u8 i2c_smbus_pec(u8 crc, u8 *p, size_t count)
825 and is included. */
826static u8 i2c_smbus_partial_pec(u8 crc, int count, u8 *first, u8 *rest)
827{ 836{
828 int i; 837 int i;
829 838
830 for(i = 0; i < count; i++) 839 for(i = 0; i < count; i++)
831 crc = crc8((crc ^ first[i]) << 8); 840 crc = crc8((crc ^ p[i]) << 8);
832 if(rest != NULL)
833 for(i = 0; i <= rest[0]; i++)
834 crc = crc8((crc ^ rest[i]) << 8);
835 return crc; 841 return crc;
836} 842}
837 843
838static u8 i2c_smbus_pec(int count, u8 *first, u8 *rest) 844/* Assume a 7-bit address, which is reasonable for SMBus */
845static u8 i2c_smbus_msg_pec(u8 pec, struct i2c_msg *msg)
839{ 846{
840 return i2c_smbus_partial_pec(0, count, first, rest); 847 /* The address will be sent first */
848 u8 addr = (msg->addr << 1) | !!(msg->flags & I2C_M_RD);
849 pec = i2c_smbus_pec(pec, &addr, 1);
850
851 /* The data buffer follows */
852 return i2c_smbus_pec(pec, msg->buf, msg->len);
841} 853}
842 854
843/* Returns new "size" (transaction type) 855/* Used for write only transactions */
844 Note that we convert byte to byte_data and byte_data to word_data 856static inline void i2c_smbus_add_pec(struct i2c_msg *msg)
845 rather than invent new xxx_PEC transactions. */
846static int i2c_smbus_add_pec(u16 addr, u8 command, int size,
847 union i2c_smbus_data *data)
848{ 857{
849 u8 buf[3]; 858 msg->buf[msg->len] = i2c_smbus_msg_pec(0, msg);
850 859 msg->len++;
851 buf[0] = addr << 1;
852 buf[1] = command;
853 switch(size) {
854 case I2C_SMBUS_BYTE:
855 data->byte = i2c_smbus_pec(2, buf, NULL);
856 size = I2C_SMBUS_BYTE_DATA;
857 break;
858 case I2C_SMBUS_BYTE_DATA:
859 buf[2] = data->byte;
860 data->word = buf[2] ||
861 (i2c_smbus_pec(3, buf, NULL) << 8);
862 size = I2C_SMBUS_WORD_DATA;
863 break;
864 case I2C_SMBUS_WORD_DATA:
865 /* unsupported */
866 break;
867 case I2C_SMBUS_BLOCK_DATA:
868 data->block[data->block[0] + 1] =
869 i2c_smbus_pec(2, buf, data->block);
870 size = I2C_SMBUS_BLOCK_DATA_PEC;
871 break;
872 }
873 return size;
874} 860}
875 861
876static int i2c_smbus_check_pec(u16 addr, u8 command, int size, u8 partial, 862/* Return <0 on CRC error
877 union i2c_smbus_data *data) 863 If there was a write before this read (most cases) we need to take the
864 partial CRC from the write part into account.
865 Note that this function does modify the message (we need to decrease the
866 message length to hide the CRC byte from the caller). */
867static int i2c_smbus_check_pec(u8 cpec, struct i2c_msg *msg)
878{ 868{
879 u8 buf[3], rpec, cpec; 869 u8 rpec = msg->buf[--msg->len];
870 cpec = i2c_smbus_msg_pec(cpec, msg);
880 871
881 buf[1] = command;
882 switch(size) {
883 case I2C_SMBUS_BYTE_DATA:
884 buf[0] = (addr << 1) | 1;
885 cpec = i2c_smbus_pec(2, buf, NULL);
886 rpec = data->byte;
887 break;
888 case I2C_SMBUS_WORD_DATA:
889 buf[0] = (addr << 1) | 1;
890 buf[2] = data->word & 0xff;
891 cpec = i2c_smbus_pec(3, buf, NULL);
892 rpec = data->word >> 8;
893 break;
894 case I2C_SMBUS_WORD_DATA_PEC:
895 /* unsupported */
896 cpec = rpec = 0;
897 break;
898 case I2C_SMBUS_PROC_CALL_PEC:
899 /* unsupported */
900 cpec = rpec = 0;
901 break;
902 case I2C_SMBUS_BLOCK_DATA_PEC:
903 buf[0] = (addr << 1);
904 buf[2] = (addr << 1) | 1;
905 cpec = i2c_smbus_pec(3, buf, data->block);
906 rpec = data->block[data->block[0] + 1];
907 break;
908 case I2C_SMBUS_BLOCK_PROC_CALL_PEC:
909 buf[0] = (addr << 1) | 1;
910 rpec = i2c_smbus_partial_pec(partial, 1,
911 buf, data->block);
912 cpec = data->block[data->block[0] + 1];
913 break;
914 default:
915 cpec = rpec = 0;
916 break;
917 }
918 if (rpec != cpec) { 872 if (rpec != cpec) {
919 pr_debug("i2c-core: Bad PEC 0x%02x vs. 0x%02x\n", 873 pr_debug("i2c-core: Bad PEC 0x%02x vs. 0x%02x\n",
920 rpec, cpec); 874 rpec, cpec);
@@ -941,9 +895,8 @@ s32 i2c_smbus_read_byte(struct i2c_client *client)
941 895
942s32 i2c_smbus_write_byte(struct i2c_client *client, u8 value) 896s32 i2c_smbus_write_byte(struct i2c_client *client, u8 value)
943{ 897{
944 union i2c_smbus_data data; /* only for PEC */
945 return i2c_smbus_xfer(client->adapter,client->addr,client->flags, 898 return i2c_smbus_xfer(client->adapter,client->addr,client->flags,
946 I2C_SMBUS_WRITE,value, I2C_SMBUS_BYTE,&data); 899 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
947} 900}
948 901
949s32 i2c_smbus_read_byte_data(struct i2c_client *client, u8 command) 902s32 i2c_smbus_read_byte_data(struct i2c_client *client, u8 command)
@@ -1026,13 +979,14 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
1026 need to use only one message; when reading, we need two. We initialize 979 need to use only one message; when reading, we need two. We initialize
1027 most things with sane defaults, to keep the code below somewhat 980 most things with sane defaults, to keep the code below somewhat
1028 simpler. */ 981 simpler. */
1029 unsigned char msgbuf0[34]; 982 unsigned char msgbuf0[I2C_SMBUS_BLOCK_MAX+3];
1030 unsigned char msgbuf1[34]; 983 unsigned char msgbuf1[I2C_SMBUS_BLOCK_MAX+2];
1031 int num = read_write == I2C_SMBUS_READ?2:1; 984 int num = read_write == I2C_SMBUS_READ?2:1;
1032 struct i2c_msg msg[2] = { { addr, flags, 1, msgbuf0 }, 985 struct i2c_msg msg[2] = { { addr, flags, 1, msgbuf0 },
1033 { addr, flags | I2C_M_RD, 0, msgbuf1 } 986 { addr, flags | I2C_M_RD, 0, msgbuf1 }
1034 }; 987 };
1035 int i; 988 int i;
989 u8 partial_pec = 0;
1036 990
1037 msgbuf0[0] = command; 991 msgbuf0[0] = command;
1038 switch(size) { 992 switch(size) {
@@ -1075,7 +1029,6 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
1075 msgbuf0[2] = (data->word >> 8) & 0xff; 1029 msgbuf0[2] = (data->word >> 8) & 0xff;
1076 break; 1030 break;
1077 case I2C_SMBUS_BLOCK_DATA: 1031 case I2C_SMBUS_BLOCK_DATA:
1078 case I2C_SMBUS_BLOCK_DATA_PEC:
1079 if (read_write == I2C_SMBUS_READ) { 1032 if (read_write == I2C_SMBUS_READ) {
1080 dev_err(&adapter->dev, "Block read not supported " 1033 dev_err(&adapter->dev, "Block read not supported "
1081 "under I2C emulation!\n"); 1034 "under I2C emulation!\n");
@@ -1088,23 +1041,20 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
1088 data->block[0]); 1041 data->block[0]);
1089 return -1; 1042 return -1;
1090 } 1043 }
1091 if(size == I2C_SMBUS_BLOCK_DATA_PEC) 1044 for (i = 1; i < msg[0].len; i++)
1092 (msg[0].len)++;
1093 for (i = 1; i <= msg[0].len; i++)
1094 msgbuf0[i] = data->block[i-1]; 1045 msgbuf0[i] = data->block[i-1];
1095 } 1046 }
1096 break; 1047 break;
1097 case I2C_SMBUS_BLOCK_PROC_CALL: 1048 case I2C_SMBUS_BLOCK_PROC_CALL:
1098 case I2C_SMBUS_BLOCK_PROC_CALL_PEC:
1099 dev_dbg(&adapter->dev, "Block process call not supported " 1049 dev_dbg(&adapter->dev, "Block process call not supported "
1100 "under I2C emulation!\n"); 1050 "under I2C emulation!\n");
1101 return -1; 1051 return -1;
1102 case I2C_SMBUS_I2C_BLOCK_DATA: 1052 case I2C_SMBUS_I2C_BLOCK_DATA:
1103 if (read_write == I2C_SMBUS_READ) { 1053 if (read_write == I2C_SMBUS_READ) {
1104 msg[1].len = I2C_SMBUS_I2C_BLOCK_MAX; 1054 msg[1].len = I2C_SMBUS_BLOCK_MAX;
1105 } else { 1055 } else {
1106 msg[0].len = data->block[0] + 1; 1056 msg[0].len = data->block[0] + 1;
1107 if (msg[0].len > I2C_SMBUS_I2C_BLOCK_MAX + 1) { 1057 if (msg[0].len > I2C_SMBUS_BLOCK_MAX + 1) {
1108 dev_err(&adapter->dev, "i2c_smbus_xfer_emulated called with " 1058 dev_err(&adapter->dev, "i2c_smbus_xfer_emulated called with "
1109 "invalid block write size (%d)\n", 1059 "invalid block write size (%d)\n",
1110 data->block[0]); 1060 data->block[0]);
@@ -1120,9 +1070,30 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
1120 return -1; 1070 return -1;
1121 } 1071 }
1122 1072
1073 i = ((flags & I2C_CLIENT_PEC) && size != I2C_SMBUS_QUICK
1074 && size != I2C_SMBUS_I2C_BLOCK_DATA);
1075 if (i) {
1076 /* Compute PEC if first message is a write */
1077 if (!(msg[0].flags & I2C_M_RD)) {
1078 if (num == 1) /* Write only */
1079 i2c_smbus_add_pec(&msg[0]);
1080 else /* Write followed by read */
1081 partial_pec = i2c_smbus_msg_pec(0, &msg[0]);
1082 }
1083 /* Ask for PEC if last message is a read */
1084 if (msg[num-1].flags & I2C_M_RD)
1085 msg[num-1].len++;
1086 }
1087
1123 if (i2c_transfer(adapter, msg, num) < 0) 1088 if (i2c_transfer(adapter, msg, num) < 0)
1124 return -1; 1089 return -1;
1125 1090
1091 /* Check PEC if last message is a read */
1092 if (i && (msg[num-1].flags & I2C_M_RD)) {
1093 if (i2c_smbus_check_pec(partial_pec, &msg[num-1]) < 0)
1094 return -1;
1095 }
1096
1126 if (read_write == I2C_SMBUS_READ) 1097 if (read_write == I2C_SMBUS_READ)
1127 switch(size) { 1098 switch(size) {
1128 case I2C_SMBUS_BYTE: 1099 case I2C_SMBUS_BYTE:
@@ -1137,8 +1108,8 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter * adapter, u16 addr,
1137 break; 1108 break;
1138 case I2C_SMBUS_I2C_BLOCK_DATA: 1109 case I2C_SMBUS_I2C_BLOCK_DATA:
1139 /* fixed at 32 for now */ 1110 /* fixed at 32 for now */
1140 data->block[0] = I2C_SMBUS_I2C_BLOCK_MAX; 1111 data->block[0] = I2C_SMBUS_BLOCK_MAX;
1141 for (i = 0; i < I2C_SMBUS_I2C_BLOCK_MAX; i++) 1112 for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
1142 data->block[i+1] = msgbuf1[i]; 1113 data->block[i+1] = msgbuf1[i];
1143 break; 1114 break;
1144 } 1115 }
@@ -1151,28 +1122,8 @@ s32 i2c_smbus_xfer(struct i2c_adapter * adapter, u16 addr, unsigned short flags,
1151 union i2c_smbus_data * data) 1122 union i2c_smbus_data * data)
1152{ 1123{
1153 s32 res; 1124 s32 res;
1154 int swpec = 0;
1155 u8 partial = 0;
1156 1125
1157 flags &= I2C_M_TEN | I2C_CLIENT_PEC; 1126 flags &= I2C_M_TEN | I2C_CLIENT_PEC;
1158 if((flags & I2C_CLIENT_PEC) &&
1159 !(i2c_check_functionality(adapter, I2C_FUNC_SMBUS_HWPEC_CALC))) {
1160 swpec = 1;
1161 if(read_write == I2C_SMBUS_READ &&
1162 size == I2C_SMBUS_BLOCK_DATA)
1163 size = I2C_SMBUS_BLOCK_DATA_PEC;
1164 else if(size == I2C_SMBUS_PROC_CALL)
1165 size = I2C_SMBUS_PROC_CALL_PEC;
1166 else if(size == I2C_SMBUS_BLOCK_PROC_CALL) {
1167 i2c_smbus_add_pec(addr, command,
1168 I2C_SMBUS_BLOCK_DATA, data);
1169 partial = data->block[data->block[0] + 1];
1170 size = I2C_SMBUS_BLOCK_PROC_CALL_PEC;
1171 } else if(read_write == I2C_SMBUS_WRITE &&
1172 size != I2C_SMBUS_QUICK &&
1173 size != I2C_SMBUS_I2C_BLOCK_DATA)
1174 size = i2c_smbus_add_pec(addr, command, size, data);
1175 }
1176 1127
1177 if (adapter->algo->smbus_xfer) { 1128 if (adapter->algo->smbus_xfer) {
1178 down(&adapter->bus_lock); 1129 down(&adapter->bus_lock);
@@ -1183,13 +1134,6 @@ s32 i2c_smbus_xfer(struct i2c_adapter * adapter, u16 addr, unsigned short flags,
1183 res = i2c_smbus_xfer_emulated(adapter,addr,flags,read_write, 1134 res = i2c_smbus_xfer_emulated(adapter,addr,flags,read_write,
1184 command,size,data); 1135 command,size,data);
1185 1136
1186 if(res >= 0 && swpec &&
1187 size != I2C_SMBUS_QUICK && size != I2C_SMBUS_I2C_BLOCK_DATA &&
1188 (read_write == I2C_SMBUS_READ || size == I2C_SMBUS_PROC_CALL_PEC ||
1189 size == I2C_SMBUS_BLOCK_PROC_CALL_PEC)) {
1190 if(i2c_smbus_check_pec(addr, command, size, partial, data))
1191 return -1;
1192 }
1193 return res; 1137 return res;
1194} 1138}
1195 1139