15 files changed, 26 insertions, 26 deletions

diff --git a/drivers/i2c/busses/i2c-ali1535.c b/drivers/i2c/busses/i2c-ali1535.c
index 906a3ca50db6..dd364171f9c5 100644
--- a/drivers/i2c/busses/i2c-ali1535.c
+++ b/drivers/i2c/busses/i2c-ali1535.c
@@ -295,7 +295,7 @@ static int ali1535_transaction(struct i2c_adapter *adap)
         }
 
         /* Unfortunately the ALI SMB controller maps "no response" and "bus
-         * collision" into a single bit. No reponse is the usual case so don't
+         * collision" into a single bit. No response is the usual case so don't
          * do a printk.  This means that bus collisions go unreported.
          */
         if (temp & ALI1535_STS_BUSERR) {
diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c
index b14f6d68221d..83e8a60cdc86 100644
--- a/drivers/i2c/busses/i2c-ali15x3.c
+++ b/drivers/i2c/busses/i2c-ali15x3.c
@@ -318,7 +318,7 @@ static int ali15x3_transaction(struct i2c_adapter *adap)
 
         /*
           Unfortunately the ALI SMB controller maps "no response" and "bus
-          collision" into a single bit. No reponse is the usual case so don't
+          collision" into a single bit. No response is the usual case so don't
           do a printk.
           This means that bus collisions go unreported.
         */
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index 5795c8398c7c..a76d85fa3ad7 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -355,7 +355,7 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
         /*
          * Write mode register first as needed for correct behaviour
          * on OMAP-L138, but don't set STT yet to avoid a race with XRDY
-         * occuring before we have loaded DXR
+         * occurring before we have loaded DXR
          */
         davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
 
diff --git a/drivers/i2c/busses/i2c-designware.c b/drivers/i2c/busses/i2c-designware.c
index b664ed8bbdb3..b7a51c43b185 100644
--- a/drivers/i2c/busses/i2c-designware.c
+++ b/drivers/i2c/busses/i2c-designware.c
@@ -178,7 +178,7 @@ static char *abort_sources[] = {
  * @lock: protect this struct and IO registers
  * @clk: input reference clock
  * @cmd_err: run time hadware error code
- * @msgs: points to an array of messages currently being transfered
+ * @msgs: points to an array of messages currently being transferred
  * @msgs_num: the number of elements in msgs
  * @msg_write_idx: the element index of the current tx message in the msgs
  *      array
diff --git a/drivers/i2c/busses/i2c-elektor.c b/drivers/i2c/busses/i2c-elektor.c
index e5b1a3bf5b80..37e2e82a9c88 100644
--- a/drivers/i2c/busses/i2c-elektor.c
+++ b/drivers/i2c/busses/i2c-elektor.c
@@ -22,7 +22,7 @@
 /* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even
    Frodo Looijaard <frodol@dds.nl> */
 
-/* Partialy rewriten by Oleg I. Vdovikin for mmapped support of
+/* Partially rewriten by Oleg I. Vdovikin for mmapped support of
    for Alpha Processor Inc. UP-2000(+) boards */
 
 #include <linux/kernel.h>
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index ed2e0c5ea37c..72c0415f6f94 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -96,7 +96,7 @@
 #define SMBHSTCFG_SMB_SMI_EN    2
 #define SMBHSTCFG_I2C_EN        4
 
-/* Auxillary control register bits, ICH4+ only */
+/* Auxiliary control register bits, ICH4+ only */
 #define SMBAUXCTL_CRC           1
 #define SMBAUXCTL_E32B          2
 
diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c
index e4f88dca99b5..3c110fbc409b 100644
--- a/drivers/i2c/busses/i2c-ibm_iic.c
+++ b/drivers/i2c/busses/i2c-ibm_iic.c
@@ -494,7 +494,7 @@ static int iic_xfer_bytes(struct ibm_iic_private* dev, struct i2c_msg* pm,
                 if (unlikely(ret < 0))
                         break;
                 else if (unlikely(ret != count)){
-                        DBG("%d: xfer_bytes, requested %d, transfered %d\n",
+                        DBG("%d: xfer_bytes, requested %d, transferred %d\n",
                                 dev->idx, count, ret);
 
                         /* If it's not a last part of xfer, abort it */
@@ -593,7 +593,7 @@ static int iic_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
         if (unlikely((in_8(&iic->extsts) & EXTSTS_BCS_MASK) != EXTSTS_BCS_FREE)){
                 DBG("%d: iic_xfer, bus is not free\n", dev->idx);
 
-                /* Usually it means something serious has happend.
+                /* Usually it means something serious has happened.
                  * We *cannot* have unfinished previous transfer
                  * so it doesn't make any sense to try to stop it.
                  * Probably we were not able to recover from the
diff --git a/drivers/i2c/busses/i2c-intel-mid.c b/drivers/i2c/busses/i2c-intel-mid.c
index c71492782bbd..e828ac85cfa7 100644
--- a/drivers/i2c/busses/i2c-intel-mid.c
+++ b/drivers/i2c/busses/i2c-intel-mid.c
@@ -170,8 +170,8 @@ struct intel_mid_i2c_private {
 /* Raw Interrupt Status Register */
 #define IC_RAW_INTR_STAT        0x34            /* Read Only */
 #define GEN_CALL                (1 << 11)       /* General call */
-#define START_DET               (1 << 10)       /* (RE)START occured */
-#define STOP_DET                (1 << 9)        /* STOP occured */
+#define START_DET               (1 << 10)       /* (RE)START occurred */
+#define STOP_DET                (1 << 9)        /* STOP occurred */
 #define ACTIVITY                (1 << 8)        /* Bus busy */
 #define RX_DONE                 (1 << 7)        /* Not used in Master mode */
 #define TX_ABRT                 (1 << 6)        /* Transmit Abort */
@@ -375,7 +375,7 @@ static int intel_mid_i2c_disable(struct i2c_adapter *adap)
  * I2C should be disabled prior to other register operation. If failed, an
  * errno is returned. Mask and Clear all interrpts, this should be done at
  * first.  Set common registers which will not be modified during normal
- * transfers, including: controll register, FIFO threshold and clock freq.
+ * transfers, including: control register, FIFO threshold and clock freq.
  * Check APB data width at last.
  */
 static int intel_mid_i2c_hwinit(struct intel_mid_i2c_private *i2c)
@@ -455,7 +455,7 @@ static inline bool intel_mid_i2c_address_neq(const struct i2c_msg *p1,
  *
  * By reading register IC_TX_ABRT_SOURCE, various transfer errors can be
  * distingushed. At present, no circumstances have been found out that
- * multiple errors would be occured simutaneously, so we simply use the
+ * multiple errors would be occurred simutaneously, so we simply use the
  * register value directly.
  *
  * At last the error bits are cleared. (Note clear ABRT_SBYTE_NORSTRT bit need
@@ -469,7 +469,7 @@ static void intel_mid_i2c_abort(struct intel_mid_i2c_private *i2c)
 
         /* Single transfer error check:
          * According to databook, TX/RX FIFOs would be flushed when
-         * the abort interrupt occured.
+         * the abort interrupt occurred.
          */
         if (abort & ABRT_MASTER_DIS)
                 dev_err(&adap->dev,
@@ -569,7 +569,7 @@ static int xfer_read(struct i2c_adapter *adap, unsigned char *buf, int length)
  * Return Values:
  * 0    if the read transfer succeeds
  * -ETIMEDOUT   if we cannot read the "raw" interrupt register
- * -EINVAL      if a transfer abort occured
+ * -EINVAL      if a transfer abort occurred
  *
  * For every byte, a "WRITE" command will be loaded into IC_DATA_CMD prior to
  * data transfer. The actual "write" operation will be performed when the
@@ -697,7 +697,7 @@ static int intel_mid_i2c_setup(struct i2c_adapter *adap,  struct i2c_msg *pmsg)
  * @num: number of i2c_msg
  *
  * Return Values:
- * +            number of messages transfered
+ * +            number of messages transferred
  * -ETIMEDOUT   If cannot disable I2C controller or read IC_STATUS
  * -EINVAL      If the address in i2c_msg is invalid
  *
diff --git a/drivers/i2c/busses/i2c-isch.c b/drivers/i2c/busses/i2c-isch.c
index ddc258edb34f..0682f8f277b0 100644
--- a/drivers/i2c/busses/i2c-isch.c
+++ b/drivers/i2c/busses/i2c-isch.c
@@ -141,7 +141,7 @@ static int sch_transaction(void)
  * This is the main access entry for i2c-sch access
  * adap is i2c_adapter pointer, addr is the i2c device bus address, read_write
  * (0 for read and 1 for write), size is i2c transaction type and data is the
- * union of transaction for data to be transfered or data read from bus.
+ * union of transaction for data to be transferred or data read from bus.
  * return 0 for success and others for failure.
  */
 static s32 sch_access(struct i2c_adapter *adap, u16 addr,
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
index caf96dc8ca1b..7e78f7c87857 100644
--- a/drivers/i2c/busses/i2c-mxs.c
+++ b/drivers/i2c/busses/i2c-mxs.c
@@ -149,7 +149,7 @@ static void mxs_i2c_pioq_setup_write(struct mxs_i2c_dev *i2c,
          * We have to copy the slave address (u8) and buffer (arbitrary number
          * of u8) into the data register (u32). To achieve that, the u8 are put
          * into the MSBs of 'data' which is then shifted for the next u8. When
-         * apropriate, 'data' is written to MXS_I2C_DATA. So, the first u32
+         * appropriate, 'data' is written to MXS_I2C_DATA. So, the first u32
          * looks like this:
          *
          *  3          2          1          0
diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c
index 594ed5059c4a..e10e5cf3751a 100644
--- a/drivers/i2c/busses/i2c-nomadik.c
+++ b/drivers/i2c/busses/i2c-nomadik.c
@@ -126,9 +126,9 @@ enum i2c_operation {
 /**
  * struct i2c_nmk_client - client specific data
  * @slave_adr: 7-bit slave address
- * @count: no. bytes to be transfered
+ * @count: no. bytes to be transferred
  * @buffer: client data buffer
- * @xfer_bytes: bytes transfered till now
+ * @xfer_bytes: bytes transferred till now
  * @operation: current I2C operation
  */
 struct i2c_nmk_client {
@@ -330,7 +330,7 @@ static void setup_i2c_controller(struct nmk_i2c_dev *dev)
          * slsu defines the data setup time after SCL clock
          * stretching in terms of i2c clk cycles. The
          * needed setup time for the three modes are 250ns,
-         * 100ns, 10ns repectively thus leading to the values
+         * 100ns, 10ns respectively thus leading to the values
          * of 14, 6, 2 for a 48 MHz i2c clk.
          */
         writel(dev->cfg.slsu << 16, dev->virtbase + I2C_SCR);
@@ -364,7 +364,7 @@ static void setup_i2c_controller(struct nmk_i2c_dev *dev)
         /*
          * set the speed mode. Currently we support
          * only standard and fast mode of operation
-         * TODO - support for fast mode plus (upto 1Mb/s)
+         * TODO - support for fast mode plus (up to 1Mb/s)
          * and high speed (up to 3.4 Mb/s)
          */
         if (dev->cfg.sm > I2C_FREQ_MODE_FAST) {
diff --git a/drivers/i2c/busses/i2c-s6000.c b/drivers/i2c/busses/i2c-s6000.c
index cadc0216e02f..cb5d01e279c6 100644
--- a/drivers/i2c/busses/i2c-s6000.c
+++ b/drivers/i2c/busses/i2c-s6000.c
@@ -318,7 +318,7 @@ static int __devinit s6i2c_probe(struct platform_device *dev)
         rc = request_irq(iface->irq, s6i2c_interrupt_entry,
                          IRQF_SHARED, dev->name, iface);
         if (rc) {
-                dev_err(&p_adap->dev, "s6i2c: cant get IRQ %d\n", iface->irq);
+                dev_err(&p_adap->dev, "s6i2c: can't get IRQ %d\n", iface->irq);
                 goto err_clk_dis;
         }
 
diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c
index 266135ddf7fa..99879617e686 100644
--- a/drivers/i2c/busses/i2c-stu300.c
+++ b/drivers/i2c/busses/i2c-stu300.c
@@ -497,7 +497,7 @@ static int stu300_set_clk(struct stu300_dev *dev, unsigned long clkrate)
         u32 val;
         int i = 0;
 
-        /* Locate the apropriate clock setting */
+        /* Locate the appropriate clock setting */
         while (i < ARRAY_SIZE(stu300_clktable) - 1 &&
                stu300_clktable[i].rate < clkrate)
                 i++;
@@ -644,7 +644,7 @@ static int stu300_send_address(struct stu300_dev *dev,
         ret = stu300_await_event(dev, STU300_EVENT_6);
 
         /*
-         * Clear any pending EVENT 6 no matter what happend during
+         * Clear any pending EVENT 6 no matter what happened during
          * await_event.
          */
         val = stu300_r8(dev->virtbase + I2C_CR);
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 3921f664c9c3..b4ab39b741eb 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -386,7 +386,7 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)
                 dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS);
         return IRQ_HANDLED;
 err:
-        /* An error occured, mask all interrupts */
+        /* An error occurred, mask all interrupts */
         tegra_i2c_mask_irq(i2c_dev, I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST |
                 I2C_INT_PACKET_XFER_COMPLETE | I2C_INT_TX_FIFO_DATA_REQ |
                 I2C_INT_RX_FIFO_DATA_REQ);
diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
index 9fbd7e6fe32e..e9d5ff4d1496 100644
--- a/drivers/i2c/busses/i2c-xiic.c
+++ b/drivers/i2c/busses/i2c-xiic.c
@@ -21,7 +21,7 @@
  * to the automotive development board Russellville. The copyright holder
  * as seen in the header is Intel corporation.
  * Mocean Laboratories forked off the GNU/Linux platform work into a
- * separate company called Pelagicore AB, which commited the code to the
+ * separate company called Pelagicore AB, which committed the code to the
  * kernel.
  */