7 files changed, 610 insertions, 181 deletions

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index fbeae821ffb3..884320e70403 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -163,7 +163,7 @@ config I2C_PXA_SLAVE
           I2C bus.
 
 config I2C_PIIX4
-        tristate "Intel PIIX4"
+        tristate "Intel PIIX4 and compatible (ATI/Serverworks/Broadcom/SMSC)"
         depends on I2C && PCI
         help
           If you say yes to this option, support will be included for the Intel
@@ -172,6 +172,9 @@ config I2C_PIIX4
           of Broadcom):
             Intel PIIX4
             Intel 440MX
+            ATI IXP200
+            ATI IXP300
+            ATI IXP400
             Serverworks OSB4
             Serverworks CSB5
             Serverworks CSB6
@@ -273,6 +276,17 @@ config I2C_NFORCE2
           This driver can also be built as a module.  If so, the module
           will be called i2c-nforce2.
 
+config I2C_OCORES
+        tristate "OpenCores I2C Controller"
+        depends on I2C && EXPERIMENTAL
+        help
+          If you say yes to this option, support will be included for the
+          OpenCores I2C controller. For details see
+          http://www.opencores.org/projects.cgi/web/i2c/overview
+
+          This driver can also be built as a module.  If so, the module
+          will be called i2c-ocores.
+
 config I2C_PARPORT
         tristate "Parallel port adapter"
         depends on I2C && PARPORT
@@ -500,6 +514,7 @@ config I2C_PCA_ISA
         tristate "PCA9564 on an ISA bus"
         depends on I2C
         select I2C_ALGOPCA
+        default n
         help
           This driver supports ISA boards using the Philips PCA 9564
           Parallel bus to I2C bus controller
@@ -507,6 +522,11 @@ config I2C_PCA_ISA
           This driver can also be built as a module.  If so, the module
           will be called i2c-pca-isa.
 
+          This device is almost undetectable and using this driver on a
+          system which doesn't have this device will result in long
+          delays when I2C/SMBus chip drivers are loaded (e.g. at boot
+          time).  If unsure, say N.
+
 config I2C_MV64XXX
         tristate "Marvell mv64xxx I2C Controller"
         depends on I2C && MV64X60 && EXPERIMENTAL
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index b44831dff683..ac56df53155b 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_I2C_POWERMAC)	+= i2c-powermac.o
 obj-$(CONFIG_I2C_MPC)           += i2c-mpc.o
 obj-$(CONFIG_I2C_MV64XXX)       += i2c-mv64xxx.o
 obj-$(CONFIG_I2C_NFORCE2)       += i2c-nforce2.o
+obj-$(CONFIG_I2C_OCORES)        += i2c-ocores.o
 obj-$(CONFIG_I2C_PARPORT)       += i2c-parport.o
 obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o
 obj-$(CONFIG_I2C_PCA_ISA)       += i2c-pca-isa.o
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index dfca74933625..3e0d04d5a800 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -1,5 +1,5 @@
 /*
-    i801.c - Part of lm_sensors, Linux kernel modules for hardware
+    i2c-i801.c - Part of lm_sensors, Linux kernel modules for hardware
               monitoring
     Copyright (c) 1998 - 2002  Frodo Looijaard <frodol@dds.nl>,
     Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
@@ -36,7 +36,7 @@
     This driver supports several versions of Intel's I/O Controller Hubs (ICH).
     For SMBus support, they are similar to the PIIX4 and are part
     of Intel's '810' and other chipsets.
-    See the doc/busses/i2c-i801 file for details.
+    See the file Documentation/i2c/busses/i2c-i801 for details.
     I2C Block Read and Process Call are not supported.
 */
 
@@ -66,9 +66,8 @@
 #define SMBAUXCTL       (13 + i801_smba)        /* ICH4 only */
 
 /* PCI Address Constants */
-#define SMBBA           0x020
+#define SMBBAR          4
 #define SMBHSTCFG       0x040
-#define SMBREV          0x008
 
 /* Host configuration bits for SMBHSTCFG */
 #define SMBHSTCFG_HST_EN        1
@@ -92,92 +91,16 @@
 #define I801_START              0x40
 #define I801_PEC_EN             0x80    /* ICH4 only */
 
-/* insmod parameters */
-
-/* If force_addr is set to anything different from 0, we forcibly enable
-   the I801 at the given address. VERY DANGEROUS! */
-static u16 force_addr;
-module_param(force_addr, ushort, 0);
-MODULE_PARM_DESC(force_addr,
-                 "Forcibly enable the I801 at the given address. "
-                 "EXTREMELY DANGEROUS!");
 
 static int i801_transaction(void);
 static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
                                   int command, int hwpec);
 
-static unsigned short i801_smba;
+static unsigned long i801_smba;
 static struct pci_driver i801_driver;
 static struct pci_dev *I801_dev;
 static int isich4;
 
-static int i801_setup(struct pci_dev *dev)
-{
-        int error_return = 0;
-        unsigned char temp;
-
-        /* Note: we keep on searching until we have found 'function 3' */
-        if(PCI_FUNC(dev->devfn) != 3)
-                return -ENODEV;
-
-        I801_dev = dev;
-        if ((dev->device == PCI_DEVICE_ID_INTEL_82801DB_3) ||
-            (dev->device == PCI_DEVICE_ID_INTEL_82801EB_3) ||
-            (dev->device == PCI_DEVICE_ID_INTEL_ESB_4))
-                isich4 = 1;
-        else
-                isich4 = 0;
-
-        /* Determine the address of the SMBus areas */
-        if (force_addr) {
-                i801_smba = force_addr & 0xfff0;
-        } else {
-                pci_read_config_word(I801_dev, SMBBA, &i801_smba);
-                i801_smba &= 0xfff0;
-                if(i801_smba == 0) {
-                        dev_err(&dev->dev, "SMB base address uninitialized "
-                                "- upgrade BIOS or use force_addr=0xaddr\n");
-                        return -ENODEV;
-                }
-        }
-
-        if (!request_region(i801_smba, (isich4 ? 16 : 8), i801_driver.name)) {
-                dev_err(&dev->dev, "I801_smb region 0x%x already in use!\n",
-                        i801_smba);
-                error_return = -EBUSY;
-                goto END;
-        }
-
-        pci_read_config_byte(I801_dev, SMBHSTCFG, &temp);
-        temp &= ~SMBHSTCFG_I2C_EN;      /* SMBus timing */
-        pci_write_config_byte(I801_dev, SMBHSTCFG, temp);
-
-        /* If force_addr is set, we program the new address here. Just to make
-           sure, we disable the device first. */
-        if (force_addr) {
-                pci_write_config_byte(I801_dev, SMBHSTCFG, temp & 0xfe);
-                pci_write_config_word(I801_dev, SMBBA, i801_smba);
-                pci_write_config_byte(I801_dev, SMBHSTCFG, temp | 0x01);
-                dev_warn(&dev->dev, "WARNING: I801 SMBus interface set to "
-                        "new address %04x!\n", i801_smba);
-        } else if ((temp & 1) == 0) {
-                pci_write_config_byte(I801_dev, SMBHSTCFG, temp | 1);
-                dev_warn(&dev->dev, "enabling SMBus device\n");
-        }
-
-        if (temp & 0x02)
-                dev_dbg(&dev->dev, "I801 using Interrupt SMI# for SMBus.\n");
-        else
-                dev_dbg(&dev->dev, "I801 using PCI Interrupt for SMBus.\n");
-
-        pci_read_config_byte(I801_dev, SMBREV, &temp);
-        dev_dbg(&dev->dev, "SMBREV = 0x%X\n", temp);
-        dev_dbg(&dev->dev, "I801_smba = 0x%X\n", i801_smba);
-
-END:
-        return error_return;
-}
-
 static int i801_transaction(void)
 {
         int temp;
@@ -334,8 +257,8 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
                 /* We will always wait for a fraction of a second! */
                 timeout = 0;
                 do {
-                        temp = inb_p(SMBHSTSTS);
                         msleep(1);
+                        temp = inb_p(SMBHSTSTS);
                 }
                     while ((!(temp & 0x80))
                            && (timeout++ < MAX_TIMEOUT));
@@ -393,8 +316,8 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
                 /* wait for INTR bit as advised by Intel */
                 timeout = 0;
                 do {
-                        temp = inb_p(SMBHSTSTS);
                         msleep(1);
+                        temp = inb_p(SMBHSTSTS);
                 } while ((!(temp & 0x02))
                            && (timeout++ < MAX_TIMEOUT));
 
@@ -541,25 +464,76 @@ MODULE_DEVICE_TABLE (pci, i801_ids);
 
 static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
 {
+        unsigned char temp;
+        int err;
+
+        I801_dev = dev;
+        if ((dev->device == PCI_DEVICE_ID_INTEL_82801DB_3) ||
+            (dev->device == PCI_DEVICE_ID_INTEL_82801EB_3) ||
+            (dev->device == PCI_DEVICE_ID_INTEL_ESB_4))
+                isich4 = 1;
+        else
+                isich4 = 0;
+
+        err = pci_enable_device(dev);
+        if (err) {
+                dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n",
+                        err);
+                goto exit;
+        }
+
+        /* Determine the address of the SMBus area */
+        i801_smba = pci_resource_start(dev, SMBBAR);
+        if (!i801_smba) {
+                dev_err(&dev->dev, "SMBus base address uninitialized, "
+                        "upgrade BIOS\n");
+                err = -ENODEV;
+                goto exit_disable;
+        }
+
+        err = pci_request_region(dev, SMBBAR, i801_driver.name);
+        if (err) {
+                dev_err(&dev->dev, "Failed to request SMBus region "
+                        "0x%lx-0x%lx\n", i801_smba,
+                        pci_resource_end(dev, SMBBAR));
+                goto exit_disable;
+        }
 
-        if (i801_setup(dev)) {
-                dev_warn(&dev->dev,
-                        "I801 not detected, module not inserted.\n");
-                return -ENODEV;
+        pci_read_config_byte(I801_dev, SMBHSTCFG, &temp);
+        temp &= ~SMBHSTCFG_I2C_EN;      /* SMBus timing */
+        if (!(temp & SMBHSTCFG_HST_EN)) {
+                dev_info(&dev->dev, "Enabling SMBus device\n");
+                temp |= SMBHSTCFG_HST_EN;
         }
+        pci_write_config_byte(I801_dev, SMBHSTCFG, temp);
+
+        if (temp & SMBHSTCFG_SMB_SMI_EN)
+                dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n");
+        else
+                dev_dbg(&dev->dev, "SMBus using PCI Interrupt\n");
 
         /* set up the driverfs linkage to our parent device */
         i801_adapter.dev.parent = &dev->dev;
 
         snprintf(i801_adapter.name, I2C_NAME_SIZE,
-                "SMBus I801 adapter at %04x", i801_smba);
-        return i2c_add_adapter(&i801_adapter);
+                "SMBus I801 adapter at %04lx", i801_smba);
+        err = i2c_add_adapter(&i801_adapter);
+        if (err) {
+                dev_err(&dev->dev, "Failed to add SMBus adapter\n");
+                goto exit_disable;
+        }
+
+exit_disable:
+        pci_disable_device(dev);
+exit:
+        return err;
 }
 
 static void __devexit i801_remove(struct pci_dev *dev)
 {
         i2c_del_adapter(&i801_adapter);
-        release_region(i801_smba, (isich4 ? 16 : 8));
+        pci_release_region(dev, SMBBAR);
+        pci_disable_device(dev);
 }
 
 static struct pci_driver i801_driver = {
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index 2d80eb26f688..604b49e22df1 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -31,6 +31,8 @@
     nForce3 250Gb MCP           00E4
     nForce4 MCP                 0052
     nForce4 MCP-04              0034
+    nForce4 MCP51               0264
+    nForce4 MCP55               0368
 
     This driver supports the 2 SMBuses that are included in the MCP of the
     nForce2/3/4 chipsets.
@@ -64,6 +66,7 @@ struct nforce2_smbus {
 
 /*
  * nVidia nForce2 SMBus control register definitions
+ * (Newer incarnations use standard BARs 4 and 5 instead)
  */
 #define NFORCE_PCI_SMB1 0x50
 #define NFORCE_PCI_SMB2 0x54
@@ -259,6 +262,8 @@ static struct pci_device_id nforce2_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
+        { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
+        { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
         { 0 }
 };
 
@@ -266,19 +271,29 @@ static struct pci_device_id nforce2_ids[] = {
 MODULE_DEVICE_TABLE (pci, nforce2_ids);
 
 
-static int __devinit nforce2_probe_smb (struct pci_dev *dev, int reg,
-        struct nforce2_smbus *smbus, char *name)
+static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
+        int alt_reg, struct nforce2_smbus *smbus, const char *name)
 {
-        u16 iobase;
         int error;
 
-        if (pci_read_config_word(dev, reg, &iobase) != PCIBIOS_SUCCESSFUL) {
-                dev_err(&smbus->adapter.dev, "Error reading PCI config for %s\n", name);
-                return -1;
+        smbus->base = pci_resource_start(dev, bar);
+        if (smbus->base) {
+                smbus->size = pci_resource_len(dev, bar);
+        } else {
+                /* Older incarnations of the device used non-standard BARs */
+                u16 iobase;
+
+                if (pci_read_config_word(dev, alt_reg, &iobase)
+                    != PCIBIOS_SUCCESSFUL) {
+                        dev_err(&dev->dev, "Error reading PCI config for %s\n",
+                                name);
+                        return -1;
+                }
+
+                smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
+                smbus->size = 8;
         }
-        smbus->dev  = dev;
-        smbus->base = iobase & 0xfffc;
-        smbus->size = 8;
+        smbus->dev = dev;
 
         if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
                 dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
@@ -313,12 +328,13 @@ static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_
         pci_set_drvdata(dev, smbuses);
 
         /* SMBus adapter 1 */
-        res1 = nforce2_probe_smb (dev, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
+        res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
         if (res1 < 0) {
                 dev_err(&dev->dev, "Error probing SMB1.\n");
                 smbuses[0].base = 0;    /* to have a check value */
         }
-        res2 = nforce2_probe_smb (dev, NFORCE_PCI_SMB2, &smbuses[1], "SMB2");
+        /* SMBus adapter 2 */
+        res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1], "SMB2");
         if (res2 < 0) {
                 dev_err(&dev->dev, "Error probing SMB2.\n");
                 smbuses[1].base = 0;    /* to have a check value */
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
new file mode 100644
index 000000000000..592824087c49
--- /dev/null
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -0,0 +1,341 @@
+/*
+ * i2c-ocores.c: I2C bus driver for OpenCores I2C controller
+ * (http://www.opencores.org/projects.cgi/web/i2c/overview).
+ *
+ * Peter Korsgaard <jacmet@sunsite.dk>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/wait.h>
+#include <linux/i2c-ocores.h>
+#include <asm/io.h>
+
+struct ocores_i2c {
+        void __iomem *base;
+        int regstep;
+        wait_queue_head_t wait;
+        struct i2c_adapter adap;
+        struct i2c_msg *msg;
+        int pos;
+        int nmsgs;
+        int state; /* see STATE_ */
+};
+
+/* registers */
+#define OCI2C_PRELOW            0
+#define OCI2C_PREHIGH           1
+#define OCI2C_CONTROL           2
+#define OCI2C_DATA              3
+#define OCI2C_CMD               4 /* write only */
+#define OCI2C_STATUS            4 /* read only, same address as OCI2C_CMD */
+
+#define OCI2C_CTRL_IEN          0x40
+#define OCI2C_CTRL_EN           0x80
+
+#define OCI2C_CMD_START         0x91
+#define OCI2C_CMD_STOP          0x41
+#define OCI2C_CMD_READ          0x21
+#define OCI2C_CMD_WRITE         0x11
+#define OCI2C_CMD_READ_ACK      0x21
+#define OCI2C_CMD_READ_NACK     0x29
+#define OCI2C_CMD_IACK          0x01
+
+#define OCI2C_STAT_IF           0x01
+#define OCI2C_STAT_TIP          0x02
+#define OCI2C_STAT_ARBLOST      0x20
+#define OCI2C_STAT_BUSY         0x40
+#define OCI2C_STAT_NACK         0x80
+
+#define STATE_DONE              0
+#define STATE_START             1
+#define STATE_WRITE             2
+#define STATE_READ              3
+#define STATE_ERROR             4
+
+static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value)
+{
+        iowrite8(value, i2c->base + reg * i2c->regstep);
+}
+
+static inline u8 oc_getreg(struct ocores_i2c *i2c, int reg)
+{
+        return ioread8(i2c->base + reg * i2c->regstep);
+}
+
+static void ocores_process(struct ocores_i2c *i2c)
+{
+        struct i2c_msg *msg = i2c->msg;
+        u8 stat = oc_getreg(i2c, OCI2C_STATUS);
+
+        if ((i2c->state == STATE_DONE) || (i2c->state == STATE_ERROR)) {
+                /* stop has been sent */
+                oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
+                wake_up(&i2c->wait);
+                return;
+        }
+
+        /* error? */
+        if (stat & OCI2C_STAT_ARBLOST) {
+                i2c->state = STATE_ERROR;
+                oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+                return;
+        }
+
+        if ((i2c->state == STATE_START) || (i2c->state == STATE_WRITE)) {
+                i2c->state =
+                        (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
+
+                if (stat & OCI2C_STAT_NACK) {
+                        i2c->state = STATE_ERROR;
+                        oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+                        return;
+                }
+        } else
+                msg->buf[i2c->pos++] = oc_getreg(i2c, OCI2C_DATA);
+
+        /* end of msg? */
+        if (i2c->pos == msg->len) {
+                i2c->nmsgs--;
+                i2c->msg++;
+                i2c->pos = 0;
+                msg = i2c->msg;
+
+                if (i2c->nmsgs) {       /* end? */
+                        /* send start? */
+                        if (!(msg->flags & I2C_M_NOSTART)) {
+                                u8 addr = (msg->addr << 1);
+
+                                if (msg->flags & I2C_M_RD)
+                                        addr |= 1;
+
+                                i2c->state = STATE_START;
+
+                                oc_setreg(i2c, OCI2C_DATA, addr);
+                                oc_setreg(i2c, OCI2C_CMD,  OCI2C_CMD_START);
+                                return;
+                        } else
+                                i2c->state = (msg->flags & I2C_M_RD)
+                                        ? STATE_READ : STATE_WRITE;
+                } else {
+                        i2c->state = STATE_DONE;
+                        oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+                        return;
+                }
+        }
+
+        if (i2c->state == STATE_READ) {
+                oc_setreg(i2c, OCI2C_CMD, i2c->pos == (msg->len-1) ?
+                          OCI2C_CMD_READ_NACK : OCI2C_CMD_READ_ACK);
+        } else {
+                oc_setreg(i2c, OCI2C_DATA, msg->buf[i2c->pos++]);
+                oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_WRITE);
+        }
+}
+
+static irqreturn_t ocores_isr(int irq, void *dev_id, struct pt_regs *regs)
+{
+        struct ocores_i2c *i2c = dev_id;
+
+        ocores_process(i2c);
+
+        return IRQ_HANDLED;
+}
+
+static int ocores_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+{
+        struct ocores_i2c *i2c = i2c_get_adapdata(adap);
+
+        i2c->msg = msgs;
+        i2c->pos = 0;
+        i2c->nmsgs = num;
+        i2c->state = STATE_START;
+
+        oc_setreg(i2c, OCI2C_DATA,
+                        (i2c->msg->addr << 1) |
+                        ((i2c->msg->flags & I2C_M_RD) ? 1:0));
+
+        oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
+
+        if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) ||
+                               (i2c->state == STATE_DONE), HZ))
+                return (i2c->state == STATE_DONE) ? num : -EIO;
+        else
+                return -ETIMEDOUT;
+}
+
+static void ocores_init(struct ocores_i2c *i2c,
+                        struct ocores_i2c_platform_data *pdata)
+{
+        int prescale;
+        u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
+
+        /* make sure the device is disabled */
+        oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
+
+        prescale = (pdata->clock_khz / (5*100)) - 1;
+        oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff);
+        oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8);
+
+        /* Init the device */
+        oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
+        oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN);
+}
+
+
+static u32 ocores_func(struct i2c_adapter *adap)
+{
+        return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static struct i2c_algorithm ocores_algorithm = {
+        .master_xfer    = ocores_xfer,
+        .functionality  = ocores_func,
+};
+
+static struct i2c_adapter ocores_adapter = {
+        .owner          = THIS_MODULE,
+        .name           = "i2c-ocores",
+        .class          = I2C_CLASS_HWMON,
+        .algo           = &ocores_algorithm,
+};
+
+
+static int __devinit ocores_i2c_probe(struct platform_device *pdev)
+{
+        struct ocores_i2c *i2c;
+        struct ocores_i2c_platform_data *pdata;
+        struct resource *res, *res2;
+        int ret;
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res)
+                return -ENODEV;
+
+        res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+        if (!res2)
+                return -ENODEV;
+
+        pdata = (struct ocores_i2c_platform_data*) pdev->dev.platform_data;
+        if (!pdata)
+                return -ENODEV;
+
+        i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
+        if (!i2c)
+                return -ENOMEM;
+
+        if (!request_mem_region(res->start, res->end - res->start + 1,
+                                pdev->name)) {
+                dev_err(&pdev->dev, "Memory region busy\n");
+                ret = -EBUSY;
+                goto request_mem_failed;
+        }
+
+        i2c->base = ioremap(res->start, res->end - res->start + 1);
+        if (!i2c->base) {
+                dev_err(&pdev->dev, "Unable to map registers\n");
+                ret = -EIO;
+                goto map_failed;
+        }
+
+        i2c->regstep = pdata->regstep;
+        ocores_init(i2c, pdata);
+
+        init_waitqueue_head(&i2c->wait);
+        ret = request_irq(res2->start, ocores_isr, 0, pdev->name, i2c);
+        if (ret) {
+                dev_err(&pdev->dev, "Cannot claim IRQ\n");
+                goto request_irq_failed;
+        }
+
+        /* hook up driver to tree */
+        platform_set_drvdata(pdev, i2c);
+        i2c->adap = ocores_adapter;
+        i2c_set_adapdata(&i2c->adap, i2c);
+        i2c->adap.dev.parent = &pdev->dev;
+
+        /* add i2c adapter to i2c tree */
+        ret = i2c_add_adapter(&i2c->adap);
+        if (ret) {
+                dev_err(&pdev->dev, "Failed to add adapter\n");
+                goto add_adapter_failed;
+        }
+
+        return 0;
+
+add_adapter_failed:
+        free_irq(res2->start, i2c);
+request_irq_failed:
+        iounmap(i2c->base);
+map_failed:
+        release_mem_region(res->start, res->end - res->start + 1);
+request_mem_failed:
+        kfree(i2c);
+
+        return ret;
+}
+
+static int __devexit ocores_i2c_remove(struct platform_device* pdev)
+{
+        struct ocores_i2c *i2c = platform_get_drvdata(pdev);
+        struct resource *res;
+
+        /* disable i2c logic */
+        oc_setreg(i2c, OCI2C_CONTROL, oc_getreg(i2c, OCI2C_CONTROL)
+                  & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
+
+        /* remove adapter & data */
+        i2c_del_adapter(&i2c->adap);
+        platform_set_drvdata(pdev, NULL);
+
+        res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+        if (res)
+                free_irq(res->start, i2c);
+
+        iounmap(i2c->base);
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (res)
+                release_mem_region(res->start, res->end - res->start + 1);
+
+        kfree(i2c);
+
+        return 0;
+}
+
+static struct platform_driver ocores_i2c_driver = {
+        .probe  = ocores_i2c_probe,
+        .remove = __devexit_p(ocores_i2c_remove),
+        .driver = {
+                .owner = THIS_MODULE,
+                .name = "ocores-i2c",
+        },
+};
+
+static int __init ocores_i2c_init(void)
+{
+        return platform_driver_register(&ocores_i2c_driver);
+}
+
+static void __exit ocores_i2c_exit(void)
+{
+        platform_driver_unregister(&ocores_i2c_driver);
+}
+
+module_init(ocores_i2c_init);
+module_exit(ocores_i2c_exit);
+
+MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
+MODULE_DESCRIPTION("OpenCores I2C bus driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index d9c7c00e71f9..8f2f65b793b9 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -102,13 +102,6 @@ MODULE_PARM_DESC(force_addr,
                  "Forcibly enable the PIIX4 at the given address. "
                  "EXTREMELY DANGEROUS!");
 
-/* If fix_hstcfg is set to anything different from 0, we reset one of the
-   registers to be a valid value. */
-static int fix_hstcfg;
-module_param (fix_hstcfg, int, 0);
-MODULE_PARM_DESC(fix_hstcfg,
-                "Fix config register. Needed on some boards (Force CPCI735).");
-
 static int piix4_transaction(void);
 
 static unsigned short piix4_smba;
@@ -137,7 +130,7 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
         /* Don't access SMBus on IBM systems which get corrupted eeproms */
         if (dmi_check_system(piix4_dmi_table) &&
                         PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) {
-                dev_err(&PIIX4_dev->dev, "IBM Laptop detected; this module "
+                dev_err(&PIIX4_dev->dev, "IBM system detected; this module "
                         "may corrupt your serial eeprom! Refusing to load "
                         "module!\n");
                 return -EPERM;
@@ -166,22 +159,6 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
 
         pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
 
-        /* Some BIOS will set up the chipset incorrectly and leave a register
-           in an undefined state (causing I2C to act very strangely). */
-        if (temp & 0x02) {
-                if (fix_hstcfg) {
-                        dev_info(&PIIX4_dev->dev, "Working around buggy BIOS "
-                                        "(I2C)\n");
-                        temp &= 0xfd;
-                        pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp);
-                } else {
-                        dev_info(&PIIX4_dev->dev, "Unusual config register "
-                                        "value\n");
-                        dev_info(&PIIX4_dev->dev, "Try using fix_hstcfg=1 if "
-                                        "you experience problems\n");
-                }
-        }
- 
         /* If force_addr is set, we program the new address here. Just to make
            sure, we disable the PIIX4 first. */
         if (force_addr) {
@@ -214,7 +191,7 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
                 }
         }
 
-        if ((temp & 0x0E) == 8)
+        if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
                 dev_dbg(&PIIX4_dev->dev, "Using Interrupt 9 for SMBus.\n");
         else if ((temp & 0x0E) == 0)
                 dev_dbg(&PIIX4_dev->dev, "Using Interrupt SMI# for SMBus.\n");
@@ -413,6 +390,12 @@ static struct i2c_adapter piix4_adapter = {
 static struct pci_device_id piix4_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3),
           .driver_data = 3 },
+        { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS),
+          .driver_data = 0 },
+        { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS),
+          .driver_data = 0 },
+        { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS),
+          .driver_data = 0 },
         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4),
           .driver_data = 0 },
         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5),
diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c
index 766cc969c4d0..22a3eda04166 100644
--- a/drivers/i2c/busses/scx200_acb.c
+++ b/drivers/i2c/busses/scx200_acb.c
@@ -33,7 +33,6 @@
 #include <linux/delay.h>
 #include <linux/mutex.h>
 #include <asm/io.h>
-#include <asm/msr.h>
 
 #include <linux/scx200.h>
 
@@ -85,6 +84,10 @@ struct scx200_acb_iface {
         u8 *ptr;
         char needs_reset;
         unsigned len;
+
+        /* PCI device info */
+        struct pci_dev *pdev;
+        int bar;
 };
 
 /* Register Definitions */
@@ -381,7 +384,7 @@ static struct i2c_algorithm scx200_acb_algorithm = {
 static struct scx200_acb_iface *scx200_acb_list;
 static DECLARE_MUTEX(scx200_acb_list_mutex);
 
-static int scx200_acb_probe(struct scx200_acb_iface *iface)
+static __init int scx200_acb_probe(struct scx200_acb_iface *iface)
 {
         u8 val;
 
@@ -417,17 +420,16 @@ static int scx200_acb_probe(struct scx200_acb_iface *iface)
         return 0;
 }
 
-static int  __init scx200_acb_create(const char *text, int base, int index)
+static __init struct scx200_acb_iface *scx200_create_iface(const char *text,
+                int index)
 {
         struct scx200_acb_iface *iface;
         struct i2c_adapter *adapter;
-        int rc;
 
         iface = kzalloc(sizeof(*iface), GFP_KERNEL);
         if (!iface) {
                 printk(KERN_ERR NAME ": can't allocate memory\n");
-                rc = -ENOMEM;
-                goto errout;
+                return NULL;
         }
 
         adapter = &iface->adapter;
@@ -440,26 +442,27 @@ static int  __init scx200_acb_create(const char *text, int base, int index)
 
         mutex_init(&iface->mutex);
 
-        if (!request_region(base, 8, adapter->name)) {
-                printk(KERN_ERR NAME ": can't allocate io 0x%x-0x%x\n",
-                        base, base + 8-1);
-                rc = -EBUSY;
-                goto errout_free;
-        }
-        iface->base = base;
+        return iface;
+}
+
+static int __init scx200_acb_create(struct scx200_acb_iface *iface)
+{
+        struct i2c_adapter *adapter;
+        int rc;
+
+        adapter = &iface->adapter;
 
         rc = scx200_acb_probe(iface);
         if (rc) {
                 printk(KERN_WARNING NAME ": probe failed\n");
-                goto errout_release;
+                return rc;
         }
 
         scx200_acb_reset(iface);
 
         if (i2c_add_adapter(adapter) < 0) {
                 printk(KERN_ERR NAME ": failed to register\n");
-                rc = -ENODEV;
-                goto errout_release;
+                return -ENODEV;
         }
 
         down(&scx200_acb_list_mutex);
@@ -468,64 +471,148 @@ static int  __init scx200_acb_create(const char *text, int base, int index)
         up(&scx200_acb_list_mutex);
 
         return 0;
+}
 
- errout_release:
-        release_region(iface->base, 8);
+static __init int scx200_create_pci(const char *text, struct pci_dev *pdev,
+                int bar)
+{
+        struct scx200_acb_iface *iface;
+        int rc;
+
+        iface = scx200_create_iface(text, 0);
+
+        if (iface == NULL)
+                return -ENOMEM;
+
+        iface->pdev = pdev;
+        iface->bar = bar;
+
+        pci_enable_device_bars(iface->pdev, 1 << iface->bar);
+
+        rc = pci_request_region(iface->pdev, iface->bar, iface->adapter.name);
+
+        if (rc != 0) {
+                printk(KERN_ERR NAME ": can't allocate PCI BAR %d\n",
+                                iface->bar);
+                goto errout_free;
+        }
+
+        iface->base = pci_resource_start(iface->pdev, iface->bar);
+        rc = scx200_acb_create(iface);
+
+        if (rc == 0)
+                return 0;
+
+        pci_release_region(iface->pdev, iface->bar);
+        pci_dev_put(iface->pdev);
  errout_free:
         kfree(iface);
- errout:
         return rc;
 }
 
-static struct pci_device_id scx200[] = {
-        { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
-        { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
-        { },
-};
+static int __init scx200_create_isa(const char *text, unsigned long base,
+                int index)
+{
+        struct scx200_acb_iface *iface;
+        int rc;
+
+        iface = scx200_create_iface(text, index);
+
+        if (iface == NULL)
+                return -ENOMEM;
+
+        if (request_region(base, 8, iface->adapter.name) == 0) {
+                printk(KERN_ERR NAME ": can't allocate io 0x%lx-0x%lx\n",
+                       base, base + 8 - 1);
+                rc = -EBUSY;
+                goto errout_free;
+        }
+
+        iface->base = base;
+        rc = scx200_acb_create(iface);
+
+        if (rc == 0)
+                return 0;
 
-static struct pci_device_id divil_pci[] = {
-        { PCI_DEVICE(PCI_VENDOR_ID_NS,  PCI_DEVICE_ID_NS_CS5535_ISA) },
-        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) },
-        { } /* NULL entry */
+        release_region(base, 8);
+ errout_free:
+        kfree(iface);
+        return rc;
+}
+
+/* Driver data is an index into the scx200_data array that indicates
+ * the name and the BAR where the I/O address resource is located.  ISA
+ * devices are flagged with a bar value of -1 */
+
+static struct pci_device_id scx200_pci[] = {
+        { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE),
+          .driver_data = 0 },
+        { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE),
+          .driver_data = 0 },
+        { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA),
+          .driver_data = 1 },
+        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA),
+          .driver_data = 2 }
 };
 
-#define MSR_LBAR_SMB            0x5140000B
+static struct {
+        const char *name;
+        int bar;
+} scx200_data[] = {
+        { "SCx200", -1 },
+        { "CS5535",  0 },
+        { "CS5536",  0 }
+};
 
-static __init int scx200_add_cs553x(void)
+static __init int scx200_scan_pci(void)
 {
-        u32     low, hi;
-        u32     smb_base;
-
-        /* Grab & reserve the SMB I/O range */
-        rdmsr(MSR_LBAR_SMB, low, hi);
+        int data, dev;
+        int rc = -ENODEV;
+        struct pci_dev *pdev;
+
+        for(dev = 0; dev < ARRAY_SIZE(scx200_pci); dev++) {
+                pdev = pci_get_device(scx200_pci[dev].vendor,
+                                scx200_pci[dev].device, NULL);
+
+                if (pdev == NULL)
+                        continue;
+
+                data = scx200_pci[dev].driver_data;
+
+                /* if .bar is greater or equal to zero, this is a
+                 * PCI device - otherwise, we assume
+                   that the ports are ISA based
+                */
+
+                if (scx200_data[data].bar >= 0)
+                        rc = scx200_create_pci(scx200_data[data].name, pdev,
+                                        scx200_data[data].bar);
+                else {
+                        int i;
+
+                        for (i = 0; i < MAX_DEVICES; ++i) {
+                                if (base[i] == 0)
+                                        continue;
+
+                                rc = scx200_create_isa(scx200_data[data].name,
+                                                base[i],
+                                                i);
+                        }
+                }
 
-        /* Check the IO mask and whether SMB is enabled */
-        if (hi != 0x0000F001) {
-                printk(KERN_WARNING NAME ": SMBus not enabled\n");
-                return -ENODEV;
+                break;
         }
 
-        /* SMBus IO size is 8 bytes */
-        smb_base = low & 0x0000FFF8;
-
-        return scx200_acb_create("CS5535", smb_base, 0);
+        return rc;
 }
 
 static int __init scx200_acb_init(void)
 {
-        int i;
-        int     rc = -ENODEV;
+        int rc;
 
         pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");
 
-        /* Verify that this really is a SCx200 processor */
-        if (pci_dev_present(scx200)) {
-                for (i = 0; i < MAX_DEVICES; ++i) {
-                        if (base[i] > 0)
-                                rc = scx200_acb_create("SCx200", base[i], i);
-                }
-        } else if (pci_dev_present(divil_pci))
-                rc = scx200_add_cs553x();
+        rc = scx200_scan_pci();
 
         /* If at least one bus was created, init must succeed */
         if (scx200_acb_list)
@@ -543,7 +630,14 @@ static void __exit scx200_acb_cleanup(void)
                 up(&scx200_acb_list_mutex);
 
                 i2c_del_adapter(&iface->adapter);
-                release_region(iface->base, 8);
+
+                if (iface->pdev) {
+                        pci_release_region(iface->pdev, iface->bar);
+                        pci_dev_put(iface->pdev);
+                }
+                else
+                        release_region(iface->base, 8);
+
                 kfree(iface);
                 down(&scx200_acb_list_mutex);
         }