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-rw-r--r--drivers/i2c/busses/Kconfig3
-rw-r--r--drivers/i2c/busses/i2c-pasemi.c6
2 files changed, 4 insertions, 5 deletions
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index fb19dbb31e42..ece31d2c6c64 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -344,8 +344,7 @@ config I2C_PARPORT_LIGHT
344 344
345config I2C_PASEMI 345config I2C_PASEMI
346 tristate "PA Semi SMBus interface" 346 tristate "PA Semi SMBus interface"
347# depends on PPC_PASEMI && I2C && PCI 347 depends on PPC_PASEMI && I2C && PCI
348 depends on I2C && PCI
349 help 348 help
350 Supports the PA Semi PWRficient on-chip SMBus interfaces. 349 Supports the PA Semi PWRficient on-chip SMBus interfaces.
351 350
diff --git a/drivers/i2c/busses/i2c-pasemi.c b/drivers/i2c/busses/i2c-pasemi.c
index f54fb5d65cc4..bf89eeef74e9 100644
--- a/drivers/i2c/busses/i2c-pasemi.c
+++ b/drivers/i2c/busses/i2c-pasemi.c
@@ -141,7 +141,7 @@ static int pasemi_i2c_xfer_msg(struct i2c_adapter *adapter,
141 for (i = 0; i < msg->len - 1; i++) 141 for (i = 0; i < msg->len - 1; i++)
142 TXFIFO_WR(smbus, msg->buf[i]); 142 TXFIFO_WR(smbus, msg->buf[i]);
143 143
144 TXFIFO_WR(smbus, msg->buf[msg->len] | 144 TXFIFO_WR(smbus, msg->buf[msg->len-1] |
145 (stop ? MTXFIFO_STOP : 0)); 145 (stop ? MTXFIFO_STOP : 0));
146 } 146 }
147 147
@@ -226,7 +226,7 @@ static int pasemi_smb_xfer(struct i2c_adapter *adapter,
226 rd = RXFIFO_RD(smbus); 226 rd = RXFIFO_RD(smbus);
227 len = min_t(u8, (rd & MRXFIFO_DATA_M), 227 len = min_t(u8, (rd & MRXFIFO_DATA_M),
228 I2C_SMBUS_BLOCK_MAX); 228 I2C_SMBUS_BLOCK_MAX);
229 TXFIFO_WR(smbus, (len + 1) | MTXFIFO_READ | 229 TXFIFO_WR(smbus, len | MTXFIFO_READ |
230 MTXFIFO_STOP); 230 MTXFIFO_STOP);
231 } else { 231 } else {
232 len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX); 232 len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX);
@@ -258,7 +258,7 @@ static int pasemi_smb_xfer(struct i2c_adapter *adapter,
258 rd = RXFIFO_RD(smbus); 258 rd = RXFIFO_RD(smbus);
259 len = min_t(u8, (rd & MRXFIFO_DATA_M), 259 len = min_t(u8, (rd & MRXFIFO_DATA_M),
260 I2C_SMBUS_BLOCK_MAX - len); 260 I2C_SMBUS_BLOCK_MAX - len);
261 TXFIFO_WR(smbus, (len + 1) | MTXFIFO_READ | MTXFIFO_STOP); 261 TXFIFO_WR(smbus, len | MTXFIFO_READ | MTXFIFO_STOP);
262 break; 262 break;
263 263
264 default: 264 default: