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-rw-r--r--drivers/i2c/busses/i2c-iop3xx.c17
-rw-r--r--drivers/i2c/busses/i2c-iop3xx.h2
-rw-r--r--drivers/i2c/busses/i2c-powermac.c4
-rw-r--r--drivers/i2c/busses/scx200_acb.c27
4 files changed, 29 insertions, 21 deletions
diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c
index aca7e1668605..48c56939c861 100644
--- a/drivers/i2c/busses/i2c-iop3xx.c
+++ b/drivers/i2c/busses/i2c-iop3xx.c
@@ -21,6 +21,9 @@
21 * - Make it work with IXP46x chips 21 * - Make it work with IXP46x chips
22 * - Cleanup function names, coding style, etc 22 * - Cleanup function names, coding style, etc
23 * 23 *
24 * - writing to slave address causes latchup on iop331.
25 * fix: driver refuses to address self.
26 *
24 * This program is free software; you can redistribute it and/or modify 27 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by 28 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation, version 2. 29 * the Free Software Foundation, version 2.
@@ -73,12 +76,6 @@ iop3xx_i2c_reset(struct i2c_algo_iop3xx_data *iop3xx_adap)
73} 76}
74 77
75static void 78static void
76iop3xx_i2c_set_slave_addr(struct i2c_algo_iop3xx_data *iop3xx_adap)
77{
78 __raw_writel(MYSAR, iop3xx_adap->ioaddr + SAR_OFFSET);
79}
80
81static void
82iop3xx_i2c_enable(struct i2c_algo_iop3xx_data *iop3xx_adap) 79iop3xx_i2c_enable(struct i2c_algo_iop3xx_data *iop3xx_adap)
83{ 80{
84 u32 cr = IOP3XX_ICR_GCD | IOP3XX_ICR_SCLEN | IOP3XX_ICR_UE; 81 u32 cr = IOP3XX_ICR_GCD | IOP3XX_ICR_SCLEN | IOP3XX_ICR_UE;
@@ -248,6 +245,13 @@ iop3xx_i2c_send_target_addr(struct i2c_algo_iop3xx_data *iop3xx_adap,
248 int status; 245 int status;
249 int rc; 246 int rc;
250 247
248 /* avoid writing to my slave address (hangs on 80331),
249 * forbidden in Intel developer manual
250 */
251 if (msg->addr == MYSAR) {
252 return -EBUSY;
253 }
254
251 __raw_writel(iic_cook_addr(msg), iop3xx_adap->ioaddr + DBR_OFFSET); 255 __raw_writel(iic_cook_addr(msg), iop3xx_adap->ioaddr + DBR_OFFSET);
252 256
253 cr &= ~(IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK); 257 cr &= ~(IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK);
@@ -498,7 +502,6 @@ iop3xx_i2c_probe(struct platform_device *pdev)
498 spin_lock_init(&adapter_data->lock); 502 spin_lock_init(&adapter_data->lock);
499 503
500 iop3xx_i2c_reset(adapter_data); 504 iop3xx_i2c_reset(adapter_data);
501 iop3xx_i2c_set_slave_addr(adapter_data);
502 iop3xx_i2c_enable(adapter_data); 505 iop3xx_i2c_enable(adapter_data);
503 506
504 platform_set_drvdata(pdev, new_adapter); 507 platform_set_drvdata(pdev, new_adapter);
diff --git a/drivers/i2c/busses/i2c-iop3xx.h b/drivers/i2c/busses/i2c-iop3xx.h
index e46ebaea7b1e..8485861f6a36 100644
--- a/drivers/i2c/busses/i2c-iop3xx.h
+++ b/drivers/i2c/busses/i2c-iop3xx.h
@@ -80,7 +80,7 @@
80#define IOP3XX_GPOD_I2C0 0x00c0 /* clear these bits to enable ch0 */ 80#define IOP3XX_GPOD_I2C0 0x00c0 /* clear these bits to enable ch0 */
81#define IOP3XX_GPOD_I2C1 0x0030 /* clear these bits to enable ch1 */ 81#define IOP3XX_GPOD_I2C1 0x0030 /* clear these bits to enable ch1 */
82 82
83#define MYSAR 0x02 /* SWAG a suitable slave address */ 83#define MYSAR 0 /* default slave address */
84 84
85#define I2C_ERR 321 85#define I2C_ERR 321
86#define I2C_ERR_BERR (I2C_ERR+0) 86#define I2C_ERR_BERR (I2C_ERR+0)
diff --git a/drivers/i2c/busses/i2c-powermac.c b/drivers/i2c/busses/i2c-powermac.c
index 2a0b3be7cdd0..53bb43593863 100644
--- a/drivers/i2c/busses/i2c-powermac.c
+++ b/drivers/i2c/busses/i2c-powermac.c
@@ -148,8 +148,6 @@ static int i2c_powermac_master_xfer( struct i2c_adapter *adap,
148 int read; 148 int read;
149 int addrdir; 149 int addrdir;
150 150
151 if (num != 1)
152 return -EINVAL;
153 if (msgs->flags & I2C_M_TEN) 151 if (msgs->flags & I2C_M_TEN)
154 return -EINVAL; 152 return -EINVAL;
155 read = (msgs->flags & I2C_M_RD) != 0; 153 read = (msgs->flags & I2C_M_RD) != 0;
@@ -166,7 +164,7 @@ static int i2c_powermac_master_xfer( struct i2c_adapter *adap,
166 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len); 164 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len);
167 bail: 165 bail:
168 pmac_i2c_close(bus); 166 pmac_i2c_close(bus);
169 return rc < 0 ? rc : msgs->len; 167 return rc < 0 ? rc : 1;
170} 168}
171 169
172static u32 i2c_powermac_func(struct i2c_adapter * adapter) 170static u32 i2c_powermac_func(struct i2c_adapter * adapter)
diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c
index 22a3eda04166..eae9e81be375 100644
--- a/drivers/i2c/busses/scx200_acb.c
+++ b/drivers/i2c/busses/scx200_acb.c
@@ -184,21 +184,21 @@ static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
184 break; 184 break;
185 185
186 case state_read: 186 case state_read:
187 /* Set ACK if receiving the last byte */ 187 /* Set ACK if _next_ byte will be the last one */
188 if (iface->len == 1) 188 if (iface->len == 2)
189 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1); 189 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
190 else 190 else
191 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1); 191 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
192 192
193 *iface->ptr++ = inb(ACBSDA); 193 if (iface->len == 1) {
194 --iface->len;
195
196 if (iface->len == 0) {
197 iface->result = 0; 194 iface->result = 0;
198 iface->state = state_idle; 195 iface->state = state_idle;
199 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); 196 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
200 } 197 }
201 198
199 *iface->ptr++ = inb(ACBSDA);
200 --iface->len;
201
202 break; 202 break;
203 203
204 case state_write: 204 case state_write:
@@ -232,7 +232,7 @@ static void scx200_acb_poll(struct scx200_acb_iface *iface)
232 unsigned long timeout; 232 unsigned long timeout;
233 233
234 timeout = jiffies + POLL_TIMEOUT; 234 timeout = jiffies + POLL_TIMEOUT;
235 while (time_before(jiffies, timeout)) { 235 while (1) {
236 status = inb(ACBST); 236 status = inb(ACBST);
237 237
238 /* Reset the status register to avoid the hang */ 238 /* Reset the status register to avoid the hang */
@@ -242,7 +242,10 @@ static void scx200_acb_poll(struct scx200_acb_iface *iface)
242 scx200_acb_machine(iface, status); 242 scx200_acb_machine(iface, status);
243 return; 243 return;
244 } 244 }
245 yield(); 245 if (time_after(jiffies, timeout))
246 break;
247 cpu_relax();
248 cond_resched();
246 } 249 }
247 250
248 dev_err(&iface->adapter.dev, "timeout in state %s\n", 251 dev_err(&iface->adapter.dev, "timeout in state %s\n",
@@ -307,8 +310,12 @@ static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
307 buffer = (u8 *)&cur_word; 310 buffer = (u8 *)&cur_word;
308 break; 311 break;
309 312
310 case I2C_SMBUS_BLOCK_DATA: 313 case I2C_SMBUS_I2C_BLOCK_DATA:
314 if (rw == I2C_SMBUS_READ)
315 data->block[0] = I2C_SMBUS_BLOCK_MAX; /* For now */
311 len = data->block[0]; 316 len = data->block[0];
317 if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
318 return -EINVAL;
312 buffer = &data->block[1]; 319 buffer = &data->block[1];
313 break; 320 break;
314 321
@@ -372,7 +379,7 @@ static u32 scx200_acb_func(struct i2c_adapter *adapter)
372{ 379{
373 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 380 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
374 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 381 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
375 I2C_FUNC_SMBUS_BLOCK_DATA; 382 I2C_FUNC_SMBUS_I2C_BLOCK;
376} 383}
377 384
378/* For now, we only handle combined mode (smbus) */ 385/* For now, we only handle combined mode (smbus) */