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-rw-r--r--drivers/i2c/busses/Kconfig31
-rw-r--r--drivers/i2c/busses/Makefile3
-rw-r--r--drivers/i2c/busses/i2c-gpio.c12
-rw-r--r--drivers/i2c/busses/i2c-i801.c249
-rw-r--r--drivers/i2c/busses/i2c-iop3xx.c3
-rw-r--r--drivers/i2c/busses/i2c-mpc.c26
-rw-r--r--drivers/i2c/busses/i2c-mv64xxx.c3
-rw-r--r--drivers/i2c/busses/i2c-nforce2.c44
-rw-r--r--drivers/i2c/busses/i2c-piix4.c4
-rw-r--r--drivers/i2c/busses/i2c-pmcmsp.c653
-rw-r--r--drivers/i2c/busses/i2c-powermac.c3
-rw-r--r--drivers/i2c/busses/i2c-pxa.c9
-rw-r--r--drivers/i2c/busses/i2c-rpx.c101
-rw-r--r--drivers/i2c/busses/i2c-savage4.c21
-rw-r--r--drivers/i2c/busses/i2c-sis5595.c27
-rw-r--r--drivers/i2c/busses/i2c-taos-evm.c330
-rw-r--r--drivers/i2c/busses/i2c-viapro.c2
-rw-r--r--drivers/i2c/busses/scx200_acb.c16
18 files changed, 1299 insertions, 238 deletions
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 838dc1c19d61..fcde9bab5b96 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -207,6 +207,7 @@ config I2C_PIIX4
207 ATI IXP300 207 ATI IXP300
208 ATI IXP400 208 ATI IXP400
209 ATI SB600 209 ATI SB600
210 ATI SB700
210 Serverworks OSB4 211 Serverworks OSB4
211 Serverworks CSB5 212 Serverworks CSB5
212 Serverworks CSB6 213 Serverworks CSB6
@@ -390,11 +391,6 @@ config I2C_PROSAVAGE
390 This support is also available as a module. If so, the module 391 This support is also available as a module. If so, the module
391 will be called i2c-prosavage. 392 will be called i2c-prosavage.
392 393
393config I2C_RPXLITE
394 tristate "Embedded Planet RPX Lite/Classic support"
395 depends on RPXLITE || RPXCLASSIC
396 select I2C_ALGO8XX
397
398config I2C_S3C2410 394config I2C_S3C2410
399 tristate "S3C2410 I2C Driver" 395 tristate "S3C2410 I2C Driver"
400 depends on ARCH_S3C2410 396 depends on ARCH_S3C2410
@@ -512,6 +508,22 @@ config I2C_SIS96X
512 This driver can also be built as a module. If so, the module 508 This driver can also be built as a module. If so, the module
513 will be called i2c-sis96x. 509 will be called i2c-sis96x.
514 510
511config I2C_TAOS_EVM
512 tristate "TAOS evaluation module"
513 depends on EXPERIMENTAL
514 select SERIO
515 select SERIO_SERPORT
516 default n
517 help
518 This supports TAOS evaluation modules on serial port. In order to
519 use this driver, you will need the inputattach tool, which is part
520 of the input-utils package.
521
522 If unsure, say N.
523
524 This support is also available as a module. If so, the module
525 will be called i2c-taos-evm.
526
515config I2C_STUB 527config I2C_STUB
516 tristate "I2C/SMBus Test Stub" 528 tristate "I2C/SMBus Test Stub"
517 depends on EXPERIMENTAL && m 529 depends on EXPERIMENTAL && m
@@ -635,4 +647,13 @@ config I2C_PNX
635 This driver can also be built as a module. If so, the module 647 This driver can also be built as a module. If so, the module
636 will be called i2c-pnx. 648 will be called i2c-pnx.
637 649
650config I2C_PMCMSP
651 tristate "PMC MSP I2C TWI Controller"
652 depends on PMC_MSP
653 help
654 This driver supports the PMC TWI controller on MSP devices.
655
656 This driver can also be built as module. If so, the module
657 will be called i2c-pmcmsp.
658
638endmenu 659endmenu
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 14d1432f698b..a6db4e38bda8 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -32,10 +32,10 @@ obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o
32obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o 32obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o
33obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o 33obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o
34obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o 34obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o
35obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o
35obj-$(CONFIG_I2C_PNX) += i2c-pnx.o 36obj-$(CONFIG_I2C_PNX) += i2c-pnx.o
36obj-$(CONFIG_I2C_PROSAVAGE) += i2c-prosavage.o 37obj-$(CONFIG_I2C_PROSAVAGE) += i2c-prosavage.o
37obj-$(CONFIG_I2C_PXA) += i2c-pxa.o 38obj-$(CONFIG_I2C_PXA) += i2c-pxa.o
38obj-$(CONFIG_I2C_RPXLITE) += i2c-rpx.o
39obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o 39obj-$(CONFIG_I2C_S3C2410) += i2c-s3c2410.o
40obj-$(CONFIG_I2C_SAVAGE4) += i2c-savage4.o 40obj-$(CONFIG_I2C_SAVAGE4) += i2c-savage4.o
41obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o 41obj-$(CONFIG_I2C_SIBYTE) += i2c-sibyte.o
@@ -44,6 +44,7 @@ obj-$(CONFIG_I2C_SIS5595) += i2c-sis5595.o
44obj-$(CONFIG_I2C_SIS630) += i2c-sis630.o 44obj-$(CONFIG_I2C_SIS630) += i2c-sis630.o
45obj-$(CONFIG_I2C_SIS96X) += i2c-sis96x.o 45obj-$(CONFIG_I2C_SIS96X) += i2c-sis96x.o
46obj-$(CONFIG_I2C_STUB) += i2c-stub.o 46obj-$(CONFIG_I2C_STUB) += i2c-stub.o
47obj-$(CONFIG_I2C_TAOS_EVM) += i2c-taos-evm.o
47obj-$(CONFIG_I2C_TINY_USB) += i2c-tiny-usb.o 48obj-$(CONFIG_I2C_TINY_USB) += i2c-tiny-usb.o
48obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o 49obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o
49obj-$(CONFIG_I2C_ACORN) += i2c-acorn.o 50obj-$(CONFIG_I2C_ACORN) += i2c-acorn.o
diff --git a/drivers/i2c/busses/i2c-gpio.c b/drivers/i2c/busses/i2c-gpio.c
index a7dd54654a9a..025f19423faf 100644
--- a/drivers/i2c/busses/i2c-gpio.c
+++ b/drivers/i2c/busses/i2c-gpio.c
@@ -63,14 +63,14 @@ static void i2c_gpio_setscl_val(void *data, int state)
63 gpio_set_value(pdata->scl_pin, state); 63 gpio_set_value(pdata->scl_pin, state);
64} 64}
65 65
66int i2c_gpio_getsda(void *data) 66static int i2c_gpio_getsda(void *data)
67{ 67{
68 struct i2c_gpio_platform_data *pdata = data; 68 struct i2c_gpio_platform_data *pdata = data;
69 69
70 return gpio_get_value(pdata->sda_pin); 70 return gpio_get_value(pdata->sda_pin);
71} 71}
72 72
73int i2c_gpio_getscl(void *data) 73static int i2c_gpio_getscl(void *data)
74{ 74{
75 struct i2c_gpio_platform_data *pdata = data; 75 struct i2c_gpio_platform_data *pdata = data;
76 76
@@ -142,7 +142,13 @@ static int __init i2c_gpio_probe(struct platform_device *pdev)
142 adap->algo_data = bit_data; 142 adap->algo_data = bit_data;
143 adap->dev.parent = &pdev->dev; 143 adap->dev.parent = &pdev->dev;
144 144
145 ret = i2c_bit_add_bus(adap); 145 /*
146 * If "dev->id" is negative we consider it as zero.
147 * The reason to do so is to avoid sysfs names that only make
148 * sense when there are multiple adapters.
149 */
150 adap->nr = pdev->id >= 0 ? pdev->id : 0;
151 ret = i2c_bit_add_numbered_bus(adap);
146 if (ret) 152 if (ret)
147 goto err_add_bus; 153 goto err_add_bus;
148 154
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index 611b57192c96..8f5c686123b8 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -22,12 +22,12 @@
22 22
23/* 23/*
24 SUPPORTED DEVICES PCI ID 24 SUPPORTED DEVICES PCI ID
25 82801AA 2413 25 82801AA 2413
26 82801AB 2423 26 82801AB 2423
27 82801BA 2443 27 82801BA 2443
28 82801CA/CAM 2483 28 82801CA/CAM 2483
29 82801DB 24C3 (HW PEC supported, 32 byte buffer not supported) 29 82801DB 24C3 (HW PEC supported)
30 82801EB 24D3 (HW PEC supported, 32 byte buffer not supported) 30 82801EB 24D3 (HW PEC supported)
31 6300ESB 25A4 31 6300ESB 25A4
32 ICH6 266A 32 ICH6 266A
33 ICH7 27DA 33 ICH7 27DA
@@ -74,6 +74,13 @@
74#define SMBHSTCFG_SMB_SMI_EN 2 74#define SMBHSTCFG_SMB_SMI_EN 2
75#define SMBHSTCFG_I2C_EN 4 75#define SMBHSTCFG_I2C_EN 4
76 76
77/* Auxillary control register bits, ICH4+ only */
78#define SMBAUXCTL_CRC 1
79#define SMBAUXCTL_E32B 2
80
81/* kill bit for SMBHSTCNT */
82#define SMBHSTCNT_KILL 2
83
77/* Other settings */ 84/* Other settings */
78#define MAX_TIMEOUT 100 85#define MAX_TIMEOUT 100
79#define ENABLE_INT9 0 /* set to 0x01 to enable - untested */ 86#define ENABLE_INT9 0 /* set to 0x01 to enable - untested */
@@ -91,10 +98,15 @@
91#define I801_START 0x40 98#define I801_START 0x40
92#define I801_PEC_EN 0x80 /* ICH4 only */ 99#define I801_PEC_EN 0x80 /* ICH4 only */
93 100
94 101/* I801 Hosts Status register bits */
95static int i801_transaction(void); 102#define SMBHSTSTS_BYTE_DONE 0x80
96static int i801_block_transaction(union i2c_smbus_data *data, char read_write, 103#define SMBHSTSTS_INUSE_STS 0x40
97 int command, int hwpec); 104#define SMBHSTSTS_SMBALERT_STS 0x20
105#define SMBHSTSTS_FAILED 0x10
106#define SMBHSTSTS_BUS_ERR 0x08
107#define SMBHSTSTS_DEV_ERR 0x04
108#define SMBHSTSTS_INTR 0x02
109#define SMBHSTSTS_HOST_BUSY 0x01
98 110
99static unsigned long i801_smba; 111static unsigned long i801_smba;
100static unsigned char i801_original_hstcfg; 112static unsigned char i801_original_hstcfg;
@@ -102,7 +114,7 @@ static struct pci_driver i801_driver;
102static struct pci_dev *I801_dev; 114static struct pci_dev *I801_dev;
103static int isich4; 115static int isich4;
104 116
105static int i801_transaction(void) 117static int i801_transaction(int xact)
106{ 118{
107 int temp; 119 int temp;
108 int result = 0; 120 int result = 0;
@@ -127,33 +139,40 @@ static int i801_transaction(void)
127 } 139 }
128 } 140 }
129 141
130 outb_p(inb(SMBHSTCNT) | I801_START, SMBHSTCNT); 142 /* the current contents of SMBHSTCNT can be overwritten, since PEC,
143 * INTREN, SMBSCMD are passed in xact */
144 outb_p(xact | I801_START, SMBHSTCNT);
131 145
132 /* We will always wait for a fraction of a second! */ 146 /* We will always wait for a fraction of a second! */
133 do { 147 do {
134 msleep(1); 148 msleep(1);
135 temp = inb_p(SMBHSTSTS); 149 temp = inb_p(SMBHSTSTS);
136 } while ((temp & 0x01) && (timeout++ < MAX_TIMEOUT)); 150 } while ((temp & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_TIMEOUT));
137 151
138 /* If the SMBus is still busy, we give up */ 152 /* If the SMBus is still busy, we give up */
139 if (timeout >= MAX_TIMEOUT) { 153 if (timeout >= MAX_TIMEOUT) {
140 dev_dbg(&I801_dev->dev, "SMBus Timeout!\n"); 154 dev_dbg(&I801_dev->dev, "SMBus Timeout!\n");
141 result = -1; 155 result = -1;
156 /* try to stop the current command */
157 dev_dbg(&I801_dev->dev, "Terminating the current operation\n");
158 outb_p(inb_p(SMBHSTCNT) | SMBHSTCNT_KILL, SMBHSTCNT);
159 msleep(1);
160 outb_p(inb_p(SMBHSTCNT) & (~SMBHSTCNT_KILL), SMBHSTCNT);
142 } 161 }
143 162
144 if (temp & 0x10) { 163 if (temp & SMBHSTSTS_FAILED) {
145 result = -1; 164 result = -1;
146 dev_dbg(&I801_dev->dev, "Error: Failed bus transaction\n"); 165 dev_dbg(&I801_dev->dev, "Error: Failed bus transaction\n");
147 } 166 }
148 167
149 if (temp & 0x08) { 168 if (temp & SMBHSTSTS_BUS_ERR) {
150 result = -1; 169 result = -1;
151 dev_err(&I801_dev->dev, "Bus collision! SMBus may be locked " 170 dev_err(&I801_dev->dev, "Bus collision! SMBus may be locked "
152 "until next hard reset. (sorry!)\n"); 171 "until next hard reset. (sorry!)\n");
153 /* Clock stops and slave is stuck in mid-transmission */ 172 /* Clock stops and slave is stuck in mid-transmission */
154 } 173 }
155 174
156 if (temp & 0x04) { 175 if (temp & SMBHSTSTS_DEV_ERR) {
157 result = -1; 176 result = -1;
158 dev_dbg(&I801_dev->dev, "Error: no response!\n"); 177 dev_dbg(&I801_dev->dev, "Error: no response!\n");
159 } 178 }
@@ -172,44 +191,70 @@ static int i801_transaction(void)
172 return result; 191 return result;
173} 192}
174 193
175/* All-inclusive block transaction function */ 194/* wait for INTR bit as advised by Intel */
176static int i801_block_transaction(union i2c_smbus_data *data, char read_write, 195static void i801_wait_hwpec(void)
177 int command, int hwpec) 196{
197 int timeout = 0;
198 int temp;
199
200 do {
201 msleep(1);
202 temp = inb_p(SMBHSTSTS);
203 } while ((!(temp & SMBHSTSTS_INTR))
204 && (timeout++ < MAX_TIMEOUT));
205
206 if (timeout >= MAX_TIMEOUT) {
207 dev_dbg(&I801_dev->dev, "PEC Timeout!\n");
208 }
209 outb_p(temp, SMBHSTSTS);
210}
211
212static int i801_block_transaction_by_block(union i2c_smbus_data *data,
213 char read_write, int hwpec)
214{
215 int i, len;
216
217 inb_p(SMBHSTCNT); /* reset the data buffer index */
218
219 /* Use 32-byte buffer to process this transaction */
220 if (read_write == I2C_SMBUS_WRITE) {
221 len = data->block[0];
222 outb_p(len, SMBHSTDAT0);
223 for (i = 0; i < len; i++)
224 outb_p(data->block[i+1], SMBBLKDAT);
225 }
226
227 if (i801_transaction(I801_BLOCK_DATA | ENABLE_INT9 |
228 I801_PEC_EN * hwpec))
229 return -1;
230
231 if (read_write == I2C_SMBUS_READ) {
232 len = inb_p(SMBHSTDAT0);
233 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
234 return -1;
235
236 data->block[0] = len;
237 for (i = 0; i < len; i++)
238 data->block[i + 1] = inb_p(SMBBLKDAT);
239 }
240 return 0;
241}
242
243static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
244 char read_write, int hwpec)
178{ 245{
179 int i, len; 246 int i, len;
180 int smbcmd; 247 int smbcmd;
181 int temp; 248 int temp;
182 int result = 0; 249 int result = 0;
183 int timeout; 250 int timeout;
184 unsigned char hostc, errmask; 251 unsigned char errmask;
185 252
186 if (command == I2C_SMBUS_I2C_BLOCK_DATA) { 253 len = data->block[0];
187 if (read_write == I2C_SMBUS_WRITE) {
188 /* set I2C_EN bit in configuration register */
189 pci_read_config_byte(I801_dev, SMBHSTCFG, &hostc);
190 pci_write_config_byte(I801_dev, SMBHSTCFG,
191 hostc | SMBHSTCFG_I2C_EN);
192 } else {
193 dev_err(&I801_dev->dev,
194 "I2C_SMBUS_I2C_BLOCK_READ not DB!\n");
195 return -1;
196 }
197 }
198 254
199 if (read_write == I2C_SMBUS_WRITE) { 255 if (read_write == I2C_SMBUS_WRITE) {
200 len = data->block[0];
201 if (len < 1)
202 len = 1;
203 if (len > 32)
204 len = 32;
205 outb_p(len, SMBHSTDAT0); 256 outb_p(len, SMBHSTDAT0);
206 outb_p(data->block[1], SMBBLKDAT); 257 outb_p(data->block[1], SMBBLKDAT);
207 } else {
208 len = 32; /* max for reads */
209 }
210
211 if(isich4 && command != I2C_SMBUS_I2C_BLOCK_DATA) {
212 /* set 32 byte buffer */
213 } 258 }
214 259
215 for (i = 1; i <= len; i++) { 260 for (i = 1; i <= len; i++) {
@@ -227,13 +272,13 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
227 /* Make sure the SMBus host is ready to start transmitting */ 272 /* Make sure the SMBus host is ready to start transmitting */
228 temp = inb_p(SMBHSTSTS); 273 temp = inb_p(SMBHSTSTS);
229 if (i == 1) { 274 if (i == 1) {
230 /* Erronenous conditions before transaction: 275 /* Erronenous conditions before transaction:
231 * Byte_Done, Failed, Bus_Err, Dev_Err, Intr, Host_Busy */ 276 * Byte_Done, Failed, Bus_Err, Dev_Err, Intr, Host_Busy */
232 errmask=0x9f; 277 errmask = 0x9f;
233 } else { 278 } else {
234 /* Erronenous conditions during transaction: 279 /* Erronenous conditions during transaction:
235 * Failed, Bus_Err, Dev_Err, Intr */ 280 * Failed, Bus_Err, Dev_Err, Intr */
236 errmask=0x1e; 281 errmask = 0x1e;
237 } 282 }
238 if (temp & errmask) { 283 if (temp & errmask) {
239 dev_dbg(&I801_dev->dev, "SMBus busy (%02x). " 284 dev_dbg(&I801_dev->dev, "SMBus busy (%02x). "
@@ -242,14 +287,11 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
242 if (((temp = inb_p(SMBHSTSTS)) & errmask) != 0x00) { 287 if (((temp = inb_p(SMBHSTSTS)) & errmask) != 0x00) {
243 dev_err(&I801_dev->dev, 288 dev_err(&I801_dev->dev,
244 "Reset failed! (%02x)\n", temp); 289 "Reset failed! (%02x)\n", temp);
245 result = -1; 290 return -1;
246 goto END;
247 } 291 }
248 if (i != 1) { 292 if (i != 1)
249 /* if die in middle of block transaction, fail */ 293 /* if die in middle of block transaction, fail */
250 result = -1; 294 return -1;
251 goto END;
252 }
253 } 295 }
254 296
255 if (i == 1) 297 if (i == 1)
@@ -261,33 +303,38 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
261 msleep(1); 303 msleep(1);
262 temp = inb_p(SMBHSTSTS); 304 temp = inb_p(SMBHSTSTS);
263 } 305 }
264 while ((!(temp & 0x80)) 306 while ((!(temp & SMBHSTSTS_BYTE_DONE))
265 && (timeout++ < MAX_TIMEOUT)); 307 && (timeout++ < MAX_TIMEOUT));
266 308
267 /* If the SMBus is still busy, we give up */ 309 /* If the SMBus is still busy, we give up */
268 if (timeout >= MAX_TIMEOUT) { 310 if (timeout >= MAX_TIMEOUT) {
311 /* try to stop the current command */
312 dev_dbg(&I801_dev->dev, "Terminating the current "
313 "operation\n");
314 outb_p(inb_p(SMBHSTCNT) | SMBHSTCNT_KILL, SMBHSTCNT);
315 msleep(1);
316 outb_p(inb_p(SMBHSTCNT) & (~SMBHSTCNT_KILL),
317 SMBHSTCNT);
269 result = -1; 318 result = -1;
270 dev_dbg(&I801_dev->dev, "SMBus Timeout!\n"); 319 dev_dbg(&I801_dev->dev, "SMBus Timeout!\n");
271 } 320 }
272 321
273 if (temp & 0x10) { 322 if (temp & SMBHSTSTS_FAILED) {
274 result = -1; 323 result = -1;
275 dev_dbg(&I801_dev->dev, 324 dev_dbg(&I801_dev->dev,
276 "Error: Failed bus transaction\n"); 325 "Error: Failed bus transaction\n");
277 } else if (temp & 0x08) { 326 } else if (temp & SMBHSTSTS_BUS_ERR) {
278 result = -1; 327 result = -1;
279 dev_err(&I801_dev->dev, "Bus collision!\n"); 328 dev_err(&I801_dev->dev, "Bus collision!\n");
280 } else if (temp & 0x04) { 329 } else if (temp & SMBHSTSTS_DEV_ERR) {
281 result = -1; 330 result = -1;
282 dev_dbg(&I801_dev->dev, "Error: no response!\n"); 331 dev_dbg(&I801_dev->dev, "Error: no response!\n");
283 } 332 }
284 333
285 if (i == 1 && read_write == I2C_SMBUS_READ) { 334 if (i == 1 && read_write == I2C_SMBUS_READ) {
286 len = inb_p(SMBHSTDAT0); 335 len = inb_p(SMBHSTDAT0);
287 if (len < 1) 336 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
288 len = 1; 337 return -1;
289 if (len > 32)
290 len = 32;
291 data->block[0] = len; 338 data->block[0] = len;
292 } 339 }
293 340
@@ -310,25 +357,58 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
310 inb_p(SMBHSTDAT0), inb_p(SMBBLKDAT)); 357 inb_p(SMBHSTDAT0), inb_p(SMBBLKDAT));
311 358
312 if (result < 0) 359 if (result < 0)
313 goto END; 360 return result;
314 } 361 }
362 return result;
363}
315 364
316 if (hwpec) { 365static int i801_set_block_buffer_mode(void)
317 /* wait for INTR bit as advised by Intel */ 366{
318 timeout = 0; 367 outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_E32B, SMBAUXCTL);
319 do { 368 if ((inb_p(SMBAUXCTL) & SMBAUXCTL_E32B) == 0)
320 msleep(1); 369 return -1;
321 temp = inb_p(SMBHSTSTS); 370 return 0;
322 } while ((!(temp & 0x02)) 371}
323 && (timeout++ < MAX_TIMEOUT));
324 372
325 if (timeout >= MAX_TIMEOUT) { 373/* Block transaction function */
326 dev_dbg(&I801_dev->dev, "PEC Timeout!\n"); 374static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
375 int command, int hwpec)
376{
377 int result = 0;
378 unsigned char hostc;
379
380 if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
381 if (read_write == I2C_SMBUS_WRITE) {
382 /* set I2C_EN bit in configuration register */
383 pci_read_config_byte(I801_dev, SMBHSTCFG, &hostc);
384 pci_write_config_byte(I801_dev, SMBHSTCFG,
385 hostc | SMBHSTCFG_I2C_EN);
386 } else {
387 dev_err(&I801_dev->dev,
388 "I2C_SMBUS_I2C_BLOCK_READ not DB!\n");
389 return -1;
327 } 390 }
328 outb_p(temp, SMBHSTSTS);
329 } 391 }
330 result = 0; 392
331END: 393 if (read_write == I2C_SMBUS_WRITE) {
394 if (data->block[0] < 1)
395 data->block[0] = 1;
396 if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
397 data->block[0] = I2C_SMBUS_BLOCK_MAX;
398 } else {
399 data->block[0] = 32; /* max for reads */
400 }
401
402 if (isich4 && i801_set_block_buffer_mode() == 0 )
403 result = i801_block_transaction_by_block(data, read_write,
404 hwpec);
405 else
406 result = i801_block_transaction_byte_by_byte(data, read_write,
407 hwpec);
408
409 if (result == 0 && hwpec)
410 i801_wait_hwpec();
411
332 if (command == I2C_SMBUS_I2C_BLOCK_DATA) { 412 if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
333 /* restore saved configuration register value */ 413 /* restore saved configuration register value */
334 pci_write_config_byte(I801_dev, SMBHSTCFG, hostc); 414 pci_write_config_byte(I801_dev, SMBHSTCFG, hostc);
@@ -393,19 +473,22 @@ static s32 i801_access(struct i2c_adapter * adap, u16 addr,
393 return -1; 473 return -1;
394 } 474 }
395 475
396 outb_p(hwpec, SMBAUXCTL); /* enable/disable hardware PEC */ 476 if (hwpec) /* enable/disable hardware PEC */
477 outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_CRC, SMBAUXCTL);
478 else
479 outb_p(inb_p(SMBAUXCTL) & (~SMBAUXCTL_CRC), SMBAUXCTL);
397 480
398 if(block) 481 if(block)
399 ret = i801_block_transaction(data, read_write, size, hwpec); 482 ret = i801_block_transaction(data, read_write, size, hwpec);
400 else { 483 else
401 outb_p(xact | ENABLE_INT9, SMBHSTCNT); 484 ret = i801_transaction(xact | ENABLE_INT9);
402 ret = i801_transaction();
403 }
404 485
405 /* Some BIOSes don't like it when PEC is enabled at reboot or resume 486 /* Some BIOSes don't like it when PEC is enabled at reboot or resume
406 time, so we forcibly disable it after every transaction. */ 487 time, so we forcibly disable it after every transaction. Turn off
488 E32B for the same reason. */
407 if (hwpec) 489 if (hwpec)
408 outb_p(0, SMBAUXCTL); 490 outb_p(inb_p(SMBAUXCTL) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B),
491 SMBAUXCTL);
409 492
410 if(block) 493 if(block)
411 return ret; 494 return ret;
diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c
index 90e2d9350c1b..440342bc62e1 100644
--- a/drivers/i2c/busses/i2c-iop3xx.c
+++ b/drivers/i2c/busses/i2c-iop3xx.c
@@ -491,6 +491,7 @@ iop3xx_i2c_probe(struct platform_device *pdev)
491 new_adapter->id = I2C_HW_IOP3XX; 491 new_adapter->id = I2C_HW_IOP3XX;
492 new_adapter->owner = THIS_MODULE; 492 new_adapter->owner = THIS_MODULE;
493 new_adapter->dev.parent = &pdev->dev; 493 new_adapter->dev.parent = &pdev->dev;
494 new_adapter->nr = pdev->id;
494 495
495 /* 496 /*
496 * Default values...should these come in from board code? 497 * Default values...should these come in from board code?
@@ -508,7 +509,7 @@ iop3xx_i2c_probe(struct platform_device *pdev)
508 platform_set_drvdata(pdev, new_adapter); 509 platform_set_drvdata(pdev, new_adapter);
509 new_adapter->algo_data = adapter_data; 510 new_adapter->algo_data = adapter_data;
510 511
511 i2c_add_adapter(new_adapter); 512 i2c_add_numbered_adapter(new_adapter);
512 513
513 return 0; 514 return 0;
514 515
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index c6b6898592b1..851c3ed513d0 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -74,6 +74,25 @@ static irqreturn_t mpc_i2c_isr(int irq, void *dev_id)
74 return IRQ_HANDLED; 74 return IRQ_HANDLED;
75} 75}
76 76
77/* Sometimes 9th clock pulse isn't generated, and slave doesn't release
78 * the bus, because it wants to send ACK.
79 * Following sequence of enabling/disabling and sending start/stop generates
80 * the pulse, so it's all OK.
81 */
82static void mpc_i2c_fixup(struct mpc_i2c *i2c)
83{
84 writeccr(i2c, 0);
85 udelay(30);
86 writeccr(i2c, CCR_MEN);
87 udelay(30);
88 writeccr(i2c, CCR_MSTA | CCR_MTX);
89 udelay(30);
90 writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
91 udelay(30);
92 writeccr(i2c, CCR_MEN);
93 udelay(30);
94}
95
77static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing) 96static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
78{ 97{
79 unsigned long orig_jiffies = jiffies; 98 unsigned long orig_jiffies = jiffies;
@@ -153,6 +172,7 @@ static void mpc_i2c_start(struct mpc_i2c *i2c)
153static void mpc_i2c_stop(struct mpc_i2c *i2c) 172static void mpc_i2c_stop(struct mpc_i2c *i2c)
154{ 173{
155 writeccr(i2c, CCR_MEN); 174 writeccr(i2c, CCR_MEN);
175 writeccr(i2c, 0);
156} 176}
157 177
158static int mpc_write(struct mpc_i2c *i2c, int target, 178static int mpc_write(struct mpc_i2c *i2c, int target,
@@ -245,6 +265,9 @@ static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
245 } 265 }
246 if (time_after(jiffies, orig_jiffies + HZ)) { 266 if (time_after(jiffies, orig_jiffies + HZ)) {
247 pr_debug("I2C: timeout\n"); 267 pr_debug("I2C: timeout\n");
268 if (readb(i2c->base + MPC_I2C_SR) ==
269 (CSR_MCF | CSR_MBB | CSR_RXAK))
270 mpc_i2c_fixup(i2c);
248 return -EIO; 271 return -EIO;
249 } 272 }
250 schedule(); 273 schedule();
@@ -327,9 +350,10 @@ static int fsl_i2c_probe(struct platform_device *pdev)
327 platform_set_drvdata(pdev, i2c); 350 platform_set_drvdata(pdev, i2c);
328 351
329 i2c->adap = mpc_ops; 352 i2c->adap = mpc_ops;
353 i2c->adap.nr = pdev->id;
330 i2c_set_adapdata(&i2c->adap, i2c); 354 i2c_set_adapdata(&i2c->adap, i2c);
331 i2c->adap.dev.parent = &pdev->dev; 355 i2c->adap.dev.parent = &pdev->dev;
332 if ((result = i2c_add_adapter(&i2c->adap)) < 0) { 356 if ((result = i2c_add_numbered_adapter(&i2c->adap)) < 0) {
333 printk(KERN_ERR "i2c-mpc - failed to add adapter\n"); 357 printk(KERN_ERR "i2c-mpc - failed to add adapter\n");
334 goto fail_add; 358 goto fail_add;
335 } 359 }
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
index a55b3335d1be..251154ae5d97 100644
--- a/drivers/i2c/busses/i2c-mv64xxx.c
+++ b/drivers/i2c/busses/i2c-mv64xxx.c
@@ -527,6 +527,7 @@ mv64xxx_i2c_probe(struct platform_device *pd)
527 drv_data->adapter.class = I2C_CLASS_HWMON; 527 drv_data->adapter.class = I2C_CLASS_HWMON;
528 drv_data->adapter.timeout = pdata->timeout; 528 drv_data->adapter.timeout = pdata->timeout;
529 drv_data->adapter.retries = pdata->retries; 529 drv_data->adapter.retries = pdata->retries;
530 drv_data->adapter.nr = pd->id;
530 platform_set_drvdata(pd, drv_data); 531 platform_set_drvdata(pd, drv_data);
531 i2c_set_adapdata(&drv_data->adapter, drv_data); 532 i2c_set_adapdata(&drv_data->adapter, drv_data);
532 533
@@ -539,7 +540,7 @@ mv64xxx_i2c_probe(struct platform_device *pd)
539 drv_data->irq); 540 drv_data->irq);
540 rc = -EINVAL; 541 rc = -EINVAL;
541 goto exit_unmap_regs; 542 goto exit_unmap_regs;
542 } else if ((rc = i2c_add_adapter(&drv_data->adapter)) != 0) { 543 } else if ((rc = i2c_add_numbered_adapter(&drv_data->adapter)) != 0) {
543 dev_err(&drv_data->adapter.dev, 544 dev_err(&drv_data->adapter.dev,
544 "mv64xxx: Can't add i2c adapter, rc: %d\n", -rc); 545 "mv64xxx: Can't add i2c adapter, rc: %d\n", -rc);
545 goto exit_free_irq; 546 goto exit_free_irq;
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c
index 3cd0d63e7b50..c48140f782d0 100644
--- a/drivers/i2c/busses/i2c-nforce2.c
+++ b/drivers/i2c/busses/i2c-nforce2.c
@@ -61,6 +61,7 @@ struct nforce2_smbus {
61 struct i2c_adapter adapter; 61 struct i2c_adapter adapter;
62 int base; 62 int base;
63 int size; 63 int size;
64 int blockops;
64}; 65};
65 66
66 67
@@ -80,6 +81,8 @@ struct nforce2_smbus {
80#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */ 81#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
81#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */ 82#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
82#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */ 83#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
84#define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data
85 bytes */
83 86
84#define NVIDIA_SMB_STS_DONE 0x80 87#define NVIDIA_SMB_STS_DONE 0x80
85#define NVIDIA_SMB_STS_ALRM 0x40 88#define NVIDIA_SMB_STS_ALRM 0x40
@@ -92,6 +95,7 @@ struct nforce2_smbus {
92#define NVIDIA_SMB_PRTCL_BYTE 0x04 95#define NVIDIA_SMB_PRTCL_BYTE 0x04
93#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06 96#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
94#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08 97#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
98#define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a
95#define NVIDIA_SMB_PRTCL_PEC 0x80 99#define NVIDIA_SMB_PRTCL_PEC 0x80
96 100
97static struct pci_driver nforce2_driver; 101static struct pci_driver nforce2_driver;
@@ -103,6 +107,8 @@ static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
103{ 107{
104 struct nforce2_smbus *smbus = adap->algo_data; 108 struct nforce2_smbus *smbus = adap->algo_data;
105 unsigned char protocol, pec, temp; 109 unsigned char protocol, pec, temp;
110 u8 len;
111 int i;
106 112
107 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ : 113 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
108 NVIDIA_SMB_PRTCL_WRITE; 114 NVIDIA_SMB_PRTCL_WRITE;
@@ -137,6 +143,25 @@ static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
137 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec; 143 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
138 break; 144 break;
139 145
146 case I2C_SMBUS_BLOCK_DATA:
147 outb_p(command, NVIDIA_SMB_CMD);
148 if (read_write == I2C_SMBUS_WRITE) {
149 len = data->block[0];
150 if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
151 dev_err(&adap->dev,
152 "Transaction failed "
153 "(requested block size: %d)\n",
154 len);
155 return -1;
156 }
157 outb_p(len, NVIDIA_SMB_BCNT);
158 for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
159 outb_p(data->block[i + 1],
160 NVIDIA_SMB_DATA+i);
161 }
162 protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
163 break;
164
140 default: 165 default:
141 dev_err(&adap->dev, "Unsupported transaction %d\n", size); 166 dev_err(&adap->dev, "Unsupported transaction %d\n", size);
142 return -1; 167 return -1;
@@ -174,6 +199,14 @@ static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
174 case I2C_SMBUS_WORD_DATA: 199 case I2C_SMBUS_WORD_DATA:
175 data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8); 200 data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
176 break; 201 break;
202
203 case I2C_SMBUS_BLOCK_DATA:
204 len = inb_p(NVIDIA_SMB_BCNT);
205 len = min_t(u8, len, I2C_SMBUS_BLOCK_MAX);
206 for (i = 0; i < len; i++)
207 data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
208 data->block[0] = len;
209 break;
177 } 210 }
178 211
179 return 0; 212 return 0;
@@ -184,7 +217,9 @@ static u32 nforce2_func(struct i2c_adapter *adapter)
184{ 217{
185 /* other functionality might be possible, but is not tested */ 218 /* other functionality might be possible, but is not tested */
186 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 219 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
187 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA; 220 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
221 (((struct nforce2_smbus*)adapter->algo_data)->blockops ?
222 I2C_FUNC_SMBUS_BLOCK_DATA : 0);
188} 223}
189 224
190static struct i2c_algorithm smbus_algorithm = { 225static struct i2c_algorithm smbus_algorithm = {
@@ -268,6 +303,13 @@ static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_
268 return -ENOMEM; 303 return -ENOMEM;
269 pci_set_drvdata(dev, smbuses); 304 pci_set_drvdata(dev, smbuses);
270 305
306 switch(dev->device) {
307 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
308 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
309 smbuses[0].blockops = 1;
310 smbuses[1].blockops = 1;
311 }
312
271 /* SMBus adapter 1 */ 313 /* SMBus adapter 1 */
272 res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1"); 314 res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
273 if (res1 < 0) { 315 if (res1 < 0) {
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index 5a52bf5e3fb0..debc76cd2161 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -23,7 +23,7 @@
23 Supports: 23 Supports:
24 Intel PIIX4, 440MX 24 Intel PIIX4, 440MX
25 Serverworks OSB4, CSB5, CSB6, HT-1000 25 Serverworks OSB4, CSB5, CSB6, HT-1000
26 ATI IXP200, IXP300, IXP400, SB600 26 ATI IXP200, IXP300, IXP400, SB600, SB700
27 SMSC Victory66 27 SMSC Victory66
28 28
29 Note: we assume there can only be one device, with one SMBus interface. 29 Note: we assume there can only be one device, with one SMBus interface.
@@ -399,6 +399,8 @@ static struct pci_device_id piix4_ids[] = {
399 .driver_data = 0 }, 399 .driver_data = 0 },
400 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_SMBUS), 400 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_SMBUS),
401 .driver_data = 0 }, 401 .driver_data = 0 },
402 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SMBUS),
403 .driver_data = 0 },
402 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4), 404 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4),
403 .driver_data = 0 }, 405 .driver_data = 0 },
404 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5), 406 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5),
diff --git a/drivers/i2c/busses/i2c-pmcmsp.c b/drivers/i2c/busses/i2c-pmcmsp.c
new file mode 100644
index 000000000000..03188d277af1
--- /dev/null
+++ b/drivers/i2c/busses/i2c-pmcmsp.c
@@ -0,0 +1,653 @@
1/*
2 * Specific bus support for PMC-TWI compliant implementation on MSP71xx.
3 *
4 * Copyright 2005-2007 PMC-Sierra, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/init.h>
30#include <linux/platform_device.h>
31#include <linux/i2c.h>
32#include <linux/interrupt.h>
33#include <linux/completion.h>
34#include <linux/mutex.h>
35#include <linux/delay.h>
36#include <asm/io.h>
37
38#define DRV_NAME "pmcmsptwi"
39
40#define MSP_TWI_SF_CLK_REG_OFFSET 0x00
41#define MSP_TWI_HS_CLK_REG_OFFSET 0x04
42#define MSP_TWI_CFG_REG_OFFSET 0x08
43#define MSP_TWI_CMD_REG_OFFSET 0x0c
44#define MSP_TWI_ADD_REG_OFFSET 0x10
45#define MSP_TWI_DAT_0_REG_OFFSET 0x14
46#define MSP_TWI_DAT_1_REG_OFFSET 0x18
47#define MSP_TWI_INT_STS_REG_OFFSET 0x1c
48#define MSP_TWI_INT_MSK_REG_OFFSET 0x20
49#define MSP_TWI_BUSY_REG_OFFSET 0x24
50
51#define MSP_TWI_INT_STS_DONE (1 << 0)
52#define MSP_TWI_INT_STS_LOST_ARBITRATION (1 << 1)
53#define MSP_TWI_INT_STS_NO_RESPONSE (1 << 2)
54#define MSP_TWI_INT_STS_DATA_COLLISION (1 << 3)
55#define MSP_TWI_INT_STS_BUSY (1 << 4)
56#define MSP_TWI_INT_STS_ALL 0x1f
57
58#define MSP_MAX_BYTES_PER_RW 8
59#define MSP_MAX_POLL 5
60#define MSP_POLL_DELAY 10
61#define MSP_IRQ_TIMEOUT (MSP_MAX_POLL * MSP_POLL_DELAY)
62
63/* IO Operation macros */
64#define pmcmsptwi_readl __raw_readl
65#define pmcmsptwi_writel __raw_writel
66
67/* TWI command type */
68enum pmcmsptwi_cmd_type {
69 MSP_TWI_CMD_WRITE = 0, /* Write only */
70 MSP_TWI_CMD_READ = 1, /* Read only */
71 MSP_TWI_CMD_WRITE_READ = 2, /* Write then Read */
72};
73
74/* The possible results of the xferCmd */
75enum pmcmsptwi_xfer_result {
76 MSP_TWI_XFER_OK = 0,
77 MSP_TWI_XFER_TIMEOUT,
78 MSP_TWI_XFER_BUSY,
79 MSP_TWI_XFER_DATA_COLLISION,
80 MSP_TWI_XFER_NO_RESPONSE,
81 MSP_TWI_XFER_LOST_ARBITRATION,
82};
83
84/* Corresponds to a PMCTWI clock configuration register */
85struct pmcmsptwi_clock {
86 u8 filter; /* Bits 15:12, default = 0x03 */
87 u16 clock; /* Bits 9:0, default = 0x001f */
88};
89
90struct pmcmsptwi_clockcfg {
91 struct pmcmsptwi_clock standard; /* The standard/fast clock config */
92 struct pmcmsptwi_clock highspeed; /* The highspeed clock config */
93};
94
95/* Corresponds to the main TWI configuration register */
96struct pmcmsptwi_cfg {
97 u8 arbf; /* Bits 15:12, default=0x03 */
98 u8 nak; /* Bits 11:8, default=0x03 */
99 u8 add10; /* Bit 7, default=0x00 */
100 u8 mst_code; /* Bits 6:4, default=0x00 */
101 u8 arb; /* Bit 1, default=0x01 */
102 u8 highspeed; /* Bit 0, default=0x00 */
103};
104
105/* A single pmctwi command to issue */
106struct pmcmsptwi_cmd {
107 u16 addr; /* The slave address (7 or 10 bits) */
108 enum pmcmsptwi_cmd_type type; /* The command type */
109 u8 write_len; /* Number of bytes in the write buffer */
110 u8 read_len; /* Number of bytes in the read buffer */
111 u8 *write_data; /* Buffer of characters to send */
112 u8 *read_data; /* Buffer to fill with incoming data */
113};
114
115/* The private data */
116struct pmcmsptwi_data {
117 void __iomem *iobase; /* iomapped base for IO */
118 int irq; /* IRQ to use (0 disables) */
119 struct completion wait; /* Completion for xfer */
120 struct mutex lock; /* Used for threadsafeness */
121 enum pmcmsptwi_xfer_result last_result; /* result of last xfer */
122};
123
124/* The default settings */
125const static struct pmcmsptwi_clockcfg pmcmsptwi_defclockcfg = {
126 .standard = {
127 .filter = 0x3,
128 .clock = 0x1f,
129 },
130 .highspeed = {
131 .filter = 0x3,
132 .clock = 0x1f,
133 },
134};
135
136const static struct pmcmsptwi_cfg pmcmsptwi_defcfg = {
137 .arbf = 0x03,
138 .nak = 0x03,
139 .add10 = 0x00,
140 .mst_code = 0x00,
141 .arb = 0x01,
142 .highspeed = 0x00,
143};
144
145static struct pmcmsptwi_data pmcmsptwi_data;
146
147static struct i2c_adapter pmcmsptwi_adapter;
148
149/* inline helper functions */
150static inline u32 pmcmsptwi_clock_to_reg(
151 const struct pmcmsptwi_clock *clock)
152{
153 return ((clock->filter & 0xf) << 12) | (clock->clock & 0x03ff);
154}
155
156static inline void pmcmsptwi_reg_to_clock(
157 u32 reg, struct pmcmsptwi_clock *clock)
158{
159 clock->filter = (reg >> 12) & 0xf;
160 clock->clock = reg & 0x03ff;
161}
162
163static inline u32 pmcmsptwi_cfg_to_reg(const struct pmcmsptwi_cfg *cfg)
164{
165 return ((cfg->arbf & 0xf) << 12) |
166 ((cfg->nak & 0xf) << 8) |
167 ((cfg->add10 & 0x1) << 7) |
168 ((cfg->mst_code & 0x7) << 4) |
169 ((cfg->arb & 0x1) << 1) |
170 (cfg->highspeed & 0x1);
171}
172
173static inline void pmcmsptwi_reg_to_cfg(u32 reg, struct pmcmsptwi_cfg *cfg)
174{
175 cfg->arbf = (reg >> 12) & 0xf;
176 cfg->nak = (reg >> 8) & 0xf;
177 cfg->add10 = (reg >> 7) & 0x1;
178 cfg->mst_code = (reg >> 4) & 0x7;
179 cfg->arb = (reg >> 1) & 0x1;
180 cfg->highspeed = reg & 0x1;
181}
182
183/*
184 * Sets the current clock configuration
185 */
186static void pmcmsptwi_set_clock_config(const struct pmcmsptwi_clockcfg *cfg,
187 struct pmcmsptwi_data *data)
188{
189 mutex_lock(&data->lock);
190 pmcmsptwi_writel(pmcmsptwi_clock_to_reg(&cfg->standard),
191 data->iobase + MSP_TWI_SF_CLK_REG_OFFSET);
192 pmcmsptwi_writel(pmcmsptwi_clock_to_reg(&cfg->highspeed),
193 data->iobase + MSP_TWI_HS_CLK_REG_OFFSET);
194 mutex_unlock(&data->lock);
195}
196
197/*
198 * Gets the current TWI bus configuration
199 */
200static void pmcmsptwi_get_twi_config(struct pmcmsptwi_cfg *cfg,
201 struct pmcmsptwi_data *data)
202{
203 mutex_lock(&data->lock);
204 pmcmsptwi_reg_to_cfg(pmcmsptwi_readl(
205 data->iobase + MSP_TWI_CFG_REG_OFFSET), cfg);
206 mutex_unlock(&data->lock);
207}
208
209/*
210 * Sets the current TWI bus configuration
211 */
212static void pmcmsptwi_set_twi_config(const struct pmcmsptwi_cfg *cfg,
213 struct pmcmsptwi_data *data)
214{
215 mutex_lock(&data->lock);
216 pmcmsptwi_writel(pmcmsptwi_cfg_to_reg(cfg),
217 data->iobase + MSP_TWI_CFG_REG_OFFSET);
218 mutex_unlock(&data->lock);
219}
220
221/*
222 * Parses the 'int_sts' register and returns a well-defined error code
223 */
224static enum pmcmsptwi_xfer_result pmcmsptwi_get_result(u32 reg)
225{
226 if (reg & MSP_TWI_INT_STS_LOST_ARBITRATION) {
227 dev_dbg(&pmcmsptwi_adapter.dev,
228 "Result: Lost arbitration\n");
229 return MSP_TWI_XFER_LOST_ARBITRATION;
230 } else if (reg & MSP_TWI_INT_STS_NO_RESPONSE) {
231 dev_dbg(&pmcmsptwi_adapter.dev,
232 "Result: No response\n");
233 return MSP_TWI_XFER_NO_RESPONSE;
234 } else if (reg & MSP_TWI_INT_STS_DATA_COLLISION) {
235 dev_dbg(&pmcmsptwi_adapter.dev,
236 "Result: Data collision\n");
237 return MSP_TWI_XFER_DATA_COLLISION;
238 } else if (reg & MSP_TWI_INT_STS_BUSY) {
239 dev_dbg(&pmcmsptwi_adapter.dev,
240 "Result: Bus busy\n");
241 return MSP_TWI_XFER_BUSY;
242 }
243
244 dev_dbg(&pmcmsptwi_adapter.dev, "Result: Operation succeeded\n");
245 return MSP_TWI_XFER_OK;
246}
247
248/*
249 * In interrupt mode, handle the interrupt.
250 * NOTE: Assumes data->lock is held.
251 */
252static irqreturn_t pmcmsptwi_interrupt(int irq, void *ptr)
253{
254 struct pmcmsptwi_data *data = ptr;
255
256 u32 reason = pmcmsptwi_readl(data->iobase +
257 MSP_TWI_INT_STS_REG_OFFSET);
258 pmcmsptwi_writel(reason, data->iobase + MSP_TWI_INT_STS_REG_OFFSET);
259
260 dev_dbg(&pmcmsptwi_adapter.dev, "Got interrupt 0x%08x\n", reason);
261 if (!(reason & MSP_TWI_INT_STS_DONE))
262 return IRQ_NONE;
263
264 data->last_result = pmcmsptwi_get_result(reason);
265 complete(&data->wait);
266
267 return IRQ_HANDLED;
268}
269
270/*
271 * Probe for and register the device and return 0 if there is one.
272 */
273static int __devinit pmcmsptwi_probe(struct platform_device *pldev)
274{
275 struct resource *res;
276 int rc = -ENODEV;
277
278 /* get the static platform resources */
279 res = platform_get_resource(pldev, IORESOURCE_MEM, 0);
280 if (!res) {
281 dev_err(&pldev->dev, "IOMEM resource not found\n");
282 goto ret_err;
283 }
284
285 /* reserve the memory region */
286 if (!request_mem_region(res->start, res->end - res->start + 1,
287 pldev->name)) {
288 dev_err(&pldev->dev,
289 "Unable to get memory/io address region 0x%08x\n",
290 res->start);
291 rc = -EBUSY;
292 goto ret_err;
293 }
294
295 /* remap the memory */
296 pmcmsptwi_data.iobase = ioremap_nocache(res->start,
297 res->end - res->start + 1);
298 if (!pmcmsptwi_data.iobase) {
299 dev_err(&pldev->dev,
300 "Unable to ioremap address 0x%08x\n", res->start);
301 rc = -EIO;
302 goto ret_unreserve;
303 }
304
305 /* request the irq */
306 pmcmsptwi_data.irq = platform_get_irq(pldev, 0);
307 if (pmcmsptwi_data.irq) {
308 rc = request_irq(pmcmsptwi_data.irq, &pmcmsptwi_interrupt,
309 IRQF_SHARED | IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
310 pldev->name, &pmcmsptwi_data);
311 if (rc == 0) {
312 /*
313 * Enable 'DONE' interrupt only.
314 *
315 * If you enable all interrupts, you will get one on
316 * error and another when the operation completes.
317 * This way you only have to handle one interrupt,
318 * but you can still check all result flags.
319 */
320 pmcmsptwi_writel(MSP_TWI_INT_STS_DONE,
321 pmcmsptwi_data.iobase +
322 MSP_TWI_INT_MSK_REG_OFFSET);
323 } else {
324 dev_warn(&pldev->dev,
325 "Could not assign TWI IRQ handler "
326 "to irq %d (continuing with poll)\n",
327 pmcmsptwi_data.irq);
328 pmcmsptwi_data.irq = 0;
329 }
330 }
331
332 init_completion(&pmcmsptwi_data.wait);
333 mutex_init(&pmcmsptwi_data.lock);
334
335 pmcmsptwi_set_clock_config(&pmcmsptwi_defclockcfg, &pmcmsptwi_data);
336 pmcmsptwi_set_twi_config(&pmcmsptwi_defcfg, &pmcmsptwi_data);
337
338 printk(KERN_INFO DRV_NAME ": Registering MSP71xx I2C adapter\n");
339
340 pmcmsptwi_adapter.dev.parent = &pldev->dev;
341 platform_set_drvdata(pldev, &pmcmsptwi_adapter);
342 i2c_set_adapdata(&pmcmsptwi_adapter, &pmcmsptwi_data);
343
344 rc = i2c_add_adapter(&pmcmsptwi_adapter);
345 if (rc) {
346 dev_err(&pldev->dev, "Unable to register I2C adapter\n");
347 goto ret_unmap;
348 }
349
350 return 0;
351
352ret_unmap:
353 platform_set_drvdata(pldev, NULL);
354 if (pmcmsptwi_data.irq) {
355 pmcmsptwi_writel(0,
356 pmcmsptwi_data.iobase + MSP_TWI_INT_MSK_REG_OFFSET);
357 free_irq(pmcmsptwi_data.irq, &pmcmsptwi_data);
358 }
359
360 iounmap(pmcmsptwi_data.iobase);
361
362ret_unreserve:
363 release_mem_region(res->start, res->end - res->start + 1);
364
365ret_err:
366 return rc;
367}
368
369/*
370 * Release the device and return 0 if there is one.
371 */
372static int __devexit pmcmsptwi_remove(struct platform_device *pldev)
373{
374 struct resource *res;
375
376 i2c_del_adapter(&pmcmsptwi_adapter);
377
378 platform_set_drvdata(pldev, NULL);
379 if (pmcmsptwi_data.irq) {
380 pmcmsptwi_writel(0,
381 pmcmsptwi_data.iobase + MSP_TWI_INT_MSK_REG_OFFSET);
382 free_irq(pmcmsptwi_data.irq, &pmcmsptwi_data);
383 }
384
385 iounmap(pmcmsptwi_data.iobase);
386
387 res = platform_get_resource(pldev, IORESOURCE_MEM, 0);
388 release_mem_region(res->start, res->end - res->start + 1);
389
390 return 0;
391}
392
393/*
394 * Polls the 'busy' register until the command is complete.
395 * NOTE: Assumes data->lock is held.
396 */
397static void pmcmsptwi_poll_complete(struct pmcmsptwi_data *data)
398{
399 int i;
400
401 for (i = 0; i < MSP_MAX_POLL; i++) {
402 u32 val = pmcmsptwi_readl(data->iobase +
403 MSP_TWI_BUSY_REG_OFFSET);
404 if (val == 0) {
405 u32 reason = pmcmsptwi_readl(data->iobase +
406 MSP_TWI_INT_STS_REG_OFFSET);
407 pmcmsptwi_writel(reason, data->iobase +
408 MSP_TWI_INT_STS_REG_OFFSET);
409 data->last_result = pmcmsptwi_get_result(reason);
410 return;
411 }
412 udelay(MSP_POLL_DELAY);
413 }
414
415 dev_dbg(&pmcmsptwi_adapter.dev, "Result: Poll timeout\n");
416 data->last_result = MSP_TWI_XFER_TIMEOUT;
417}
418
419/*
420 * Do the transfer (low level):
421 * May use interrupt-driven or polling, depending on if an IRQ is
422 * presently registered.
423 * NOTE: Assumes data->lock is held.
424 */
425static enum pmcmsptwi_xfer_result pmcmsptwi_do_xfer(
426 u32 reg, struct pmcmsptwi_data *data)
427{
428 dev_dbg(&pmcmsptwi_adapter.dev, "Writing cmd reg 0x%08x\n", reg);
429 pmcmsptwi_writel(reg, data->iobase + MSP_TWI_CMD_REG_OFFSET);
430 if (data->irq) {
431 unsigned long timeleft = wait_for_completion_timeout(
432 &data->wait, MSP_IRQ_TIMEOUT);
433 if (timeleft == 0) {
434 dev_dbg(&pmcmsptwi_adapter.dev,
435 "Result: IRQ timeout\n");
436 complete(&data->wait);
437 data->last_result = MSP_TWI_XFER_TIMEOUT;
438 }
439 } else
440 pmcmsptwi_poll_complete(data);
441
442 return data->last_result;
443}
444
445/*
446 * Helper routine, converts 'pmctwi_cmd' struct to register format
447 */
448static inline u32 pmcmsptwi_cmd_to_reg(const struct pmcmsptwi_cmd *cmd)
449{
450 return ((cmd->type & 0x3) << 8) |
451 (((cmd->write_len - 1) & 0x7) << 4) |
452 ((cmd->read_len - 1) & 0x7);
453}
454
455/*
456 * Do the transfer (high level)
457 */
458static enum pmcmsptwi_xfer_result pmcmsptwi_xfer_cmd(
459 struct pmcmsptwi_cmd *cmd,
460 struct pmcmsptwi_data *data)
461{
462 enum pmcmsptwi_xfer_result retval;
463
464 if ((cmd->type == MSP_TWI_CMD_WRITE && cmd->write_len == 0) ||
465 (cmd->type == MSP_TWI_CMD_READ && cmd->read_len == 0) ||
466 (cmd->type == MSP_TWI_CMD_WRITE_READ &&
467 (cmd->read_len == 0 || cmd->write_len == 0))) {
468 dev_err(&pmcmsptwi_adapter.dev,
469 "%s: Cannot transfer less than 1 byte\n",
470 __FUNCTION__);
471 return -EINVAL;
472 }
473
474 if (cmd->read_len > MSP_MAX_BYTES_PER_RW ||
475 cmd->write_len > MSP_MAX_BYTES_PER_RW) {
476 dev_err(&pmcmsptwi_adapter.dev,
477 "%s: Cannot transfer more than %d bytes\n",
478 __FUNCTION__, MSP_MAX_BYTES_PER_RW);
479 return -EINVAL;
480 }
481
482 mutex_lock(&data->lock);
483 dev_dbg(&pmcmsptwi_adapter.dev,
484 "Setting address to 0x%04x\n", cmd->addr);
485 pmcmsptwi_writel(cmd->addr, data->iobase + MSP_TWI_ADD_REG_OFFSET);
486
487 if (cmd->type == MSP_TWI_CMD_WRITE ||
488 cmd->type == MSP_TWI_CMD_WRITE_READ) {
489 __be64 tmp = cpu_to_be64p((u64 *)cmd->write_data);
490 tmp >>= (MSP_MAX_BYTES_PER_RW - cmd->write_len) * 8;
491 dev_dbg(&pmcmsptwi_adapter.dev, "Writing 0x%016llx\n", tmp);
492 pmcmsptwi_writel(tmp & 0x00000000ffffffffLL,
493 data->iobase + MSP_TWI_DAT_0_REG_OFFSET);
494 if (cmd->write_len > 4)
495 pmcmsptwi_writel(tmp >> 32,
496 data->iobase + MSP_TWI_DAT_1_REG_OFFSET);
497 }
498
499 retval = pmcmsptwi_do_xfer(pmcmsptwi_cmd_to_reg(cmd), data);
500 if (retval != MSP_TWI_XFER_OK)
501 goto xfer_err;
502
503 if (cmd->type == MSP_TWI_CMD_READ ||
504 cmd->type == MSP_TWI_CMD_WRITE_READ) {
505 int i;
506 u64 rmsk = ~(0xffffffffffffffffLL << (cmd->read_len * 8));
507 u64 tmp = (u64)pmcmsptwi_readl(data->iobase +
508 MSP_TWI_DAT_0_REG_OFFSET);
509 if (cmd->read_len > 4)
510 tmp |= (u64)pmcmsptwi_readl(data->iobase +
511 MSP_TWI_DAT_1_REG_OFFSET) << 32;
512 tmp &= rmsk;
513 dev_dbg(&pmcmsptwi_adapter.dev, "Read 0x%016llx\n", tmp);
514
515 for (i = 0; i < cmd->read_len; i++)
516 cmd->read_data[i] = tmp >> i;
517 }
518
519xfer_err:
520 mutex_unlock(&data->lock);
521
522 return retval;
523}
524
525/* -- Algorithm functions -- */
526
527/*
528 * Sends an i2c command out on the adapter
529 */
530static int pmcmsptwi_master_xfer(struct i2c_adapter *adap,
531 struct i2c_msg *msg, int num)
532{
533 struct pmcmsptwi_data *data = i2c_get_adapdata(adap);
534 struct pmcmsptwi_cmd cmd;
535 struct pmcmsptwi_cfg oldcfg, newcfg;
536 int ret;
537
538 if (num > 2) {
539 dev_dbg(&adap->dev, "%d messages unsupported\n", num);
540 return -EINVAL;
541 } else if (num == 2) {
542 /* Check for a dual write-then-read command */
543 struct i2c_msg *nextmsg = msg + 1;
544 if (!(msg->flags & I2C_M_RD) &&
545 (nextmsg->flags & I2C_M_RD) &&
546 msg->addr == nextmsg->addr) {
547 cmd.type = MSP_TWI_CMD_WRITE_READ;
548 cmd.write_len = msg->len;
549 cmd.write_data = msg->buf;
550 cmd.read_len = nextmsg->len;
551 cmd.read_data = nextmsg->buf;
552 } else {
553 dev_dbg(&adap->dev,
554 "Non write-read dual messages unsupported\n");
555 return -EINVAL;
556 }
557 } else if (msg->flags & I2C_M_RD) {
558 cmd.type = MSP_TWI_CMD_READ;
559 cmd.read_len = msg->len;
560 cmd.read_data = msg->buf;
561 cmd.write_len = 0;
562 cmd.write_data = NULL;
563 } else {
564 cmd.type = MSP_TWI_CMD_WRITE;
565 cmd.read_len = 0;
566 cmd.read_data = NULL;
567 cmd.write_len = msg->len;
568 cmd.write_data = msg->buf;
569 }
570
571 if (msg->len == 0) {
572 dev_err(&adap->dev, "Zero-byte messages unsupported\n");
573 return -EINVAL;
574 }
575
576 cmd.addr = msg->addr;
577
578 if (msg->flags & I2C_M_TEN) {
579 pmcmsptwi_get_twi_config(&newcfg, data);
580 memcpy(&oldcfg, &newcfg, sizeof(oldcfg));
581
582 /* Set the special 10-bit address flag */
583 newcfg.add10 = 1;
584
585 pmcmsptwi_set_twi_config(&newcfg, data);
586 }
587
588 /* Execute the command */
589 ret = pmcmsptwi_xfer_cmd(&cmd, data);
590
591 if (msg->flags & I2C_M_TEN)
592 pmcmsptwi_set_twi_config(&oldcfg, data);
593
594 dev_dbg(&adap->dev, "I2C %s of %d bytes ",
595 (msg->flags & I2C_M_RD) ? "read" : "write", msg->len);
596 if (ret != MSP_TWI_XFER_OK) {
597 /*
598 * TODO: We could potentially loop and retry in the case
599 * of MSP_TWI_XFER_TIMEOUT.
600 */
601 dev_dbg(&adap->dev, "failed\n");
602 return -1;
603 }
604
605 dev_dbg(&adap->dev, "succeeded\n");
606 return 0;
607}
608
609static u32 pmcmsptwi_i2c_func(struct i2c_adapter *adapter)
610{
611 return I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR |
612 I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_BYTE_DATA |
613 I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_PROC_CALL;
614}
615
616/* -- Initialization -- */
617
618static struct i2c_algorithm pmcmsptwi_algo = {
619 .master_xfer = pmcmsptwi_master_xfer,
620 .functionality = pmcmsptwi_i2c_func,
621};
622
623static struct i2c_adapter pmcmsptwi_adapter = {
624 .owner = THIS_MODULE,
625 .class = I2C_CLASS_HWMON,
626 .algo = &pmcmsptwi_algo,
627 .name = DRV_NAME,
628};
629
630static struct platform_driver pmcmsptwi_driver = {
631 .probe = pmcmsptwi_probe,
632 .remove = __devexit_p(pmcmsptwi_remove),
633 .driver {
634 .name = DRV_NAME,
635 .owner = THIS_MODULE,
636 },
637};
638
639static int __init pmcmsptwi_init(void)
640{
641 return platform_driver_register(&pmcmsptwi_driver);
642}
643
644static void __exit pmcmsptwi_exit(void)
645{
646 platform_driver_unregister(&pmcmsptwi_driver);
647}
648
649MODULE_DESCRIPTION("PMC MSP TWI/SMBus/I2C driver");
650MODULE_LICENSE("GPL");
651
652module_init(pmcmsptwi_init);
653module_exit(pmcmsptwi_exit);
diff --git a/drivers/i2c/busses/i2c-powermac.c b/drivers/i2c/busses/i2c-powermac.c
index 1425d2245c82..0ab4f2627c26 100644
--- a/drivers/i2c/busses/i2c-powermac.c
+++ b/drivers/i2c/busses/i2c-powermac.c
@@ -121,8 +121,7 @@ static s32 i2c_powermac_smbus_xfer( struct i2c_adapter* adap,
121 if (rc) 121 if (rc)
122 goto bail; 122 goto bail;
123 rc = pmac_i2c_xfer(bus, addrdir, 1, command, 123 rc = pmac_i2c_xfer(bus, addrdir, 1, command,
124 read ? data->block : &data->block[1], 124 &data->block[1], data->block[0]);
125 data->block[0]);
126 break; 125 break;
127 126
128 default: 127 default:
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index 28e7b91a4553..9d6b790d4321 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -921,7 +921,14 @@ static int i2c_pxa_probe(struct platform_device *dev)
921 i2c->adap.class = plat->class; 921 i2c->adap.class = plat->class;
922 } 922 }
923 923
924 ret = i2c_add_adapter(&i2c->adap); 924 /*
925 * If "dev->id" is negative we consider it as zero.
926 * The reason to do so is to avoid sysfs names that only make
927 * sense when there are multiple adapters.
928 */
929 i2c->adap.nr = dev->id >= 0 ? dev->id : 0;
930
931 ret = i2c_add_numbered_adapter(&i2c->adap);
925 if (ret < 0) { 932 if (ret < 0) {
926 printk(KERN_INFO "I2C: Failed to add bus\n"); 933 printk(KERN_INFO "I2C: Failed to add bus\n");
927 goto eadapt; 934 goto eadapt;
diff --git a/drivers/i2c/busses/i2c-rpx.c b/drivers/i2c/busses/i2c-rpx.c
deleted file mode 100644
index 8764df06f51d..000000000000
--- a/drivers/i2c/busses/i2c-rpx.c
+++ /dev/null
@@ -1,101 +0,0 @@
1/*
2 * Embedded Planet RPX Lite MPC8xx CPM I2C interface.
3 * Copyright (c) 1999 Dan Malek (dmalek@jlc.net).
4 *
5 * moved into proper i2c interface;
6 * Brad Parker (brad@heeltoe.com)
7 *
8 * RPX lite specific parts of the i2c interface
9 * Update: There actually isn't anything RPXLite-specific about this module.
10 * This should work for most any 8xx board. The console messages have been
11 * changed to eliminate RPXLite references.
12 */
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/init.h>
17#include <linux/stddef.h>
18#include <linux/i2c.h>
19#include <linux/i2c-algo-8xx.h>
20#include <asm/mpc8xx.h>
21#include <asm/commproc.h>
22
23
24static void
25rpx_iic_init(struct i2c_algo_8xx_data *data)
26{
27 volatile cpm8xx_t *cp;
28 volatile immap_t *immap;
29
30 cp = cpmp; /* Get pointer to Communication Processor */
31 immap = (immap_t *)IMAP_ADDR; /* and to internal registers */
32
33 data->iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
34
35 /* Check for and use a microcode relocation patch.
36 */
37 if ((data->reloc = data->iip->iic_rpbase))
38 data->iip = (iic_t *)&cp->cp_dpmem[data->iip->iic_rpbase];
39
40 data->i2c = (i2c8xx_t *)&(immap->im_i2c);
41 data->cp = cp;
42
43 /* Initialize Port B IIC pins.
44 */
45 cp->cp_pbpar |= 0x00000030;
46 cp->cp_pbdir |= 0x00000030;
47 cp->cp_pbodr |= 0x00000030;
48
49 /* Allocate space for two transmit and two receive buffer
50 * descriptors in the DP ram.
51 */
52 data->dp_addr = cpm_dpalloc(sizeof(cbd_t) * 4, 8);
53
54 /* ptr to i2c area */
55 data->i2c = (i2c8xx_t *)&(((immap_t *)IMAP_ADDR)->im_i2c);
56}
57
58static int rpx_install_isr(int irq, void (*func)(void *), void *data)
59{
60 /* install interrupt handler */
61 cpm_install_handler(irq, func, data);
62
63 return 0;
64}
65
66static struct i2c_algo_8xx_data rpx_data = {
67 .setisr = rpx_install_isr
68};
69
70static struct i2c_adapter rpx_ops = {
71 .owner = THIS_MODULE,
72 .name = "m8xx",
73 .id = I2C_HW_MPC8XX_EPON,
74 .algo_data = &rpx_data,
75};
76
77int __init i2c_rpx_init(void)
78{
79 printk(KERN_INFO "i2c-rpx: i2c MPC8xx driver\n");
80
81 /* reset hardware to sane state */
82 rpx_iic_init(&rpx_data);
83
84 if (i2c_8xx_add_bus(&rpx_ops) < 0) {
85 printk(KERN_ERR "i2c-rpx: Unable to register with I2C\n");
86 return -ENODEV;
87 }
88
89 return 0;
90}
91
92void __exit i2c_rpx_exit(void)
93{
94 i2c_8xx_del_bus(&rpx_ops);
95}
96
97MODULE_AUTHOR("Dan Malek <dmalek@jlc.net>");
98MODULE_DESCRIPTION("I2C-Bus adapter routines for MPC8xx boards");
99
100module_init(i2c_rpx_init);
101module_exit(i2c_rpx_exit);
diff --git a/drivers/i2c/busses/i2c-savage4.c b/drivers/i2c/busses/i2c-savage4.c
index b7fb65c30112..8adf4abaa035 100644
--- a/drivers/i2c/busses/i2c-savage4.c
+++ b/drivers/i2c/busses/i2c-savage4.c
@@ -25,8 +25,6 @@
25/* This interfaces to the I2C bus of the Savage4 to gain access to 25/* This interfaces to the I2C bus of the Savage4 to gain access to
26 the BT869 and possibly other I2C devices. The DDC bus is not 26 the BT869 and possibly other I2C devices. The DDC bus is not
27 yet supported because its register is not memory-mapped. 27 yet supported because its register is not memory-mapped.
28 However we leave the DDC code here, commented out, to make
29 it easier to add later.
30*/ 28*/
31 29
32#include <linux/kernel.h> 30#include <linux/kernel.h>
@@ -37,36 +35,19 @@
37#include <linux/i2c-algo-bit.h> 35#include <linux/i2c-algo-bit.h>
38#include <asm/io.h> 36#include <asm/io.h>
39 37
40/* 3DFX defines */ 38/* device IDs */
41#define PCI_CHIP_SAVAGE3D 0x8A20
42#define PCI_CHIP_SAVAGE3D_MV 0x8A21
43#define PCI_CHIP_SAVAGE4 0x8A22 39#define PCI_CHIP_SAVAGE4 0x8A22
44#define PCI_CHIP_SAVAGE2000 0x9102 40#define PCI_CHIP_SAVAGE2000 0x9102
45#define PCI_CHIP_PROSAVAGE_PM 0x8A25
46#define PCI_CHIP_PROSAVAGE_KM 0x8A26
47#define PCI_CHIP_SAVAGE_MX_MV 0x8c10
48#define PCI_CHIP_SAVAGE_MX 0x8c11
49#define PCI_CHIP_SAVAGE_IX_MV 0x8c12
50#define PCI_CHIP_SAVAGE_IX 0x8c13
51 41
52#define REG 0xff20 /* Serial Port 1 Register */ 42#define REG 0xff20 /* Serial Port 1 Register */
53 43
54/* bit locations in the register */ 44/* bit locations in the register */
55#define DDC_ENAB 0x00040000
56#define DDC_SCL_OUT 0x00080000
57#define DDC_SDA_OUT 0x00100000
58#define DDC_SCL_IN 0x00200000
59#define DDC_SDA_IN 0x00400000
60#define I2C_ENAB 0x00000020 45#define I2C_ENAB 0x00000020
61#define I2C_SCL_OUT 0x00000001 46#define I2C_SCL_OUT 0x00000001
62#define I2C_SDA_OUT 0x00000002 47#define I2C_SDA_OUT 0x00000002
63#define I2C_SCL_IN 0x00000008 48#define I2C_SCL_IN 0x00000008
64#define I2C_SDA_IN 0x00000010 49#define I2C_SDA_IN 0x00000010
65 50
66/* initialization states */
67#define INIT2 0x20
68#define INIT3 0x04
69
70/* delays */ 51/* delays */
71#define CYCLE_DELAY 10 52#define CYCLE_DELAY 10
72#define TIMEOUT (HZ / 2) 53#define TIMEOUT (HZ / 2)
diff --git a/drivers/i2c/busses/i2c-sis5595.c b/drivers/i2c/busses/i2c-sis5595.c
index a6feed449dbe..283769cecee2 100644
--- a/drivers/i2c/busses/i2c-sis5595.c
+++ b/drivers/i2c/busses/i2c-sis5595.c
@@ -129,6 +129,7 @@ MODULE_PARM_DESC(force_addr, "Initialize the base address of the i2c controller"
129 129
130static struct pci_driver sis5595_driver; 130static struct pci_driver sis5595_driver;
131static unsigned short sis5595_base; 131static unsigned short sis5595_base;
132static struct pci_dev *sis5595_pdev;
132 133
133static u8 sis5595_read(u8 reg) 134static u8 sis5595_read(u8 reg)
134{ 135{
@@ -379,6 +380,8 @@ MODULE_DEVICE_TABLE (pci, sis5595_ids);
379 380
380static int __devinit sis5595_probe(struct pci_dev *dev, const struct pci_device_id *id) 381static int __devinit sis5595_probe(struct pci_dev *dev, const struct pci_device_id *id)
381{ 382{
383 int err;
384
382 if (sis5595_setup(dev)) { 385 if (sis5595_setup(dev)) {
383 dev_err(&dev->dev, "SIS5595 not detected, module not inserted.\n"); 386 dev_err(&dev->dev, "SIS5595 not detected, module not inserted.\n");
384 return -ENODEV; 387 return -ENODEV;
@@ -389,20 +392,24 @@ static int __devinit sis5595_probe(struct pci_dev *dev, const struct pci_device_
389 392
390 sprintf(sis5595_adapter.name, "SMBus SIS5595 adapter at %04x", 393 sprintf(sis5595_adapter.name, "SMBus SIS5595 adapter at %04x",
391 sis5595_base + SMB_INDEX); 394 sis5595_base + SMB_INDEX);
392 return i2c_add_adapter(&sis5595_adapter); 395 err = i2c_add_adapter(&sis5595_adapter);
393} 396 if (err) {
397 release_region(sis5595_base + SMB_INDEX, 2);
398 return err;
399 }
394 400
395static void __devexit sis5595_remove(struct pci_dev *dev) 401 /* Always return failure here. This is to allow other drivers to bind
396{ 402 * to this pci device. We don't really want to have control over the
397 i2c_del_adapter(&sis5595_adapter); 403 * pci device, we only wanted to read as few register values from it.
398 release_region(sis5595_base + SMB_INDEX, 2); 404 */
405 sis5595_pdev = pci_dev_get(dev);
406 return -ENODEV;
399} 407}
400 408
401static struct pci_driver sis5595_driver = { 409static struct pci_driver sis5595_driver = {
402 .name = "sis5595_smbus", 410 .name = "sis5595_smbus",
403 .id_table = sis5595_ids, 411 .id_table = sis5595_ids,
404 .probe = sis5595_probe, 412 .probe = sis5595_probe,
405 .remove = __devexit_p(sis5595_remove),
406}; 413};
407 414
408static int __init i2c_sis5595_init(void) 415static int __init i2c_sis5595_init(void)
@@ -413,6 +420,12 @@ static int __init i2c_sis5595_init(void)
413static void __exit i2c_sis5595_exit(void) 420static void __exit i2c_sis5595_exit(void)
414{ 421{
415 pci_unregister_driver(&sis5595_driver); 422 pci_unregister_driver(&sis5595_driver);
423 if (sis5595_pdev) {
424 i2c_del_adapter(&sis5595_adapter);
425 release_region(sis5595_base + SMB_INDEX, 2);
426 pci_dev_put(sis5595_pdev);
427 sis5595_pdev = NULL;
428 }
416} 429}
417 430
418MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>"); 431MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>");
diff --git a/drivers/i2c/busses/i2c-taos-evm.c b/drivers/i2c/busses/i2c-taos-evm.c
new file mode 100644
index 000000000000..1b0cfd5472fd
--- /dev/null
+++ b/drivers/i2c/busses/i2c-taos-evm.c
@@ -0,0 +1,330 @@
1/*
2 * Driver for the TAOS evaluation modules
3 * These devices include an I2C master which can be controlled over the
4 * serial port.
5 *
6 * Copyright (C) 2007 Jean Delvare <khali@linux-fr.org>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/delay.h>
23#include <linux/module.h>
24#include <linux/slab.h>
25#include <linux/interrupt.h>
26#include <linux/input.h>
27#include <linux/serio.h>
28#include <linux/init.h>
29#include <linux/i2c.h>
30
31#define TAOS_BUFFER_SIZE 63
32
33#define TAOS_STATE_INIT 0
34#define TAOS_STATE_IDLE 1
35#define TAOS_STATE_SEND 2
36#define TAOS_STATE_RECV 3
37
38#define TAOS_CMD_RESET 0x12
39
40static DECLARE_WAIT_QUEUE_HEAD(wq);
41
42struct taos_data {
43 struct i2c_adapter adapter;
44 struct i2c_client *client;
45 int state;
46 u8 addr; /* last used address */
47 unsigned char buffer[TAOS_BUFFER_SIZE];
48 unsigned int pos; /* position inside the buffer */
49};
50
51/* TAOS TSL2550 EVM */
52static struct i2c_board_info tsl2550_info = {
53 I2C_BOARD_INFO("tsl2550", 0x39),
54 .type = "tsl2550",
55};
56
57/* Instantiate i2c devices based on the adapter name */
58static struct i2c_client *taos_instantiate_device(struct i2c_adapter *adapter)
59{
60 if (!strncmp(adapter->name, "TAOS TSL2550 EVM", 16)) {
61 dev_info(&adapter->dev, "Instantiating device %s at 0x%02x\n",
62 tsl2550_info.driver_name, tsl2550_info.addr);
63 return i2c_new_device(adapter, &tsl2550_info);
64 }
65
66 return NULL;
67}
68
69static int taos_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
70 unsigned short flags, char read_write, u8 command,
71 int size, union i2c_smbus_data *data)
72{
73 struct serio *serio = adapter->algo_data;
74 struct taos_data *taos = serio_get_drvdata(serio);
75 char *p;
76
77 /* Encode our transaction. "@" is for the device address, "$" for the
78 SMBus command and "#" for the data. */
79 p = taos->buffer;
80
81 /* The device remembers the last used address, no need to send it
82 again if it's the same */
83 if (addr != taos->addr)
84 p += sprintf(p, "@%02X", addr);
85
86 switch (size) {
87 case I2C_SMBUS_BYTE:
88 if (read_write == I2C_SMBUS_WRITE)
89 sprintf(p, "$#%02X", command);
90 else
91 sprintf(p, "$");
92 break;
93 case I2C_SMBUS_BYTE_DATA:
94 if (read_write == I2C_SMBUS_WRITE)
95 sprintf(p, "$%02X#%02X", command, data->byte);
96 else
97 sprintf(p, "$%02X", command);
98 break;
99 default:
100 dev_dbg(&adapter->dev, "Unsupported transaction size %d\n",
101 size);
102 return -EINVAL;
103 }
104
105 /* Send the transaction to the TAOS EVM */
106 dev_dbg(&adapter->dev, "Command buffer: %s\n", taos->buffer);
107 taos->pos = 0;
108 taos->state = TAOS_STATE_SEND;
109 serio_write(serio, taos->buffer[0]);
110 wait_event_interruptible_timeout(wq, taos->state == TAOS_STATE_IDLE,
111 msecs_to_jiffies(250));
112 if (taos->state != TAOS_STATE_IDLE) {
113 dev_err(&adapter->dev, "Transaction failed "
114 "(state=%d, pos=%d)\n", taos->state, taos->pos);
115 taos->addr = 0;
116 return -EIO;
117 }
118 taos->addr = addr;
119
120 /* Start the transaction and read the answer */
121 taos->pos = 0;
122 taos->state = TAOS_STATE_RECV;
123 serio_write(serio, read_write == I2C_SMBUS_WRITE ? '>' : '<');
124 wait_event_interruptible_timeout(wq, taos->state == TAOS_STATE_IDLE,
125 msecs_to_jiffies(150));
126 if (taos->state != TAOS_STATE_IDLE
127 || taos->pos != 6) {
128 dev_err(&adapter->dev, "Transaction timeout (pos=%d)\n",
129 taos->pos);
130 return -EIO;
131 }
132 dev_dbg(&adapter->dev, "Answer buffer: %s\n", taos->buffer);
133
134 /* Interpret the returned string */
135 p = taos->buffer + 2;
136 p[3] = '\0';
137 if (!strcmp(p, "NAK"))
138 return -ENODEV;
139
140 if (read_write == I2C_SMBUS_WRITE) {
141 if (!strcmp(p, "ACK"))
142 return 0;
143 } else {
144 if (p[0] == 'x') {
145 data->byte = simple_strtol(p + 1, NULL, 16);
146 return 0;
147 }
148 }
149
150 return -EIO;
151}
152
153static u32 taos_smbus_func(struct i2c_adapter *adapter)
154{
155 return I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_BYTE_DATA;
156}
157
158static const struct i2c_algorithm taos_algorithm = {
159 .smbus_xfer = taos_smbus_xfer,
160 .functionality = taos_smbus_func,
161};
162
163static irqreturn_t taos_interrupt(struct serio *serio, unsigned char data,
164 unsigned int flags)
165{
166 struct taos_data *taos = serio_get_drvdata(serio);
167
168 switch (taos->state) {
169 case TAOS_STATE_INIT:
170 taos->buffer[taos->pos++] = data;
171 if (data == ':'
172 || taos->pos == TAOS_BUFFER_SIZE - 1) {
173 taos->buffer[taos->pos] = '\0';
174 taos->state = TAOS_STATE_IDLE;
175 wake_up_interruptible(&wq);
176 }
177 break;
178 case TAOS_STATE_SEND:
179 if (taos->buffer[++taos->pos])
180 serio_write(serio, taos->buffer[taos->pos]);
181 else {
182 taos->state = TAOS_STATE_IDLE;
183 wake_up_interruptible(&wq);
184 }
185 break;
186 case TAOS_STATE_RECV:
187 taos->buffer[taos->pos++] = data;
188 if (data == ']') {
189 taos->buffer[taos->pos] = '\0';
190 taos->state = TAOS_STATE_IDLE;
191 wake_up_interruptible(&wq);
192 }
193 break;
194 }
195
196 return IRQ_HANDLED;
197}
198
199/* Extract the adapter name from the buffer received after reset.
200 The buffer is modified and a pointer inside the buffer is returned. */
201static char *taos_adapter_name(char *buffer)
202{
203 char *start, *end;
204
205 start = strstr(buffer, "TAOS ");
206 if (!start)
207 return NULL;
208
209 end = strchr(start, '\r');
210 if (!end)
211 return NULL;
212 *end = '\0';
213
214 return start;
215}
216
217static int taos_connect(struct serio *serio, struct serio_driver *drv)
218{
219 struct taos_data *taos;
220 struct i2c_adapter *adapter;
221 char *name;
222 int err;
223
224 taos = kzalloc(sizeof(struct taos_data), GFP_KERNEL);
225 if (!taos) {
226 err = -ENOMEM;
227 goto exit;
228 }
229 taos->state = TAOS_STATE_INIT;
230 serio_set_drvdata(serio, taos);
231
232 err = serio_open(serio, drv);
233 if (err)
234 goto exit_kfree;
235
236 adapter = &taos->adapter;
237 adapter->owner = THIS_MODULE;
238 adapter->algo = &taos_algorithm;
239 adapter->algo_data = serio;
240 adapter->dev.parent = &serio->dev;
241
242 /* Reset the TAOS evaluation module to identify it */
243 serio_write(serio, TAOS_CMD_RESET);
244 wait_event_interruptible_timeout(wq, taos->state == TAOS_STATE_IDLE,
245 msecs_to_jiffies(2000));
246
247 if (taos->state != TAOS_STATE_IDLE) {
248 err = -ENODEV;
249 dev_dbg(&serio->dev, "TAOS EVM reset failed (state=%d, "
250 "pos=%d)\n", taos->state, taos->pos);
251 goto exit_close;
252 }
253
254 name = taos_adapter_name(taos->buffer);
255 if (!name) {
256 err = -ENODEV;
257 dev_err(&serio->dev, "TAOS EVM identification failed\n");
258 goto exit_close;
259 }
260 strlcpy(adapter->name, name, sizeof(adapter->name));
261
262 err = i2c_add_adapter(adapter);
263 if (err)
264 goto exit_close;
265 dev_dbg(&serio->dev, "Connected to TAOS EVM\n");
266
267 taos->client = taos_instantiate_device(adapter);
268 return 0;
269
270 exit_close:
271 serio_close(serio);
272 exit_kfree:
273 serio_set_drvdata(serio, NULL);
274 kfree(taos);
275 exit:
276 return err;
277}
278
279static void taos_disconnect(struct serio *serio)
280{
281 struct taos_data *taos = serio_get_drvdata(serio);
282
283 if (taos->client)
284 i2c_unregister_device(taos->client);
285 i2c_del_adapter(&taos->adapter);
286 serio_close(serio);
287 serio_set_drvdata(serio, NULL);
288 kfree(taos);
289
290 dev_dbg(&serio->dev, "Disconnected from TAOS EVM\n");
291}
292
293static struct serio_device_id taos_serio_ids[] = {
294 {
295 .type = SERIO_RS232,
296 .proto = SERIO_TAOSEVM,
297 .id = SERIO_ANY,
298 .extra = SERIO_ANY,
299 },
300 { 0 }
301};
302MODULE_DEVICE_TABLE(serio, taos_serio_ids);
303
304static struct serio_driver taos_drv = {
305 .driver = {
306 .name = "taos-evm",
307 },
308 .description = "TAOS evaluation module driver",
309 .id_table = taos_serio_ids,
310 .connect = taos_connect,
311 .disconnect = taos_disconnect,
312 .interrupt = taos_interrupt,
313};
314
315static int __init taos_init(void)
316{
317 return serio_register_driver(&taos_drv);
318}
319
320static void __exit taos_exit(void)
321{
322 serio_unregister_driver(&taos_drv);
323}
324
325MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
326MODULE_DESCRIPTION("TAOS evaluation module driver");
327MODULE_LICENSE("GPL");
328
329module_init(taos_init);
330module_exit(taos_exit);
diff --git a/drivers/i2c/busses/i2c-viapro.c b/drivers/i2c/busses/i2c-viapro.c
index 7a2bc06304fc..a0f7e4a303b5 100644
--- a/drivers/i2c/busses/i2c-viapro.c
+++ b/drivers/i2c/busses/i2c-viapro.c
@@ -235,7 +235,7 @@ static s32 vt596_access(struct i2c_adapter *adap, u16 addr,
235 if (!(vt596_features & FEATURE_I2CBLOCK)) 235 if (!(vt596_features & FEATURE_I2CBLOCK))
236 goto exit_unsupported; 236 goto exit_unsupported;
237 if (read_write == I2C_SMBUS_READ) 237 if (read_write == I2C_SMBUS_READ)
238 outb_p(I2C_SMBUS_BLOCK_MAX, SMBHSTDAT0); 238 outb_p(data->block[0], SMBHSTDAT0);
239 /* Fall through */ 239 /* Fall through */
240 case I2C_SMBUS_BLOCK_DATA: 240 case I2C_SMBUS_BLOCK_DATA:
241 outb_p(command, SMBHSTCMD); 241 outb_p(command, SMBHSTCMD);
diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c
index 0d6bd4f7b7fa..e6c4a2b762ec 100644
--- a/drivers/i2c/busses/scx200_acb.c
+++ b/drivers/i2c/busses/scx200_acb.c
@@ -310,8 +310,6 @@ static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
310 break; 310 break;
311 311
312 case I2C_SMBUS_I2C_BLOCK_DATA: 312 case I2C_SMBUS_I2C_BLOCK_DATA:
313 if (rw == I2C_SMBUS_READ)
314 data->block[0] = I2C_SMBUS_BLOCK_MAX; /* For now */
315 len = data->block[0]; 313 len = data->block[0];
316 if (len == 0 || len > I2C_SMBUS_BLOCK_MAX) 314 if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
317 return -EINVAL; 315 return -EINVAL;
@@ -388,7 +386,7 @@ static const struct i2c_algorithm scx200_acb_algorithm = {
388}; 386};
389 387
390static struct scx200_acb_iface *scx200_acb_list; 388static struct scx200_acb_iface *scx200_acb_list;
391static DECLARE_MUTEX(scx200_acb_list_mutex); 389static DEFINE_MUTEX(scx200_acb_list_mutex);
392 390
393static __init int scx200_acb_probe(struct scx200_acb_iface *iface) 391static __init int scx200_acb_probe(struct scx200_acb_iface *iface)
394{ 392{
@@ -472,10 +470,10 @@ static int __init scx200_acb_create(struct scx200_acb_iface *iface)
472 return -ENODEV; 470 return -ENODEV;
473 } 471 }
474 472
475 down(&scx200_acb_list_mutex); 473 mutex_lock(&scx200_acb_list_mutex);
476 iface->next = scx200_acb_list; 474 iface->next = scx200_acb_list;
477 scx200_acb_list = iface; 475 scx200_acb_list = iface;
478 up(&scx200_acb_list_mutex); 476 mutex_unlock(&scx200_acb_list_mutex);
479 477
480 return 0; 478 return 0;
481} 479}
@@ -633,10 +631,10 @@ static void __exit scx200_acb_cleanup(void)
633{ 631{
634 struct scx200_acb_iface *iface; 632 struct scx200_acb_iface *iface;
635 633
636 down(&scx200_acb_list_mutex); 634 mutex_lock(&scx200_acb_list_mutex);
637 while ((iface = scx200_acb_list) != NULL) { 635 while ((iface = scx200_acb_list) != NULL) {
638 scx200_acb_list = iface->next; 636 scx200_acb_list = iface->next;
639 up(&scx200_acb_list_mutex); 637 mutex_unlock(&scx200_acb_list_mutex);
640 638
641 i2c_del_adapter(&iface->adapter); 639 i2c_del_adapter(&iface->adapter);
642 640
@@ -648,9 +646,9 @@ static void __exit scx200_acb_cleanup(void)
648 release_region(iface->base, 8); 646 release_region(iface->base, 8);
649 647
650 kfree(iface); 648 kfree(iface);
651 down(&scx200_acb_list_mutex); 649 mutex_lock(&scx200_acb_list_mutex);
652 } 650 }
653 up(&scx200_acb_list_mutex); 651 mutex_unlock(&scx200_acb_list_mutex);
654} 652}
655 653
656module_init(scx200_acb_init); 654module_init(scx200_acb_init);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 09:18:52 -0500