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path: root/drivers/i2c/busses/i2c-pxa.c
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Diffstat (limited to 'drivers/i2c/busses/i2c-pxa.c')
-rw-r--r--drivers/i2c/busses/i2c-pxa.c115
1 files changed, 89 insertions, 26 deletions
diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c
index f4c19a97e0b3..f59224a5c761 100644
--- a/drivers/i2c/busses/i2c-pxa.c
+++ b/drivers/i2c/busses/i2c-pxa.c
@@ -29,38 +29,75 @@
29#include <linux/errno.h> 29#include <linux/errno.h>
30#include <linux/interrupt.h> 30#include <linux/interrupt.h>
31#include <linux/i2c-pxa.h> 31#include <linux/i2c-pxa.h>
32#include <linux/of_i2c.h>
32#include <linux/platform_device.h> 33#include <linux/platform_device.h>
33#include <linux/err.h> 34#include <linux/err.h>
34#include <linux/clk.h> 35#include <linux/clk.h>
35#include <linux/slab.h> 36#include <linux/slab.h>
36#include <linux/io.h> 37#include <linux/io.h>
38#include <linux/i2c/pxa-i2c.h>
37 39
38#include <asm/irq.h> 40#include <asm/irq.h>
39#include <plat/i2c.h> 41
42#ifndef CONFIG_HAVE_CLK
43#define clk_get(dev, id) NULL
44#define clk_put(clk) do { } while (0)
45#define clk_disable(clk) do { } while (0)
46#define clk_enable(clk) do { } while (0)
47#endif
48
49struct pxa_reg_layout {
50 u32 ibmr;
51 u32 idbr;
52 u32 icr;
53 u32 isr;
54 u32 isar;
55};
56
57enum pxa_i2c_types {
58 REGS_PXA2XX,
59 REGS_PXA3XX,
60 REGS_CE4100,
61};
40 62
41/* 63/*
42 * I2C register offsets will be shifted 0 or 1 bit left, depending on 64 * I2C registers definitions
43 * different SoCs
44 */ 65 */
45#define REG_SHIFT_0 (0 << 0) 66static struct pxa_reg_layout pxa_reg_layout[] = {
46#define REG_SHIFT_1 (1 << 0) 67 [REGS_PXA2XX] = {
47#define REG_SHIFT(d) ((d) & 0x1) 68 .ibmr = 0x00,
69 .idbr = 0x08,
70 .icr = 0x10,
71 .isr = 0x18,
72 .isar = 0x20,
73 },
74 [REGS_PXA3XX] = {
75 .ibmr = 0x00,
76 .idbr = 0x04,
77 .icr = 0x08,
78 .isr = 0x0c,
79 .isar = 0x10,
80 },
81 [REGS_CE4100] = {
82 .ibmr = 0x14,
83 .idbr = 0x0c,
84 .icr = 0x00,
85 .isr = 0x04,
86 /* no isar register */
87 },
88};
48 89
49static const struct platform_device_id i2c_pxa_id_table[] = { 90static const struct platform_device_id i2c_pxa_id_table[] = {
50 { "pxa2xx-i2c", REG_SHIFT_1 }, 91 { "pxa2xx-i2c", REGS_PXA2XX },
51 { "pxa3xx-pwri2c", REG_SHIFT_0 }, 92 { "pxa3xx-pwri2c", REGS_PXA3XX },
93 { "ce4100-i2c", REGS_CE4100 },
52 { }, 94 { },
53}; 95};
54MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table); 96MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table);
55 97
56/* 98/*
57 * I2C registers and bit definitions 99 * I2C bit definitions
58 */ 100 */
59#define IBMR (0x00)
60#define IDBR (0x08)
61#define ICR (0x10)
62#define ISR (0x18)
63#define ISAR (0x20)
64 101
65#define ICR_START (1 << 0) /* start bit */ 102#define ICR_START (1 << 0) /* start bit */
66#define ICR_STOP (1 << 1) /* stop bit */ 103#define ICR_STOP (1 << 1) /* stop bit */
@@ -111,7 +148,11 @@ struct pxa_i2c {
111 u32 icrlog[32]; 148 u32 icrlog[32];
112 149
113 void __iomem *reg_base; 150 void __iomem *reg_base;
114 unsigned int reg_shift; 151 void __iomem *reg_ibmr;
152 void __iomem *reg_idbr;
153 void __iomem *reg_icr;
154 void __iomem *reg_isr;
155 void __iomem *reg_isar;
115 156
116 unsigned long iobase; 157 unsigned long iobase;
117 unsigned long iosize; 158 unsigned long iosize;
@@ -121,11 +162,11 @@ struct pxa_i2c {
121 unsigned int fast_mode :1; 162 unsigned int fast_mode :1;
122}; 163};
123 164
124#define _IBMR(i2c) ((i2c)->reg_base + (0x0 << (i2c)->reg_shift)) 165#define _IBMR(i2c) ((i2c)->reg_ibmr)
125#define _IDBR(i2c) ((i2c)->reg_base + (0x4 << (i2c)->reg_shift)) 166#define _IDBR(i2c) ((i2c)->reg_idbr)
126#define _ICR(i2c) ((i2c)->reg_base + (0x8 << (i2c)->reg_shift)) 167#define _ICR(i2c) ((i2c)->reg_icr)
127#define _ISR(i2c) ((i2c)->reg_base + (0xc << (i2c)->reg_shift)) 168#define _ISR(i2c) ((i2c)->reg_isr)
128#define _ISAR(i2c) ((i2c)->reg_base + (0x10 << (i2c)->reg_shift)) 169#define _ISAR(i2c) ((i2c)->reg_isar)
129 170
130/* 171/*
131 * I2C Slave mode address 172 * I2C Slave mode address
@@ -418,7 +459,8 @@ static void i2c_pxa_reset(struct pxa_i2c *i2c)
418 writel(I2C_ISR_INIT, _ISR(i2c)); 459 writel(I2C_ISR_INIT, _ISR(i2c));
419 writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c)); 460 writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c));
420 461
421 writel(i2c->slave_addr, _ISAR(i2c)); 462 if (i2c->reg_isar)
463 writel(i2c->slave_addr, _ISAR(i2c));
422 464
423 /* set control register values */ 465 /* set control register values */
424 writel(I2C_ICR_INIT | (i2c->fast_mode ? ICR_FM : 0), _ICR(i2c)); 466 writel(I2C_ICR_INIT | (i2c->fast_mode ? ICR_FM : 0), _ICR(i2c));
@@ -729,8 +771,10 @@ static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
729 */ 771 */
730 ret = i2c->msg_idx; 772 ret = i2c->msg_idx;
731 773
732 if (timeout == 0) 774 if (!timeout && i2c->msg_num) {
733 i2c_pxa_scream_blue_murder(i2c, "timeout"); 775 i2c_pxa_scream_blue_murder(i2c, "timeout");
776 ret = I2C_RETRY;
777 }
734 778
735 out: 779 out:
736 return ret; 780 return ret;
@@ -915,11 +959,16 @@ static void i2c_pxa_irq_rxfull(struct pxa_i2c *i2c, u32 isr)
915 writel(icr, _ICR(i2c)); 959 writel(icr, _ICR(i2c));
916} 960}
917 961
962#define VALID_INT_SOURCE (ISR_SSD | ISR_ALD | ISR_ITE | ISR_IRF | \
963 ISR_SAD | ISR_BED)
918static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id) 964static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
919{ 965{
920 struct pxa_i2c *i2c = dev_id; 966 struct pxa_i2c *i2c = dev_id;
921 u32 isr = readl(_ISR(i2c)); 967 u32 isr = readl(_ISR(i2c));
922 968
969 if (!(isr & VALID_INT_SOURCE))
970 return IRQ_NONE;
971
923 if (i2c_debug > 2 && 0) { 972 if (i2c_debug > 2 && 0) {
924 dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n", 973 dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n",
925 __func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c))); 974 __func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c)));
@@ -934,7 +983,7 @@ static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
934 /* 983 /*
935 * Always clear all pending IRQs. 984 * Always clear all pending IRQs.
936 */ 985 */
937 writel(isr & (ISR_SSD|ISR_ALD|ISR_ITE|ISR_IRF|ISR_SAD|ISR_BED), _ISR(i2c)); 986 writel(isr & VALID_INT_SOURCE, _ISR(i2c));
938 987
939 if (isr & ISR_SAD) 988 if (isr & ISR_SAD)
940 i2c_pxa_slave_start(i2c, isr); 989 i2c_pxa_slave_start(i2c, isr);
@@ -1001,6 +1050,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
1001 struct resource *res; 1050 struct resource *res;
1002 struct i2c_pxa_platform_data *plat = dev->dev.platform_data; 1051 struct i2c_pxa_platform_data *plat = dev->dev.platform_data;
1003 const struct platform_device_id *id = platform_get_device_id(dev); 1052 const struct platform_device_id *id = platform_get_device_id(dev);
1053 enum pxa_i2c_types i2c_type = id->driver_data;
1004 int ret; 1054 int ret;
1005 int irq; 1055 int irq;
1006 1056
@@ -1044,7 +1094,13 @@ static int i2c_pxa_probe(struct platform_device *dev)
1044 ret = -EIO; 1094 ret = -EIO;
1045 goto eremap; 1095 goto eremap;
1046 } 1096 }
1047 i2c->reg_shift = REG_SHIFT(id->driver_data); 1097
1098 i2c->reg_ibmr = i2c->reg_base + pxa_reg_layout[i2c_type].ibmr;
1099 i2c->reg_idbr = i2c->reg_base + pxa_reg_layout[i2c_type].idbr;
1100 i2c->reg_icr = i2c->reg_base + pxa_reg_layout[i2c_type].icr;
1101 i2c->reg_isr = i2c->reg_base + pxa_reg_layout[i2c_type].isr;
1102 if (i2c_type != REGS_CE4100)
1103 i2c->reg_isar = i2c->reg_base + pxa_reg_layout[i2c_type].isar;
1048 1104
1049 i2c->iobase = res->start; 1105 i2c->iobase = res->start;
1050 i2c->iosize = resource_size(res); 1106 i2c->iosize = resource_size(res);
@@ -1072,7 +1128,7 @@ static int i2c_pxa_probe(struct platform_device *dev)
1072 i2c->adap.algo = &i2c_pxa_pio_algorithm; 1128 i2c->adap.algo = &i2c_pxa_pio_algorithm;
1073 } else { 1129 } else {
1074 i2c->adap.algo = &i2c_pxa_algorithm; 1130 i2c->adap.algo = &i2c_pxa_algorithm;
1075 ret = request_irq(irq, i2c_pxa_handler, IRQF_DISABLED, 1131 ret = request_irq(irq, i2c_pxa_handler, IRQF_SHARED,
1076 i2c->adap.name, i2c); 1132 i2c->adap.name, i2c);
1077 if (ret) 1133 if (ret)
1078 goto ereqirq; 1134 goto ereqirq;
@@ -1082,12 +1138,19 @@ static int i2c_pxa_probe(struct platform_device *dev)
1082 1138
1083 i2c->adap.algo_data = i2c; 1139 i2c->adap.algo_data = i2c;
1084 i2c->adap.dev.parent = &dev->dev; 1140 i2c->adap.dev.parent = &dev->dev;
1141#ifdef CONFIG_OF
1142 i2c->adap.dev.of_node = dev->dev.of_node;
1143#endif
1085 1144
1086 ret = i2c_add_numbered_adapter(&i2c->adap); 1145 if (i2c_type == REGS_CE4100)
1146 ret = i2c_add_adapter(&i2c->adap);
1147 else
1148 ret = i2c_add_numbered_adapter(&i2c->adap);
1087 if (ret < 0) { 1149 if (ret < 0) {
1088 printk(KERN_INFO "I2C: Failed to add bus\n"); 1150 printk(KERN_INFO "I2C: Failed to add bus\n");
1089 goto eadapt; 1151 goto eadapt;
1090 } 1152 }
1153 of_i2c_register_devices(&i2c->adap);
1091 1154
1092 platform_set_drvdata(dev, i2c); 1155 platform_set_drvdata(dev, i2c);
1093 1156