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path: root/drivers/i2c/busses/i2c-davinci.c
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Diffstat (limited to 'drivers/i2c/busses/i2c-davinci.c')
-rw-r--r--drivers/i2c/busses/i2c-davinci.c89
1 files changed, 67 insertions, 22 deletions
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c
index 7ecbfc429b19..af3846eda985 100644
--- a/drivers/i2c/busses/i2c-davinci.c
+++ b/drivers/i2c/busses/i2c-davinci.c
@@ -85,6 +85,7 @@
85#define DAVINCI_I2C_MDR_MST (1 << 10) 85#define DAVINCI_I2C_MDR_MST (1 << 10)
86#define DAVINCI_I2C_MDR_TRX (1 << 9) 86#define DAVINCI_I2C_MDR_TRX (1 << 9)
87#define DAVINCI_I2C_MDR_XA (1 << 8) 87#define DAVINCI_I2C_MDR_XA (1 << 8)
88#define DAVINCI_I2C_MDR_RM (1 << 7)
88#define DAVINCI_I2C_MDR_IRS (1 << 5) 89#define DAVINCI_I2C_MDR_IRS (1 << 5)
89 90
90#define DAVINCI_I2C_IMR_AAS (1 << 6) 91#define DAVINCI_I2C_IMR_AAS (1 << 6)
@@ -112,6 +113,7 @@ struct davinci_i2c_dev {
112 u8 *buf; 113 u8 *buf;
113 size_t buf_len; 114 size_t buf_len;
114 int irq; 115 int irq;
116 u8 terminate;
115 struct i2c_adapter adapter; 117 struct i2c_adapter adapter;
116}; 118};
117 119
@@ -142,6 +144,7 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
142 struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; 144 struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
143 u16 psc; 145 u16 psc;
144 u32 clk; 146 u32 clk;
147 u32 d;
145 u32 clkh; 148 u32 clkh;
146 u32 clkl; 149 u32 clkl;
147 u32 input_clock = clk_get_rate(dev->clk); 150 u32 input_clock = clk_get_rate(dev->clk);
@@ -171,23 +174,29 @@ static int i2c_davinci_init(struct davinci_i2c_dev *dev)
171 * if PSC > 1 , d = 5 174 * if PSC > 1 , d = 5
172 */ 175 */
173 176
174 psc = 26; /* To get 1MHz clock */ 177 /* get minimum of 7 MHz clock, but max of 12 MHz */
178 psc = (input_clock / 7000000) - 1;
179 if ((input_clock / (psc + 1)) > 12000000)
180 psc++; /* better to run under spec than over */
181 d = (psc >= 2) ? 5 : 7 - psc;
175 182
176 clk = ((input_clock / (psc + 1)) / (pdata->bus_freq * 1000)) - 10; 183 clk = ((input_clock / (psc + 1)) / (pdata->bus_freq * 1000)) - (d << 1);
177 clkh = (50 * clk) / 100; 184 clkh = clk >> 1;
178 clkl = clk - clkh; 185 clkl = clk - clkh;
179 186
180 davinci_i2c_write_reg(dev, DAVINCI_I2C_PSC_REG, psc); 187 davinci_i2c_write_reg(dev, DAVINCI_I2C_PSC_REG, psc);
181 davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKH_REG, clkh); 188 davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKH_REG, clkh);
182 davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKL_REG, clkl); 189 davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKL_REG, clkl);
183 190
184 dev_dbg(dev->dev, "CLK = %d\n", clk); 191 dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk);
185 dev_dbg(dev->dev, "PSC = %d\n", 192 dev_dbg(dev->dev, "PSC = %d\n",
186 davinci_i2c_read_reg(dev, DAVINCI_I2C_PSC_REG)); 193 davinci_i2c_read_reg(dev, DAVINCI_I2C_PSC_REG));
187 dev_dbg(dev->dev, "CLKL = %d\n", 194 dev_dbg(dev->dev, "CLKL = %d\n",
188 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKL_REG)); 195 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKL_REG));
189 dev_dbg(dev->dev, "CLKH = %d\n", 196 dev_dbg(dev->dev, "CLKH = %d\n",
190 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKH_REG)); 197 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKH_REG));
198 dev_dbg(dev->dev, "bus_freq = %dkHz, bus_delay = %d\n",
199 pdata->bus_freq, pdata->bus_delay);
191 200
192 /* Take the I2C module out of reset: */ 201 /* Take the I2C module out of reset: */
193 w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); 202 w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
@@ -233,7 +242,6 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
233 struct davinci_i2c_dev *dev = i2c_get_adapdata(adap); 242 struct davinci_i2c_dev *dev = i2c_get_adapdata(adap);
234 struct davinci_i2c_platform_data *pdata = dev->dev->platform_data; 243 struct davinci_i2c_platform_data *pdata = dev->dev->platform_data;
235 u32 flag; 244 u32 flag;
236 u32 stat;
237 u16 w; 245 u16 w;
238 int r; 246 int r;
239 247
@@ -254,12 +262,9 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
254 262
255 davinci_i2c_write_reg(dev, DAVINCI_I2C_CNT_REG, dev->buf_len); 263 davinci_i2c_write_reg(dev, DAVINCI_I2C_CNT_REG, dev->buf_len);
256 264
257 init_completion(&dev->cmd_complete); 265 INIT_COMPLETION(dev->cmd_complete);
258 dev->cmd_err = 0; 266 dev->cmd_err = 0;
259 267
260 /* Clear any pending interrupts by reading the IVR */
261 stat = davinci_i2c_read_reg(dev, DAVINCI_I2C_IVR_REG);
262
263 /* Take I2C out of reset, configure it as master and set the 268 /* Take I2C out of reset, configure it as master and set the
264 * start bit */ 269 * start bit */
265 flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST | DAVINCI_I2C_MDR_STT; 270 flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST | DAVINCI_I2C_MDR_STT;
@@ -280,20 +285,34 @@ i2c_davinci_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, int stop)
280 MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 1); 285 MOD_REG_BIT(w, DAVINCI_I2C_IMR_XRDY, 1);
281 davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, w); 286 davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, w);
282 287
288 dev->terminate = 0;
283 /* write the data into mode register */ 289 /* write the data into mode register */
284 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); 290 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
285 291
286 r = wait_for_completion_interruptible_timeout(&dev->cmd_complete, 292 r = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
287 DAVINCI_I2C_TIMEOUT); 293 DAVINCI_I2C_TIMEOUT);
288 dev->buf_len = 0;
289 if (r < 0)
290 return r;
291
292 if (r == 0) { 294 if (r == 0) {
293 dev_err(dev->dev, "controller timed out\n"); 295 dev_err(dev->dev, "controller timed out\n");
294 i2c_davinci_init(dev); 296 i2c_davinci_init(dev);
297 dev->buf_len = 0;
295 return -ETIMEDOUT; 298 return -ETIMEDOUT;
296 } 299 }
300 if (dev->buf_len) {
301 /* This should be 0 if all bytes were transferred
302 * or dev->cmd_err denotes an error.
303 * A signal may have aborted the transfer.
304 */
305 if (r >= 0) {
306 dev_err(dev->dev, "abnormal termination buf_len=%i\n",
307 dev->buf_len);
308 r = -EREMOTEIO;
309 }
310 dev->terminate = 1;
311 wmb();
312 dev->buf_len = 0;
313 }
314 if (r < 0)
315 return r;
297 316
298 /* no error */ 317 /* no error */
299 if (likely(!dev->cmd_err)) 318 if (likely(!dev->cmd_err))
@@ -338,12 +357,11 @@ i2c_davinci_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
338 357
339 for (i = 0; i < num; i++) { 358 for (i = 0; i < num; i++) {
340 ret = i2c_davinci_xfer_msg(adap, &msgs[i], (i == (num - 1))); 359 ret = i2c_davinci_xfer_msg(adap, &msgs[i], (i == (num - 1)));
360 dev_dbg(dev->dev, "%s [%d/%d] ret: %d\n", __func__, i + 1, num,
361 ret);
341 if (ret < 0) 362 if (ret < 0)
342 return ret; 363 return ret;
343 } 364 }
344
345 dev_dbg(dev->dev, "%s:%d ret: %d\n", __func__, __LINE__, ret);
346
347 return num; 365 return num;
348} 366}
349 367
@@ -352,6 +370,27 @@ static u32 i2c_davinci_func(struct i2c_adapter *adap)
352 return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK); 370 return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
353} 371}
354 372
373static void terminate_read(struct davinci_i2c_dev *dev)
374{
375 u16 w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
376 w |= DAVINCI_I2C_MDR_NACK;
377 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
378
379 /* Throw away data */
380 davinci_i2c_read_reg(dev, DAVINCI_I2C_DRR_REG);
381 if (!dev->terminate)
382 dev_err(dev->dev, "RDR IRQ while no data requested\n");
383}
384static void terminate_write(struct davinci_i2c_dev *dev)
385{
386 u16 w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG);
387 w |= DAVINCI_I2C_MDR_RM | DAVINCI_I2C_MDR_STP;
388 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w);
389
390 if (!dev->terminate)
391 dev_err(dev->dev, "TDR IRQ while no data to send\n");
392}
393
355/* 394/*
356 * Interrupt service routine. This gets called whenever an I2C interrupt 395 * Interrupt service routine. This gets called whenever an I2C interrupt
357 * occurs. 396 * occurs.
@@ -372,12 +411,15 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
372 411
373 switch (stat) { 412 switch (stat) {
374 case DAVINCI_I2C_IVR_AL: 413 case DAVINCI_I2C_IVR_AL:
414 /* Arbitration lost, must retry */
375 dev->cmd_err |= DAVINCI_I2C_STR_AL; 415 dev->cmd_err |= DAVINCI_I2C_STR_AL;
416 dev->buf_len = 0;
376 complete(&dev->cmd_complete); 417 complete(&dev->cmd_complete);
377 break; 418 break;
378 419
379 case DAVINCI_I2C_IVR_NACK: 420 case DAVINCI_I2C_IVR_NACK:
380 dev->cmd_err |= DAVINCI_I2C_STR_NACK; 421 dev->cmd_err |= DAVINCI_I2C_STR_NACK;
422 dev->buf_len = 0;
381 complete(&dev->cmd_complete); 423 complete(&dev->cmd_complete);
382 break; 424 break;
383 425
@@ -399,9 +441,10 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
399 davinci_i2c_write_reg(dev, 441 davinci_i2c_write_reg(dev,
400 DAVINCI_I2C_STR_REG, 442 DAVINCI_I2C_STR_REG,
401 DAVINCI_I2C_IMR_RRDY); 443 DAVINCI_I2C_IMR_RRDY);
402 } else 444 } else {
403 dev_err(dev->dev, "RDR IRQ while no " 445 /* signal can terminate transfer */
404 "data requested\n"); 446 terminate_read(dev);
447 }
405 break; 448 break;
406 449
407 case DAVINCI_I2C_IVR_XRDY: 450 case DAVINCI_I2C_IVR_XRDY:
@@ -418,9 +461,10 @@ static irqreturn_t i2c_davinci_isr(int this_irq, void *dev_id)
418 davinci_i2c_write_reg(dev, 461 davinci_i2c_write_reg(dev,
419 DAVINCI_I2C_IMR_REG, 462 DAVINCI_I2C_IMR_REG,
420 w); 463 w);
421 } else 464 } else {
422 dev_err(dev->dev, "TDR IRQ while no data to " 465 /* signal can terminate transfer */
423 "send\n"); 466 terminate_write(dev);
467 }
424 break; 468 break;
425 469
426 case DAVINCI_I2C_IVR_SCD: 470 case DAVINCI_I2C_IVR_SCD:
@@ -475,6 +519,7 @@ static int davinci_i2c_probe(struct platform_device *pdev)
475 goto err_release_region; 519 goto err_release_region;
476 } 520 }
477 521
522 init_completion(&dev->cmd_complete);
478 dev->dev = get_device(&pdev->dev); 523 dev->dev = get_device(&pdev->dev);
479 dev->irq = irq->start; 524 dev->irq = irq->start;
480 platform_set_drvdata(pdev, dev); 525 platform_set_drvdata(pdev, dev);