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-rw-r--r--drivers/i2c/algos/Kconfig70
-rw-r--r--drivers/i2c/algos/Makefile14
-rw-r--r--drivers/i2c/algos/i2c-algo-bit.c573
-rw-r--r--drivers/i2c/algos/i2c-algo-ite.c812
-rw-r--r--drivers/i2c/algos/i2c-algo-ite.h117
-rw-r--r--drivers/i2c/algos/i2c-algo-pca.c399
-rw-r--r--drivers/i2c/algos/i2c-algo-pca.h26
-rw-r--r--drivers/i2c/algos/i2c-algo-pcf.c507
-rw-r--r--drivers/i2c/algos/i2c-algo-pcf.h76
-rw-r--r--drivers/i2c/algos/i2c-algo-sgi.c189
-rw-r--r--drivers/i2c/algos/i2c-algo-sibyte.c222
11 files changed, 3005 insertions, 0 deletions
diff --git a/drivers/i2c/algos/Kconfig b/drivers/i2c/algos/Kconfig
new file mode 100644
index 000000000000..30408015d231
--- /dev/null
+++ b/drivers/i2c/algos/Kconfig
@@ -0,0 +1,70 @@
1#
2# Character device configuration
3#
4
5menu "I2C Algorithms"
6 depends on I2C
7
8config I2C_ALGOBIT
9 tristate "I2C bit-banging interfaces"
10 depends on I2C
11 help
12 This allows you to use a range of I2C adapters called bit-banging
13 adapters. Say Y if you own an I2C adapter belonging to this class
14 and then say Y to the specific driver for you adapter below.
15
16 This support is also available as a module. If so, the module
17 will be called i2c-algo-bit.
18
19config I2C_ALGOPCF
20 tristate "I2C PCF 8584 interfaces"
21 depends on I2C
22 help
23 This allows you to use a range of I2C adapters called PCF adapters.
24 Say Y if you own an I2C adapter belonging to this class and then say
25 Y to the specific driver for you adapter below.
26
27 This support is also available as a module. If so, the module
28 will be called i2c-algo-pcf.
29
30config I2C_ALGOPCA
31 tristate "I2C PCA 9564 interfaces"
32 depends on I2C
33 help
34 This allows you to use a range of I2C adapters called PCA adapters.
35 Say Y if you own an I2C adapter belonging to this class and then say
36 Y to the specific driver for you adapter below.
37
38 This support is also available as a module. If so, the module
39 will be called i2c-algo-pca.
40
41config I2C_ALGOITE
42 tristate "ITE I2C Algorithm"
43 depends on MIPS_ITE8172 && I2C
44 help
45 This supports the use of the ITE8172 I2C interface found on some MIPS
46 systems. Say Y if you have one of these. You should also say Y for
47 the ITE I2C peripheral driver support below.
48
49 This support is also available as a module. If so, the module
50 will be called i2c-algo-ite.
51
52config I2C_ALGO8XX
53 tristate "MPC8xx CPM I2C interface"
54 depends on 8xx && I2C
55
56config I2C_ALGO_SIBYTE
57 tristate "SiByte SMBus interface"
58 depends on SIBYTE_SB1xxx_SOC && I2C
59 help
60 Supports the SiByte SOC on-chip I2C interfaces (2 channels).
61
62config I2C_ALGO_SGI
63 tristate "I2C SGI interfaces"
64 depends on I2C && (SGI_IP22 || SGI_IP32 || X86_VISWS)
65 help
66 Supports the SGI interfaces like the ones found on SGI Indy VINO
67 or SGI O2 MACE.
68
69endmenu
70
diff --git a/drivers/i2c/algos/Makefile b/drivers/i2c/algos/Makefile
new file mode 100644
index 000000000000..867fe1f67401
--- /dev/null
+++ b/drivers/i2c/algos/Makefile
@@ -0,0 +1,14 @@
1#
2# Makefile for the i2c algorithms
3#
4
5obj-$(CONFIG_I2C_ALGOBIT) += i2c-algo-bit.o
6obj-$(CONFIG_I2C_ALGOPCF) += i2c-algo-pcf.o
7obj-$(CONFIG_I2C_ALGOPCA) += i2c-algo-pca.o
8obj-$(CONFIG_I2C_ALGOITE) += i2c-algo-ite.o
9obj-$(CONFIG_I2C_ALGO_SIBYTE) += i2c-algo-sibyte.o
10obj-$(CONFIG_I2C_ALGO_SGI) += i2c-algo-sgi.o
11
12ifeq ($(CONFIG_I2C_DEBUG_ALGO),y)
13EXTRA_CFLAGS += -DDEBUG
14endif
diff --git a/drivers/i2c/algos/i2c-algo-bit.c b/drivers/i2c/algos/i2c-algo-bit.c
new file mode 100644
index 000000000000..fb5b732238ed
--- /dev/null
+++ b/drivers/i2c/algos/i2c-algo-bit.c
@@ -0,0 +1,573 @@
1/* ------------------------------------------------------------------------- */
2/* i2c-algo-bit.c i2c driver algorithms for bit-shift adapters */
3/* ------------------------------------------------------------------------- */
4/* Copyright (C) 1995-2000 Simon G. Vogl
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
19/* ------------------------------------------------------------------------- */
20
21/* With some changes from Frodo Looijaard <frodol@dds.nl>, Kyösti Mälkki
22 <kmalkki@cc.hut.fi> and Jean Delvare <khali@linux-fr.org> */
23
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/delay.h>
27#include <linux/slab.h>
28#include <linux/init.h>
29#include <linux/errno.h>
30#include <linux/sched.h>
31#include <linux/i2c.h>
32#include <linux/i2c-algo-bit.h>
33
34
35/* ----- global defines ----------------------------------------------- */
36#define DEB(x) if (i2c_debug>=1) x;
37#define DEB2(x) if (i2c_debug>=2) x;
38#define DEBSTAT(x) if (i2c_debug>=3) x; /* print several statistical values*/
39#define DEBPROTO(x) if (i2c_debug>=9) { x; }
40 /* debug the protocol by showing transferred bits */
41
42
43/* ----- global variables --------------------------------------------- */
44
45/* module parameters:
46 */
47static int i2c_debug;
48static int bit_test; /* see if the line-setting functions work */
49
50/* --- setting states on the bus with the right timing: --------------- */
51
52#define setsda(adap,val) adap->setsda(adap->data, val)
53#define setscl(adap,val) adap->setscl(adap->data, val)
54#define getsda(adap) adap->getsda(adap->data)
55#define getscl(adap) adap->getscl(adap->data)
56
57static inline void sdalo(struct i2c_algo_bit_data *adap)
58{
59 setsda(adap,0);
60 udelay(adap->udelay);
61}
62
63static inline void sdahi(struct i2c_algo_bit_data *adap)
64{
65 setsda(adap,1);
66 udelay(adap->udelay);
67}
68
69static inline void scllo(struct i2c_algo_bit_data *adap)
70{
71 setscl(adap,0);
72 udelay(adap->udelay);
73}
74
75/*
76 * Raise scl line, and do checking for delays. This is necessary for slower
77 * devices.
78 */
79static inline int sclhi(struct i2c_algo_bit_data *adap)
80{
81 unsigned long start;
82
83 setscl(adap,1);
84
85 /* Not all adapters have scl sense line... */
86 if (adap->getscl == NULL ) {
87 udelay(adap->udelay);
88 return 0;
89 }
90
91 start=jiffies;
92 while (! getscl(adap) ) {
93 /* the hw knows how to read the clock line,
94 * so we wait until it actually gets high.
95 * This is safer as some chips may hold it low
96 * while they are processing data internally.
97 */
98 if (time_after_eq(jiffies, start+adap->timeout)) {
99 return -ETIMEDOUT;
100 }
101 cond_resched();
102 }
103 DEBSTAT(printk(KERN_DEBUG "needed %ld jiffies\n", jiffies-start));
104 udelay(adap->udelay);
105 return 0;
106}
107
108
109/* --- other auxiliary functions -------------------------------------- */
110static void i2c_start(struct i2c_algo_bit_data *adap)
111{
112 /* assert: scl, sda are high */
113 DEBPROTO(printk("S "));
114 sdalo(adap);
115 scllo(adap);
116}
117
118static void i2c_repstart(struct i2c_algo_bit_data *adap)
119{
120 /* scl, sda may not be high */
121 DEBPROTO(printk(" Sr "));
122 setsda(adap,1);
123 sclhi(adap);
124 udelay(adap->udelay);
125
126 sdalo(adap);
127 scllo(adap);
128}
129
130
131static void i2c_stop(struct i2c_algo_bit_data *adap)
132{
133 DEBPROTO(printk("P\n"));
134 /* assert: scl is low */
135 sdalo(adap);
136 sclhi(adap);
137 sdahi(adap);
138}
139
140
141
142/* send a byte without start cond., look for arbitration,
143 check ackn. from slave */
144/* returns:
145 * 1 if the device acknowledged
146 * 0 if the device did not ack
147 * -ETIMEDOUT if an error occurred (while raising the scl line)
148 */
149static int i2c_outb(struct i2c_adapter *i2c_adap, char c)
150{
151 int i;
152 int sb;
153 int ack;
154 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
155
156 /* assert: scl is low */
157 for ( i=7 ; i>=0 ; i-- ) {
158 sb = c & ( 1 << i );
159 setsda(adap,sb);
160 udelay(adap->udelay);
161 DEBPROTO(printk(KERN_DEBUG "%d",sb!=0));
162 if (sclhi(adap)<0) { /* timed out */
163 sdahi(adap); /* we don't want to block the net */
164 DEB2(printk(KERN_DEBUG " i2c_outb: 0x%02x, timeout at bit #%d\n", c&0xff, i));
165 return -ETIMEDOUT;
166 };
167 /* do arbitration here:
168 * if ( sb && ! getsda(adap) ) -> ouch! Get out of here.
169 */
170 setscl(adap, 0 );
171 udelay(adap->udelay);
172 }
173 sdahi(adap);
174 if (sclhi(adap)<0){ /* timeout */
175 DEB2(printk(KERN_DEBUG " i2c_outb: 0x%02x, timeout at ack\n", c&0xff));
176 return -ETIMEDOUT;
177 };
178 /* read ack: SDA should be pulled down by slave */
179 ack=getsda(adap); /* ack: sda is pulled low ->success. */
180 DEB2(printk(KERN_DEBUG " i2c_outb: 0x%02x , getsda() = %d\n", c & 0xff, ack));
181
182 DEBPROTO( printk(KERN_DEBUG "[%2.2x]",c&0xff) );
183 DEBPROTO(if (0==ack){ printk(KERN_DEBUG " A ");} else printk(KERN_DEBUG " NA ") );
184 scllo(adap);
185 return 0==ack; /* return 1 if device acked */
186 /* assert: scl is low (sda undef) */
187}
188
189
190static int i2c_inb(struct i2c_adapter *i2c_adap)
191{
192 /* read byte via i2c port, without start/stop sequence */
193 /* acknowledge is sent in i2c_read. */
194 int i;
195 unsigned char indata=0;
196 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
197
198 /* assert: scl is low */
199 sdahi(adap);
200 for (i=0;i<8;i++) {
201 if (sclhi(adap)<0) { /* timeout */
202 DEB2(printk(KERN_DEBUG " i2c_inb: timeout at bit #%d\n", 7-i));
203 return -ETIMEDOUT;
204 };
205 indata *= 2;
206 if ( getsda(adap) )
207 indata |= 0x01;
208 scllo(adap);
209 }
210 /* assert: scl is low */
211 DEB2(printk(KERN_DEBUG "i2c_inb: 0x%02x\n", indata & 0xff));
212
213 DEBPROTO(printk(KERN_DEBUG " 0x%02x", indata & 0xff));
214 return (int) (indata & 0xff);
215}
216
217/*
218 * Sanity check for the adapter hardware - check the reaction of
219 * the bus lines only if it seems to be idle.
220 */
221static int test_bus(struct i2c_algo_bit_data *adap, char* name) {
222 int scl,sda;
223
224 if (adap->getscl==NULL)
225 printk(KERN_INFO "i2c-algo-bit.o: Testing SDA only, "
226 "SCL is not readable.\n");
227
228 sda=getsda(adap);
229 scl=(adap->getscl==NULL?1:getscl(adap));
230 printk(KERN_DEBUG "i2c-algo-bit.o: (0) scl=%d, sda=%d\n",scl,sda);
231 if (!scl || !sda ) {
232 printk(KERN_WARNING "i2c-algo-bit.o: %s seems to be busy.\n", name);
233 goto bailout;
234 }
235
236 sdalo(adap);
237 sda=getsda(adap);
238 scl=(adap->getscl==NULL?1:getscl(adap));
239 printk(KERN_DEBUG "i2c-algo-bit.o: (1) scl=%d, sda=%d\n",scl,sda);
240 if ( 0 != sda ) {
241 printk(KERN_WARNING "i2c-algo-bit.o: SDA stuck high!\n");
242 goto bailout;
243 }
244 if ( 0 == scl ) {
245 printk(KERN_WARNING "i2c-algo-bit.o: SCL unexpected low "
246 "while pulling SDA low!\n");
247 goto bailout;
248 }
249
250 sdahi(adap);
251 sda=getsda(adap);
252 scl=(adap->getscl==NULL?1:getscl(adap));
253 printk(KERN_DEBUG "i2c-algo-bit.o: (2) scl=%d, sda=%d\n",scl,sda);
254 if ( 0 == sda ) {
255 printk(KERN_WARNING "i2c-algo-bit.o: SDA stuck low!\n");
256 goto bailout;
257 }
258 if ( 0 == scl ) {
259 printk(KERN_WARNING "i2c-algo-bit.o: SCL unexpected low "
260 "while pulling SDA high!\n");
261 goto bailout;
262 }
263
264 scllo(adap);
265 sda=getsda(adap);
266 scl=(adap->getscl==NULL?0:getscl(adap));
267 printk(KERN_DEBUG "i2c-algo-bit.o: (3) scl=%d, sda=%d\n",scl,sda);
268 if ( 0 != scl ) {
269 printk(KERN_WARNING "i2c-algo-bit.o: SCL stuck high!\n");
270 goto bailout;
271 }
272 if ( 0 == sda ) {
273 printk(KERN_WARNING "i2c-algo-bit.o: SDA unexpected low "
274 "while pulling SCL low!\n");
275 goto bailout;
276 }
277
278 sclhi(adap);
279 sda=getsda(adap);
280 scl=(adap->getscl==NULL?1:getscl(adap));
281 printk(KERN_DEBUG "i2c-algo-bit.o: (4) scl=%d, sda=%d\n",scl,sda);
282 if ( 0 == scl ) {
283 printk(KERN_WARNING "i2c-algo-bit.o: SCL stuck low!\n");
284 goto bailout;
285 }
286 if ( 0 == sda ) {
287 printk(KERN_WARNING "i2c-algo-bit.o: SDA unexpected low "
288 "while pulling SCL high!\n");
289 goto bailout;
290 }
291 printk(KERN_INFO "i2c-algo-bit.o: %s passed test.\n",name);
292 return 0;
293bailout:
294 sdahi(adap);
295 sclhi(adap);
296 return -ENODEV;
297}
298
299/* ----- Utility functions
300 */
301
302/* try_address tries to contact a chip for a number of
303 * times before it gives up.
304 * return values:
305 * 1 chip answered
306 * 0 chip did not answer
307 * -x transmission error
308 */
309static inline int try_address(struct i2c_adapter *i2c_adap,
310 unsigned char addr, int retries)
311{
312 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
313 int i,ret = -1;
314 for (i=0;i<=retries;i++) {
315 ret = i2c_outb(i2c_adap,addr);
316 if (ret==1)
317 break; /* success! */
318 i2c_stop(adap);
319 udelay(5/*adap->udelay*/);
320 if (i==retries) /* no success */
321 break;
322 i2c_start(adap);
323 udelay(adap->udelay);
324 }
325 DEB2(if (i)
326 printk(KERN_DEBUG "i2c-algo-bit.o: Used %d tries to %s client at 0x%02x : %s\n",
327 i+1, addr & 1 ? "read" : "write", addr>>1,
328 ret==1 ? "success" : ret==0 ? "no ack" : "failed, timeout?" )
329 );
330 return ret;
331}
332
333static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
334{
335 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
336 char c;
337 const char *temp = msg->buf;
338 int count = msg->len;
339 unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
340 int retval;
341 int wrcount=0;
342
343 while (count > 0) {
344 c = *temp;
345 DEB2(dev_dbg(&i2c_adap->dev, "sendbytes: writing %2.2X\n", c&0xff));
346 retval = i2c_outb(i2c_adap,c);
347 if ((retval>0) || (nak_ok && (retval==0))) { /* ok or ignored NAK */
348 count--;
349 temp++;
350 wrcount++;
351 } else { /* arbitration or no acknowledge */
352 dev_err(&i2c_adap->dev, "sendbytes: error - bailout.\n");
353 i2c_stop(adap);
354 return (retval<0)? retval : -EFAULT;
355 /* got a better one ?? */
356 }
357#if 0
358 /* from asm/delay.h */
359 __delay(adap->mdelay * (loops_per_sec / 1000) );
360#endif
361 }
362 return wrcount;
363}
364
365static inline int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
366{
367 int inval;
368 int rdcount=0; /* counts bytes read */
369 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
370 char *temp = msg->buf;
371 int count = msg->len;
372
373 while (count > 0) {
374 inval = i2c_inb(i2c_adap);
375/*printk("%#02x ",inval); if ( ! (count % 16) ) printk("\n"); */
376 if (inval>=0) {
377 *temp = inval;
378 rdcount++;
379 } else { /* read timed out */
380 printk(KERN_ERR "i2c-algo-bit.o: readbytes: i2c_inb timed out.\n");
381 break;
382 }
383
384 temp++;
385 count--;
386
387 if (msg->flags & I2C_M_NO_RD_ACK)
388 continue;
389
390 if ( count > 0 ) { /* send ack */
391 sdalo(adap);
392 DEBPROTO(printk(" Am "));
393 } else {
394 sdahi(adap); /* neg. ack on last byte */
395 DEBPROTO(printk(" NAm "));
396 }
397 if (sclhi(adap)<0) { /* timeout */
398 sdahi(adap);
399 printk(KERN_ERR "i2c-algo-bit.o: readbytes: Timeout at ack\n");
400 return -ETIMEDOUT;
401 };
402 scllo(adap);
403 sdahi(adap);
404 }
405 return rdcount;
406}
407
408/* doAddress initiates the transfer by generating the start condition (in
409 * try_address) and transmits the address in the necessary format to handle
410 * reads, writes as well as 10bit-addresses.
411 * returns:
412 * 0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set
413 * -x an error occurred (like: -EREMOTEIO if the device did not answer, or
414 * -ETIMEDOUT, for example if the lines are stuck...)
415 */
416static inline int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
417{
418 unsigned short flags = msg->flags;
419 unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
420 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
421
422 unsigned char addr;
423 int ret, retries;
424
425 retries = nak_ok ? 0 : i2c_adap->retries;
426
427 if ( (flags & I2C_M_TEN) ) {
428 /* a ten bit address */
429 addr = 0xf0 | (( msg->addr >> 7) & 0x03);
430 DEB2(printk(KERN_DEBUG "addr0: %d\n",addr));
431 /* try extended address code...*/
432 ret = try_address(i2c_adap, addr, retries);
433 if ((ret != 1) && !nak_ok) {
434 printk(KERN_ERR "died at extended address code.\n");
435 return -EREMOTEIO;
436 }
437 /* the remaining 8 bit address */
438 ret = i2c_outb(i2c_adap,msg->addr & 0x7f);
439 if ((ret != 1) && !nak_ok) {
440 /* the chip did not ack / xmission error occurred */
441 printk(KERN_ERR "died at 2nd address code.\n");
442 return -EREMOTEIO;
443 }
444 if ( flags & I2C_M_RD ) {
445 i2c_repstart(adap);
446 /* okay, now switch into reading mode */
447 addr |= 0x01;
448 ret = try_address(i2c_adap, addr, retries);
449 if ((ret!=1) && !nak_ok) {
450 printk(KERN_ERR "died at extended address code.\n");
451 return -EREMOTEIO;
452 }
453 }
454 } else { /* normal 7bit address */
455 addr = ( msg->addr << 1 );
456 if (flags & I2C_M_RD )
457 addr |= 1;
458 if (flags & I2C_M_REV_DIR_ADDR )
459 addr ^= 1;
460 ret = try_address(i2c_adap, addr, retries);
461 if ((ret!=1) && !nak_ok)
462 return -EREMOTEIO;
463 }
464
465 return 0;
466}
467
468static int bit_xfer(struct i2c_adapter *i2c_adap,
469 struct i2c_msg msgs[], int num)
470{
471 struct i2c_msg *pmsg;
472 struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
473
474 int i,ret;
475 unsigned short nak_ok;
476
477 i2c_start(adap);
478 for (i=0;i<num;i++) {
479 pmsg = &msgs[i];
480 nak_ok = pmsg->flags & I2C_M_IGNORE_NAK;
481 if (!(pmsg->flags & I2C_M_NOSTART)) {
482 if (i) {
483 i2c_repstart(adap);
484 }
485 ret = bit_doAddress(i2c_adap, pmsg);
486 if ((ret != 0) && !nak_ok) {
487 DEB2(printk(KERN_DEBUG "i2c-algo-bit.o: NAK from device addr %2.2x msg #%d\n"
488 ,msgs[i].addr,i));
489 return (ret<0) ? ret : -EREMOTEIO;
490 }
491 }
492 if (pmsg->flags & I2C_M_RD ) {
493 /* read bytes into buffer*/
494 ret = readbytes(i2c_adap, pmsg);
495 DEB2(printk(KERN_DEBUG "i2c-algo-bit.o: read %d bytes.\n",ret));
496 if (ret < pmsg->len ) {
497 return (ret<0)? ret : -EREMOTEIO;
498 }
499 } else {
500 /* write bytes from buffer */
501 ret = sendbytes(i2c_adap, pmsg);
502 DEB2(printk(KERN_DEBUG "i2c-algo-bit.o: wrote %d bytes.\n",ret));
503 if (ret < pmsg->len ) {
504 return (ret<0) ? ret : -EREMOTEIO;
505 }
506 }
507 }
508 i2c_stop(adap);
509 return num;
510}
511
512static u32 bit_func(struct i2c_adapter *adap)
513{
514 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
515 I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING;
516}
517
518
519/* -----exported algorithm data: ------------------------------------- */
520
521static struct i2c_algorithm i2c_bit_algo = {
522 .name = "Bit-shift algorithm",
523 .id = I2C_ALGO_BIT,
524 .master_xfer = bit_xfer,
525 .functionality = bit_func,
526};
527
528/*
529 * registering functions to load algorithms at runtime
530 */
531int i2c_bit_add_bus(struct i2c_adapter *adap)
532{
533 struct i2c_algo_bit_data *bit_adap = adap->algo_data;
534
535 if (bit_test) {
536 int ret = test_bus(bit_adap, adap->name);
537 if (ret<0)
538 return -ENODEV;
539 }
540
541 DEB2(dev_dbg(&adap->dev, "hw routines registered.\n"));
542
543 /* register new adapter to i2c module... */
544
545 adap->id |= i2c_bit_algo.id;
546 adap->algo = &i2c_bit_algo;
547
548 adap->timeout = 100; /* default values, should */
549 adap->retries = 3; /* be replaced by defines */
550
551 i2c_add_adapter(adap);
552 return 0;
553}
554
555
556int i2c_bit_del_bus(struct i2c_adapter *adap)
557{
558 return i2c_del_adapter(adap);
559}
560
561EXPORT_SYMBOL(i2c_bit_add_bus);
562EXPORT_SYMBOL(i2c_bit_del_bus);
563
564MODULE_AUTHOR("Simon G. Vogl <simon@tk.uni-linz.ac.at>");
565MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm");
566MODULE_LICENSE("GPL");
567
568module_param(bit_test, bool, 0);
569module_param(i2c_debug, int, S_IRUGO | S_IWUSR);
570
571MODULE_PARM_DESC(bit_test, "Test the lines of the bus to see if it is stuck");
572MODULE_PARM_DESC(i2c_debug,
573 "debug level - 0 off; 1 normal; 2,3 more verbose; 9 bit-protocol");
diff --git a/drivers/i2c/algos/i2c-algo-ite.c b/drivers/i2c/algos/i2c-algo-ite.c
new file mode 100644
index 000000000000..68e9e6832ca0
--- /dev/null
+++ b/drivers/i2c/algos/i2c-algo-ite.c
@@ -0,0 +1,812 @@
1/*
2 -------------------------------------------------------------------------
3 i2c-algo-ite.c i2c driver algorithms for ITE adapters
4
5 Hai-Pao Fan, MontaVista Software, Inc.
6 hpfan@mvista.com or source@mvista.com
7
8 Copyright 2000 MontaVista Software Inc.
9
10 ---------------------------------------------------------------------------
11 This file was highly leveraged from i2c-algo-pcf.c, which was created
12 by Simon G. Vogl and Hans Berglund:
13
14
15 Copyright (C) 1995-1997 Simon G. Vogl
16 1998-2000 Hans Berglund
17
18 This program is free software; you can redistribute it and/or modify
19 it under the terms of the GNU General Public License as published by
20 the Free Software Foundation; either version 2 of the License, or
21 (at your option) any later version.
22
23 This program is distributed in the hope that it will be useful,
24 but WITHOUT ANY WARRANTY; without even the implied warranty of
25 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 GNU General Public License for more details.
27
28 You should have received a copy of the GNU General Public License
29 along with this program; if not, write to the Free Software
30 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
31/* ------------------------------------------------------------------------- */
32
33/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
34 Frodo Looijaard <frodol@dds.nl> ,and also from Martin Bailey
35 <mbailey@littlefeet-inc.com> */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/delay.h>
40#include <linux/slab.h>
41#include <linux/init.h>
42#include <asm/uaccess.h>
43#include <linux/ioport.h>
44#include <linux/errno.h>
45#include <linux/sched.h>
46
47#include <linux/i2c.h>
48#include <linux/i2c-algo-ite.h>
49#include "i2c-algo-ite.h"
50
51#define PM_DSR IT8172_PCI_IO_BASE + IT_PM_DSR
52#define PM_IBSR IT8172_PCI_IO_BASE + IT_PM_DSR + 0x04
53#define GPIO_CCR IT8172_PCI_IO_BASE + IT_GPCCR
54
55#define DEB2(x) if (i2c_debug>=2) x
56#define DEB3(x) if (i2c_debug>=3) x /* print several statistical values*/
57#define DEF_TIMEOUT 16
58
59
60/* module parameters:
61 */
62static int i2c_debug;
63static int iic_test; /* see if the line-setting functions work */
64
65/* --- setting states on the bus with the right timing: --------------- */
66
67#define get_clock(adap) adap->getclock(adap->data)
68#define iic_outw(adap, reg, val) adap->setiic(adap->data, reg, val)
69#define iic_inw(adap, reg) adap->getiic(adap->data, reg)
70
71
72/* --- other auxiliary functions -------------------------------------- */
73
74static void iic_start(struct i2c_algo_iic_data *adap)
75{
76 iic_outw(adap,ITE_I2CHCR,ITE_CMD);
77}
78
79static void iic_stop(struct i2c_algo_iic_data *adap)
80{
81 iic_outw(adap,ITE_I2CHCR,0);
82 iic_outw(adap,ITE_I2CHSR,ITE_I2CHSR_TDI);
83}
84
85static void iic_reset(struct i2c_algo_iic_data *adap)
86{
87 iic_outw(adap, PM_IBSR, iic_inw(adap, PM_IBSR) | 0x80);
88}
89
90
91static int wait_for_bb(struct i2c_algo_iic_data *adap)
92{
93 int timeout = DEF_TIMEOUT;
94 short status;
95
96 status = iic_inw(adap, ITE_I2CHSR);
97#ifndef STUB_I2C
98 while (timeout-- && (status & ITE_I2CHSR_HB)) {
99 udelay(1000); /* How much is this? */
100 status = iic_inw(adap, ITE_I2CHSR);
101 }
102#endif
103 if (timeout<=0) {
104 printk(KERN_ERR "Timeout, host is busy\n");
105 iic_reset(adap);
106 }
107 return(timeout<=0);
108}
109
110/* After we issue a transaction on the IIC bus, this function
111 * is called. It puts this process to sleep until we get an interrupt from
112 * from the controller telling us that the transaction we requested in complete.
113 */
114static int wait_for_pin(struct i2c_algo_iic_data *adap, short *status) {
115
116 int timeout = DEF_TIMEOUT;
117
118 timeout = wait_for_bb(adap);
119 if (timeout) {
120 DEB2(printk("Timeout waiting for host not busy\n");)
121 return -EIO;
122 }
123 timeout = DEF_TIMEOUT;
124
125 *status = iic_inw(adap, ITE_I2CHSR);
126#ifndef STUB_I2C
127 while (timeout-- && !(*status & ITE_I2CHSR_TDI)) {
128 adap->waitforpin();
129 *status = iic_inw(adap, ITE_I2CHSR);
130 }
131#endif
132 if (timeout <= 0)
133 return(-1);
134 else
135 return(0);
136}
137
138static int wait_for_fe(struct i2c_algo_iic_data *adap, short *status)
139{
140 int timeout = DEF_TIMEOUT;
141
142 *status = iic_inw(adap, ITE_I2CFSR);
143#ifndef STUB_I2C
144 while (timeout-- && (*status & ITE_I2CFSR_FE)) {
145 udelay(1000);
146 iic_inw(adap, ITE_I2CFSR);
147 }
148#endif
149 if (timeout <= 0)
150 return(-1);
151 else
152 return(0);
153}
154
155static int iic_init (struct i2c_algo_iic_data *adap)
156{
157 short i;
158
159 /* Clear bit 7 to set I2C to normal operation mode */
160 i=iic_inw(adap, PM_DSR)& 0xff7f;
161 iic_outw(adap, PM_DSR, i);
162
163 /* set IT_GPCCR port C bit 2&3 as function 2 */
164 i = iic_inw(adap, GPIO_CCR) & 0xfc0f;
165 iic_outw(adap,GPIO_CCR,i);
166
167 /* Clear slave address/sub-address */
168 iic_outw(adap,ITE_I2CSAR, 0);
169 iic_outw(adap,ITE_I2CSSAR, 0);
170
171 /* Set clock counter register */
172 iic_outw(adap,ITE_I2CCKCNT, get_clock(adap));
173
174 /* Set START/reSTART/STOP time registers */
175 iic_outw(adap,ITE_I2CSHDR, 0x0a);
176 iic_outw(adap,ITE_I2CRSUR, 0x0a);
177 iic_outw(adap,ITE_I2CPSUR, 0x0a);
178
179 /* Enable interrupts on completing the current transaction */
180 iic_outw(adap,ITE_I2CHCR, ITE_I2CHCR_IE | ITE_I2CHCR_HCE);
181
182 /* Clear transfer count */
183 iic_outw(adap,ITE_I2CFBCR, 0x0);
184
185 DEB2(printk("iic_init: Initialized IIC on ITE 0x%x\n",
186 iic_inw(adap, ITE_I2CHSR)));
187 return 0;
188}
189
190
191/*
192 * Sanity check for the adapter hardware - check the reaction of
193 * the bus lines only if it seems to be idle.
194 */
195static int test_bus(struct i2c_algo_iic_data *adap, char *name) {
196#if 0
197 int scl,sda;
198 sda=getsda(adap);
199 if (adap->getscl==NULL) {
200 printk("test_bus: Warning: Adapter can't read from clock line - skipping test.\n");
201 return 0;
202 }
203 scl=getscl(adap);
204 printk("test_bus: Adapter: %s scl: %d sda: %d -- testing...\n",
205 name,getscl(adap),getsda(adap));
206 if (!scl || !sda ) {
207 printk("test_bus: %s seems to be busy.\n",adap->name);
208 goto bailout;
209 }
210 sdalo(adap);
211 printk("test_bus:1 scl: %d sda: %d \n",getscl(adap),
212 getsda(adap));
213 if ( 0 != getsda(adap) ) {
214 printk("test_bus: %s SDA stuck high!\n",name);
215 sdahi(adap);
216 goto bailout;
217 }
218 if ( 0 == getscl(adap) ) {
219 printk("test_bus: %s SCL unexpected low while pulling SDA low!\n",
220 name);
221 goto bailout;
222 }
223 sdahi(adap);
224 printk("test_bus:2 scl: %d sda: %d \n",getscl(adap),
225 getsda(adap));
226 if ( 0 == getsda(adap) ) {
227 printk("test_bus: %s SDA stuck low!\n",name);
228 sdahi(adap);
229 goto bailout;
230 }
231 if ( 0 == getscl(adap) ) {
232 printk("test_bus: %s SCL unexpected low while SDA high!\n",
233 adap->name);
234 goto bailout;
235 }
236 scllo(adap);
237 printk("test_bus:3 scl: %d sda: %d \n",getscl(adap),
238 getsda(adap));
239 if ( 0 != getscl(adap) ) {
240
241 sclhi(adap);
242 goto bailout;
243 }
244 if ( 0 == getsda(adap) ) {
245 printk("test_bus: %s SDA unexpected low while pulling SCL low!\n",
246 name);
247 goto bailout;
248 }
249 sclhi(adap);
250 printk("test_bus:4 scl: %d sda: %d \n",getscl(adap),
251 getsda(adap));
252 if ( 0 == getscl(adap) ) {
253 printk("test_bus: %s SCL stuck low!\n",name);
254 sclhi(adap);
255 goto bailout;
256 }
257 if ( 0 == getsda(adap) ) {
258 printk("test_bus: %s SDA unexpected low while SCL high!\n",
259 name);
260 goto bailout;
261 }
262 printk("test_bus: %s passed test.\n",name);
263 return 0;
264bailout:
265 sdahi(adap);
266 sclhi(adap);
267 return -ENODEV;
268#endif
269 return (0);
270}
271
272/* ----- Utility functions
273 */
274
275
276/* Verify the device we want to talk to on the IIC bus really exists. */
277static inline int try_address(struct i2c_algo_iic_data *adap,
278 unsigned int addr, int retries)
279{
280 int i, ret = -1;
281 short status;
282
283 for (i=0;i<retries;i++) {
284 iic_outw(adap, ITE_I2CSAR, addr);
285 iic_start(adap);
286 if (wait_for_pin(adap, &status) == 0) {
287 if ((status & ITE_I2CHSR_DNE) == 0) {
288 iic_stop(adap);
289 iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
290 ret=1;
291 break; /* success! */
292 }
293 }
294 iic_stop(adap);
295 udelay(adap->udelay);
296 }
297 DEB2(if (i) printk("try_address: needed %d retries for 0x%x\n",i,
298 addr));
299 return ret;
300}
301
302
303static int iic_sendbytes(struct i2c_adapter *i2c_adap,const char *buf,
304 int count)
305{
306 struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
307 int wrcount=0, timeout;
308 short status;
309 int loops, remainder, i, j;
310 union {
311 char byte[2];
312 unsigned short word;
313 } tmp;
314
315 iic_outw(adap, ITE_I2CSSAR, (unsigned short)buf[wrcount++]);
316 count--;
317 if (count == 0)
318 return -EIO;
319
320 loops = count / 32; /* 32-byte FIFO */
321 remainder = count % 32;
322
323 if(loops) {
324 for(i=0; i<loops; i++) {
325
326 iic_outw(adap, ITE_I2CFBCR, 32);
327 for(j=0; j<32/2; j++) {
328 tmp.byte[1] = buf[wrcount++];
329 tmp.byte[0] = buf[wrcount++];
330 iic_outw(adap, ITE_I2CFDR, tmp.word);
331 }
332
333 /* status FIFO overrun */
334 iic_inw(adap, ITE_I2CFSR);
335 iic_inw(adap, ITE_I2CFBCR);
336
337 iic_outw(adap, ITE_I2CHCR, ITE_WRITE); /* Issue WRITE command */
338
339 /* Wait for transmission to complete */
340 timeout = wait_for_pin(adap, &status);
341 if(timeout) {
342 iic_stop(adap);
343 printk("iic_sendbytes: %s write timeout.\n", i2c_adap->name);
344 return -EREMOTEIO; /* got a better one ?? */
345 }
346 if (status & ITE_I2CHSR_DB) {
347 iic_stop(adap);
348 printk("iic_sendbytes: %s write error - no ack.\n", i2c_adap->name);
349 return -EREMOTEIO; /* got a better one ?? */
350 }
351 }
352 }
353 if(remainder) {
354 iic_outw(adap, ITE_I2CFBCR, remainder);
355 for(i=0; i<remainder/2; i++) {
356 tmp.byte[1] = buf[wrcount++];
357 tmp.byte[0] = buf[wrcount++];
358 iic_outw(adap, ITE_I2CFDR, tmp.word);
359 }
360
361 /* status FIFO overrun */
362 iic_inw(adap, ITE_I2CFSR);
363 iic_inw(adap, ITE_I2CFBCR);
364
365 iic_outw(adap, ITE_I2CHCR, ITE_WRITE); /* Issue WRITE command */
366
367 timeout = wait_for_pin(adap, &status);
368 if(timeout) {
369 iic_stop(adap);
370 printk("iic_sendbytes: %s write timeout.\n", i2c_adap->name);
371 return -EREMOTEIO; /* got a better one ?? */
372 }
373#ifndef STUB_I2C
374 if (status & ITE_I2CHSR_DB) {
375 iic_stop(adap);
376 printk("iic_sendbytes: %s write error - no ack.\n", i2c_adap->name);
377 return -EREMOTEIO; /* got a better one ?? */
378 }
379#endif
380 }
381 iic_stop(adap);
382 return wrcount;
383}
384
385
386static int iic_readbytes(struct i2c_adapter *i2c_adap, char *buf, int count,
387 int sread)
388{
389 int rdcount=0, i, timeout;
390 short status;
391 struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
392 int loops, remainder, j;
393 union {
394 char byte[2];
395 unsigned short word;
396 } tmp;
397
398 loops = count / 32; /* 32-byte FIFO */
399 remainder = count % 32;
400
401 if(loops) {
402 for(i=0; i<loops; i++) {
403 iic_outw(adap, ITE_I2CFBCR, 32);
404 if (sread)
405 iic_outw(adap, ITE_I2CHCR, ITE_SREAD);
406 else
407 iic_outw(adap, ITE_I2CHCR, ITE_READ); /* Issue READ command */
408
409 timeout = wait_for_pin(adap, &status);
410 if(timeout) {
411 iic_stop(adap);
412 printk("iic_readbytes: %s read timeout.\n", i2c_adap->name);
413 return (-1);
414 }
415#ifndef STUB_I2C
416 if (status & ITE_I2CHSR_DB) {
417 iic_stop(adap);
418 printk("iic_readbytes: %s read error - no ack.\n", i2c_adap->name);
419 return (-1);
420 }
421#endif
422
423 timeout = wait_for_fe(adap, &status);
424 if(timeout) {
425 iic_stop(adap);
426 printk("iic_readbytes: %s FIFO is empty\n", i2c_adap->name);
427 return (-1);
428 }
429
430 for(j=0; j<32/2; j++) {
431 tmp.word = iic_inw(adap, ITE_I2CFDR);
432 buf[rdcount++] = tmp.byte[1];
433 buf[rdcount++] = tmp.byte[0];
434 }
435
436 /* status FIFO underrun */
437 iic_inw(adap, ITE_I2CFSR);
438
439 }
440 }
441
442
443 if(remainder) {
444 remainder=(remainder+1)/2 * 2;
445 iic_outw(adap, ITE_I2CFBCR, remainder);
446 if (sread)
447 iic_outw(adap, ITE_I2CHCR, ITE_SREAD);
448 else
449 iic_outw(adap, ITE_I2CHCR, ITE_READ); /* Issue READ command */
450
451 timeout = wait_for_pin(adap, &status);
452 if(timeout) {
453 iic_stop(adap);
454 printk("iic_readbytes: %s read timeout.\n", i2c_adap->name);
455 return (-1);
456 }
457#ifndef STUB_I2C
458 if (status & ITE_I2CHSR_DB) {
459 iic_stop(adap);
460 printk("iic_readbytes: %s read error - no ack.\n", i2c_adap->name);
461 return (-1);
462 }
463#endif
464 timeout = wait_for_fe(adap, &status);
465 if(timeout) {
466 iic_stop(adap);
467 printk("iic_readbytes: %s FIFO is empty\n", i2c_adap->name);
468 return (-1);
469 }
470
471 for(i=0; i<(remainder+1)/2; i++) {
472 tmp.word = iic_inw(adap, ITE_I2CFDR);
473 buf[rdcount++] = tmp.byte[1];
474 buf[rdcount++] = tmp.byte[0];
475 }
476
477 /* status FIFO underrun */
478 iic_inw(adap, ITE_I2CFSR);
479
480 }
481
482 iic_stop(adap);
483 return rdcount;
484}
485
486
487/* This function implements combined transactions. Combined
488 * transactions consist of combinations of reading and writing blocks of data.
489 * Each transfer (i.e. a read or a write) is separated by a repeated start
490 * condition.
491 */
492#if 0
493static int iic_combined_transaction(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num)
494{
495 int i;
496 struct i2c_msg *pmsg;
497 int ret;
498
499 DEB2(printk("Beginning combined transaction\n"));
500
501 for(i=0; i<(num-1); i++) {
502 pmsg = &msgs[i];
503 if(pmsg->flags & I2C_M_RD) {
504 DEB2(printk(" This one is a read\n"));
505 ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_COMBINED_XFER);
506 }
507 else if(!(pmsg->flags & I2C_M_RD)) {
508 DEB2(printk("This one is a write\n"));
509 ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_COMBINED_XFER);
510 }
511 }
512 /* Last read or write segment needs to be terminated with a stop */
513 pmsg = &msgs[i];
514
515 if(pmsg->flags & I2C_M_RD) {
516 DEB2(printk("Doing the last read\n"));
517 ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_SINGLE_XFER);
518 }
519 else if(!(pmsg->flags & I2C_M_RD)) {
520 DEB2(printk("Doing the last write\n"));
521 ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len, IIC_SINGLE_XFER);
522 }
523
524 return ret;
525}
526#endif
527
528
529/* Whenever we initiate a transaction, the first byte clocked
530 * onto the bus after the start condition is the address (7 bit) of the
531 * device we want to talk to. This function manipulates the address specified
532 * so that it makes sense to the hardware when written to the IIC peripheral.
533 *
534 * Note: 10 bit addresses are not supported in this driver, although they are
535 * supported by the hardware. This functionality needs to be implemented.
536 */
537static inline int iic_doAddress(struct i2c_algo_iic_data *adap,
538 struct i2c_msg *msg, int retries)
539{
540 unsigned short flags = msg->flags;
541 unsigned int addr;
542 int ret;
543
544/* Ten bit addresses not supported right now */
545 if ( (flags & I2C_M_TEN) ) {
546#if 0
547 addr = 0xf0 | (( msg->addr >> 7) & 0x03);
548 DEB2(printk("addr0: %d\n",addr));
549 ret = try_address(adap, addr, retries);
550 if (ret!=1) {
551 printk("iic_doAddress: died at extended address code.\n");
552 return -EREMOTEIO;
553 }
554 iic_outw(adap,msg->addr & 0x7f);
555 if (ret != 1) {
556 printk("iic_doAddress: died at 2nd address code.\n");
557 return -EREMOTEIO;
558 }
559 if ( flags & I2C_M_RD ) {
560 i2c_repstart(adap);
561 addr |= 0x01;
562 ret = try_address(adap, addr, retries);
563 if (ret!=1) {
564 printk("iic_doAddress: died at extended address code.\n");
565 return -EREMOTEIO;
566 }
567 }
568#endif
569 } else {
570
571 addr = ( msg->addr << 1 );
572
573#if 0
574 if (flags & I2C_M_RD )
575 addr |= 1;
576 if (flags & I2C_M_REV_DIR_ADDR )
577 addr ^= 1;
578#endif
579
580 if (iic_inw(adap, ITE_I2CSAR) != addr) {
581 iic_outw(adap, ITE_I2CSAR, addr);
582 ret = try_address(adap, addr, retries);
583 if (ret!=1) {
584 printk("iic_doAddress: died at address code.\n");
585 return -EREMOTEIO;
586 }
587 }
588
589 }
590
591 return 0;
592}
593
594
595/* Description: Prepares the controller for a transaction (clearing status
596 * registers, data buffers, etc), and then calls either iic_readbytes or
597 * iic_sendbytes to do the actual transaction.
598 *
599 * still to be done: Before we issue a transaction, we should
600 * verify that the bus is not busy or in some unknown state.
601 */
602static int iic_xfer(struct i2c_adapter *i2c_adap,
603 struct i2c_msg *msgs,
604 int num)
605{
606 struct i2c_algo_iic_data *adap = i2c_adap->algo_data;
607 struct i2c_msg *pmsg;
608 int i = 0;
609 int ret, timeout;
610
611 pmsg = &msgs[i];
612
613 if(!pmsg->len) {
614 DEB2(printk("iic_xfer: read/write length is 0\n");)
615 return -EIO;
616 }
617 if(!(pmsg->flags & I2C_M_RD) && (!(pmsg->len)%2) ) {
618 DEB2(printk("iic_xfer: write buffer length is not odd\n");)
619 return -EIO;
620 }
621
622 /* Wait for any pending transfers to complete */
623 timeout = wait_for_bb(adap);
624 if (timeout) {
625 DEB2(printk("iic_xfer: Timeout waiting for host not busy\n");)
626 return -EIO;
627 }
628
629 /* Flush FIFO */
630 iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
631
632 /* Load address */
633 ret = iic_doAddress(adap, pmsg, i2c_adap->retries);
634 if (ret)
635 return -EIO;
636
637#if 0
638 /* Combined transaction (read and write) */
639 if(num > 1) {
640 DEB2(printk("iic_xfer: Call combined transaction\n"));
641 ret = iic_combined_transaction(i2c_adap, msgs, num);
642 }
643#endif
644
645 DEB3(printk("iic_xfer: Msg %d, addr=0x%x, flags=0x%x, len=%d\n",
646 i, msgs[i].addr, msgs[i].flags, msgs[i].len);)
647
648 if(pmsg->flags & I2C_M_RD) /* Read */
649 ret = iic_readbytes(i2c_adap, pmsg->buf, pmsg->len, 0);
650 else { /* Write */
651 udelay(1000);
652 ret = iic_sendbytes(i2c_adap, pmsg->buf, pmsg->len);
653 }
654
655 if (ret != pmsg->len)
656 DEB3(printk("iic_xfer: error or fail on read/write %d bytes.\n",ret));
657 else
658 DEB3(printk("iic_xfer: read/write %d bytes.\n",ret));
659
660 return ret;
661}
662
663
664/* Implements device specific ioctls. Higher level ioctls can
665 * be found in i2c-core.c and are typical of any i2c controller (specifying
666 * slave address, timeouts, etc). These ioctls take advantage of any hardware
667 * features built into the controller for which this algorithm-adapter set
668 * was written. These ioctls allow you to take control of the data and clock
669 * lines and set the either high or low,
670 * similar to a GPIO pin.
671 */
672static int algo_control(struct i2c_adapter *adapter,
673 unsigned int cmd, unsigned long arg)
674{
675
676 struct i2c_algo_iic_data *adap = adapter->algo_data;
677 struct i2c_iic_msg s_msg;
678 char *buf;
679 int ret;
680
681 if (cmd == I2C_SREAD) {
682 if(copy_from_user(&s_msg, (struct i2c_iic_msg *)arg,
683 sizeof(struct i2c_iic_msg)))
684 return -EFAULT;
685 buf = kmalloc(s_msg.len, GFP_KERNEL);
686 if (buf== NULL)
687 return -ENOMEM;
688
689 /* Flush FIFO */
690 iic_outw(adap, ITE_I2CFCR, ITE_I2CFCR_FLUSH);
691
692 /* Load address */
693 iic_outw(adap, ITE_I2CSAR,s_msg.addr<<1);
694 iic_outw(adap, ITE_I2CSSAR,s_msg.waddr & 0xff);
695
696 ret = iic_readbytes(adapter, buf, s_msg.len, 1);
697 if (ret>=0) {
698 if(copy_to_user( s_msg.buf, buf, s_msg.len) )
699 ret = -EFAULT;
700 }
701 kfree(buf);
702 }
703 return 0;
704}
705
706
707static u32 iic_func(struct i2c_adapter *adap)
708{
709 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR |
710 I2C_FUNC_PROTOCOL_MANGLING;
711}
712
713/* -----exported algorithm data: ------------------------------------- */
714
715static struct i2c_algorithm iic_algo = {
716 .name = "ITE IIC algorithm",
717 .id = I2C_ALGO_IIC,
718 .master_xfer = iic_xfer,
719 .algo_control = algo_control, /* ioctl */
720 .functionality = iic_func,
721};
722
723
724/*
725 * registering functions to load algorithms at runtime
726 */
727int i2c_iic_add_bus(struct i2c_adapter *adap)
728{
729 struct i2c_algo_iic_data *iic_adap = adap->algo_data;
730
731 if (iic_test) {
732 int ret = test_bus(iic_adap, adap->name);
733 if (ret<0)
734 return -ENODEV;
735 }
736
737 DEB2(printk("i2c-algo-ite: hw routines for %s registered.\n",
738 adap->name));
739
740 /* register new adapter to i2c module... */
741
742 adap->id |= iic_algo.id;
743 adap->algo = &iic_algo;
744
745 adap->timeout = 100; /* default values, should */
746 adap->retries = 3; /* be replaced by defines */
747 adap->flags = 0;
748
749 i2c_add_adapter(adap);
750 iic_init(iic_adap);
751
752 return 0;
753}
754
755
756int i2c_iic_del_bus(struct i2c_adapter *adap)
757{
758 int res;
759 if ((res = i2c_del_adapter(adap)) < 0)
760 return res;
761 DEB2(printk("i2c-algo-ite: adapter unregistered: %s\n",adap->name));
762
763 return 0;
764}
765
766
767int __init i2c_algo_iic_init (void)
768{
769 printk(KERN_INFO "ITE iic (i2c) algorithm module\n");
770 return 0;
771}
772
773
774void i2c_algo_iic_exit(void)
775{
776 return;
777}
778
779
780EXPORT_SYMBOL(i2c_iic_add_bus);
781EXPORT_SYMBOL(i2c_iic_del_bus);
782
783/* The MODULE_* macros resolve to nothing if MODULES is not defined
784 * when this file is compiled.
785 */
786MODULE_AUTHOR("MontaVista Software <www.mvista.com>");
787MODULE_DESCRIPTION("ITE iic algorithm");
788MODULE_LICENSE("GPL");
789
790module_param(iic_test, bool, 0);
791module_param(i2c_debug, int, S_IRUGO | S_IWUSR);
792
793MODULE_PARM_DESC(iic_test, "Test if the I2C bus is available");
794MODULE_PARM_DESC(i2c_debug,
795 "debug level - 0 off; 1 normal; 2,3 more verbose; 9 iic-protocol");
796
797
798/* This function resolves to init_module (the function invoked when a module
799 * is loaded via insmod) when this file is compiled with MODULES defined.
800 * Otherwise (i.e. if you want this driver statically linked to the kernel),
801 * a pointer to this function is stored in a table and called
802 * during the initialization of the kernel (in do_basic_setup in /init/main.c)
803 *
804 * All this functionality is complements of the macros defined in linux/init.h
805 */
806module_init(i2c_algo_iic_init);
807
808
809/* If MODULES is defined when this file is compiled, then this function will
810 * resolved to cleanup_module.
811 */
812module_exit(i2c_algo_iic_exit);
diff --git a/drivers/i2c/algos/i2c-algo-ite.h b/drivers/i2c/algos/i2c-algo-ite.h
new file mode 100644
index 000000000000..a8ca3c9b546a
--- /dev/null
+++ b/drivers/i2c/algos/i2c-algo-ite.h
@@ -0,0 +1,117 @@
1/*
2 --------------------------------------------------------------------
3 i2c-ite.h: Global defines for the I2C controller on board the
4 ITE MIPS processor.
5 --------------------------------------------------------------------
6 Hai-Pao Fan, MontaVista Software, Inc.
7 hpfan@mvista.com or source@mvista.com
8
9 Copyright 2001 MontaVista Software Inc.
10
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
19 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
22 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
23 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 *
27 * You should have received a copy of the GNU General Public License along
28 * with this program; if not, write to the Free Software Foundation, Inc.,
29 * 675 Mass Ave, Cambridge, MA 02139, USA.
30
31 */
32
33#ifndef I2C_ITE_H
34#define I2C_ITE_H 1
35
36#include <asm/it8172/it8172.h>
37
38/* I2C Registers */
39#define ITE_I2CHCR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x30
40#define ITE_I2CHSR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x34
41#define ITE_I2CSAR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x38
42#define ITE_I2CSSAR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x3c
43#define ITE_I2CCKCNT IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x48
44#define ITE_I2CSHDR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x4c
45#define ITE_I2CRSUR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x50
46#define ITE_I2CPSUR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x54
47
48#define ITE_I2CFDR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x70
49#define ITE_I2CFBCR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x74
50#define ITE_I2CFCR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x78
51#define ITE_I2CFSR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x7c
52
53
54/* Host Control Register ITE_I2CHCR */
55#define ITE_I2CHCR_HCE 0x01 /* Enable I2C Host Controller */
56#define ITE_I2CHCR_IE 0x02 /* Enable the interrupt after completing
57 the current transaction */
58#define ITE_I2CHCR_CP_W 0x00 /* bit2-4 000 - Write */
59#define ITE_I2CHCR_CP_R 0x08 /* 010 - Current address read */
60#define ITE_I2CHCR_CP_S 0x10 /* 100 - Sequential read */
61#define ITE_I2CHCR_ST 0x20 /* Initiates the I2C host controller to execute
62 the command and send the data programmed in
63 all required registers to I2C bus */
64#define ITE_CMD ITE_I2CHCR_HCE | ITE_I2CHCR_IE | ITE_I2CHCR_ST
65#define ITE_WRITE ITE_CMD | ITE_I2CHCR_CP_W
66#define ITE_READ ITE_CMD | ITE_I2CHCR_CP_R
67#define ITE_SREAD ITE_CMD | ITE_I2CHCR_CP_S
68
69/* Host Status Register ITE_I2CHSR */
70#define ITE_I2CHSR_DB 0x01 /* Device is busy, receives NACK response except
71 in the first and last bytes */
72#define ITE_I2CHSR_DNE 0x02 /* Target address on I2C bus does not exist */
73#define ITE_I2CHSR_TDI 0x04 /* R/W Transaction on I2C bus was completed */
74#define ITE_I2CHSR_HB 0x08 /* Host controller is processing transactions */
75#define ITE_I2CHSR_FER 0x10 /* Error occurs in the FIFO */
76
77/* Slave Address Register ITE_I2CSAR */
78#define ITE_I2CSAR_SA_MASK 0xfe /* Target I2C device address */
79#define ITE_I2CSAR_ASO 0x0100 /* Output 1/0 to I2CAS port when the
80 next slave address is addressed */
81
82/* Slave Sub-address Register ITE_I2CSSAR */
83#define ITE_I2CSSAR_SUBA_MASK 0xff /* Target I2C device sub-address */
84
85/* Clock Counter Register ITE_I2CCKCNT */
86#define ITE_I2CCKCNT_STOP 0x00 /* stop I2C clock */
87#define ITE_I2CCKCNT_HPCC_MASK 0x7f /* SCL high period counter */
88#define ITE_I2CCKCNT_LPCC_MASK 0x7f00 /* SCL low period counter */
89
90/* START Hold Time Register ITE_I2CSHDR */
91/* value is counted based on 16 MHz internal clock */
92#define ITE_I2CSHDR_FM 0x0a /* START condition at fast mode */
93#define ITE_I2CSHDR_SM 0x47 /* START contition at standard mode */
94
95/* (Repeated) START Setup Time Register ITE_I2CRSUR */
96/* value is counted based on 16 MHz internal clock */
97#define ITE_I2CRSUR_FM 0x0a /* repeated START condition at fast mode */
98#define ITE_I2CRSUR_SM 0x50 /* repeated START condition at standard mode */
99
100/* STOP setup Time Register ITE_I2CPSUR */
101
102/* FIFO Data Register ITE_I2CFDR */
103#define ITE_I2CFDR_MASK 0xff
104
105/* FIFO Byte Count Register ITE_I2CFBCR */
106#define ITE_I2CFBCR_MASK 0x3f
107
108/* FIFO Control Register ITE_I2CFCR */
109#define ITE_I2CFCR_FLUSH 0x01 /* Flush FIFO and reset the FIFO point
110 and I2CFSR */
111/* FIFO Status Register ITE_I2CFSR */
112#define ITE_I2CFSR_FO 0x01 /* FIFO is overrun when write */
113#define ITE_I2CFSR_FU 0x02 /* FIFO is underrun when read */
114#define ITE_I2CFSR_FF 0x04 /* FIFO is full when write */
115#define ITE_I2CFSR_FE 0x08 /* FIFO is empty when read */
116
117#endif /* I2C_ITE_H */
diff --git a/drivers/i2c/algos/i2c-algo-pca.c b/drivers/i2c/algos/i2c-algo-pca.c
new file mode 100644
index 000000000000..c3d912cbbbc3
--- /dev/null
+++ b/drivers/i2c/algos/i2c-algo-pca.c
@@ -0,0 +1,399 @@
1/*
2 * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
3 * Copyright (C) 2004 Arcom Control Systems
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 */
19
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/moduleparam.h>
23#include <linux/delay.h>
24#include <linux/slab.h>
25#include <linux/init.h>
26#include <linux/errno.h>
27#include <linux/i2c.h>
28#include <linux/i2c-algo-pca.h>
29#include "i2c-algo-pca.h"
30
31#define DRIVER "i2c-algo-pca"
32
33#define DEB1(fmt, args...) do { if (i2c_debug>=1) printk(fmt, ## args); } while(0)
34#define DEB2(fmt, args...) do { if (i2c_debug>=2) printk(fmt, ## args); } while(0)
35#define DEB3(fmt, args...) do { if (i2c_debug>=3) printk(fmt, ## args); } while(0)
36
37static int i2c_debug=0;
38
39#define pca_outw(adap, reg, val) adap->write_byte(adap, reg, val)
40#define pca_inw(adap, reg) adap->read_byte(adap, reg)
41
42#define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
43#define pca_clock(adap) adap->get_clock(adap)
44#define pca_own(adap) adap->get_own(adap)
45#define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
46#define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
47#define pca_wait(adap) adap->wait_for_interrupt(adap)
48
49/*
50 * Generate a start condition on the i2c bus.
51 *
52 * returns after the start condition has occured
53 */
54static void pca_start(struct i2c_algo_pca_data *adap)
55{
56 int sta = pca_get_con(adap);
57 DEB2("=== START\n");
58 sta |= I2C_PCA_CON_STA;
59 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
60 pca_set_con(adap, sta);
61 pca_wait(adap);
62}
63
64/*
65 * Generate a repeated start condition on the i2c bus
66 *
67 * return after the repeated start condition has occured
68 */
69static void pca_repeated_start(struct i2c_algo_pca_data *adap)
70{
71 int sta = pca_get_con(adap);
72 DEB2("=== REPEATED START\n");
73 sta |= I2C_PCA_CON_STA;
74 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
75 pca_set_con(adap, sta);
76 pca_wait(adap);
77}
78
79/*
80 * Generate a stop condition on the i2c bus
81 *
82 * returns after the stop condition has been generated
83 *
84 * STOPs do not generate an interrupt or set the SI flag, since the
85 * part returns the the idle state (0xf8). Hence we don't need to
86 * pca_wait here.
87 */
88static void pca_stop(struct i2c_algo_pca_data *adap)
89{
90 int sta = pca_get_con(adap);
91 DEB2("=== STOP\n");
92 sta |= I2C_PCA_CON_STO;
93 sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
94 pca_set_con(adap, sta);
95}
96
97/*
98 * Send the slave address and R/W bit
99 *
100 * returns after the address has been sent
101 */
102static void pca_address(struct i2c_algo_pca_data *adap,
103 struct i2c_msg *msg)
104{
105 int sta = pca_get_con(adap);
106 int addr;
107
108 addr = ( (0x7f & msg->addr) << 1 );
109 if (msg->flags & I2C_M_RD )
110 addr |= 1;
111 DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
112 msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
113
114 pca_outw(adap, I2C_PCA_DAT, addr);
115
116 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
117 pca_set_con(adap, sta);
118
119 pca_wait(adap);
120}
121
122/*
123 * Transmit a byte.
124 *
125 * Returns after the byte has been transmitted
126 */
127static void pca_tx_byte(struct i2c_algo_pca_data *adap,
128 __u8 b)
129{
130 int sta = pca_get_con(adap);
131 DEB2("=== WRITE %#04x\n", b);
132 pca_outw(adap, I2C_PCA_DAT, b);
133
134 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
135 pca_set_con(adap, sta);
136
137 pca_wait(adap);
138}
139
140/*
141 * Receive a byte
142 *
143 * returns immediately.
144 */
145static void pca_rx_byte(struct i2c_algo_pca_data *adap,
146 __u8 *b, int ack)
147{
148 *b = pca_inw(adap, I2C_PCA_DAT);
149 DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
150}
151
152/*
153 * Setup ACK or NACK for next received byte and wait for it to arrive.
154 *
155 * Returns after next byte has arrived.
156 */
157static void pca_rx_ack(struct i2c_algo_pca_data *adap,
158 int ack)
159{
160 int sta = pca_get_con(adap);
161
162 sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);
163
164 if ( ack )
165 sta |= I2C_PCA_CON_AA;
166
167 pca_set_con(adap, sta);
168 pca_wait(adap);
169}
170
171/*
172 * Reset the i2c bus / SIO
173 */
174static void pca_reset(struct i2c_algo_pca_data *adap)
175{
176 /* apparently only an external reset will do it. not a lot can be done */
177 printk(KERN_ERR DRIVER ": Haven't figured out how to do a reset yet\n");
178}
179
180static int pca_xfer(struct i2c_adapter *i2c_adap,
181 struct i2c_msg *msgs,
182 int num)
183{
184 struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
185 struct i2c_msg *msg = NULL;
186 int curmsg;
187 int numbytes = 0;
188 int state;
189 int ret;
190
191 state = pca_status(adap);
192 if ( state != 0xF8 ) {
193 dev_dbg(&i2c_adap->dev, "bus is not idle. status is %#04x\n", state );
194 /* FIXME: what to do. Force stop ? */
195 return -EREMOTEIO;
196 }
197
198 DEB1("{{{ XFER %d messages\n", num);
199
200 if (i2c_debug>=2) {
201 for (curmsg = 0; curmsg < num; curmsg++) {
202 int addr, i;
203 msg = &msgs[curmsg];
204
205 addr = (0x7f & msg->addr) ;
206
207 if (msg->flags & I2C_M_RD )
208 printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
209 curmsg, msg->len, addr, (addr<<1) | 1);
210 else {
211 printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
212 curmsg, msg->len, addr, addr<<1,
213 msg->len == 0 ? "" : ", ");
214 for(i=0; i < msg->len; i++)
215 printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
216 printk("]\n");
217 }
218 }
219 }
220
221 curmsg = 0;
222 ret = -EREMOTEIO;
223 while (curmsg < num) {
224 state = pca_status(adap);
225
226 DEB3("STATE is 0x%02x\n", state);
227 msg = &msgs[curmsg];
228
229 switch (state) {
230 case 0xf8: /* On reset or stop the bus is idle */
231 pca_start(adap);
232 break;
233
234 case 0x08: /* A START condition has been transmitted */
235 case 0x10: /* A repeated start condition has been transmitted */
236 pca_address(adap, msg);
237 break;
238
239 case 0x18: /* SLA+W has been transmitted; ACK has been received */
240 case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
241 if (numbytes < msg->len) {
242 pca_tx_byte(adap, msg->buf[numbytes]);
243 numbytes++;
244 break;
245 }
246 curmsg++; numbytes = 0;
247 if (curmsg == num)
248 pca_stop(adap);
249 else
250 pca_repeated_start(adap);
251 break;
252
253 case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
254 DEB2("NOT ACK received after SLA+W\n");
255 pca_stop(adap);
256 goto out;
257
258 case 0x40: /* SLA+R has been transmitted; ACK has been received */
259 pca_rx_ack(adap, msg->len > 1);
260 break;
261
262 case 0x50: /* Data bytes has been received; ACK has been returned */
263 if (numbytes < msg->len) {
264 pca_rx_byte(adap, &msg->buf[numbytes], 1);
265 numbytes++;
266 pca_rx_ack(adap, numbytes < msg->len - 1);
267 break;
268 }
269 curmsg++; numbytes = 0;
270 if (curmsg == num)
271 pca_stop(adap);
272 else
273 pca_repeated_start(adap);
274 break;
275
276 case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
277 DEB2("NOT ACK received after SLA+R\n");
278 pca_stop(adap);
279 goto out;
280
281 case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
282 DEB2("NOT ACK received after data byte\n");
283 goto out;
284
285 case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
286 DEB2("Arbitration lost\n");
287 goto out;
288
289 case 0x58: /* Data byte has been received; NOT ACK has been returned */
290 if ( numbytes == msg->len - 1 ) {
291 pca_rx_byte(adap, &msg->buf[numbytes], 0);
292 curmsg++; numbytes = 0;
293 if (curmsg == num)
294 pca_stop(adap);
295 else
296 pca_repeated_start(adap);
297 } else {
298 DEB2("NOT ACK sent after data byte received. "
299 "Not final byte. numbytes %d. len %d\n",
300 numbytes, msg->len);
301 pca_stop(adap);
302 goto out;
303 }
304 break;
305 case 0x70: /* Bus error - SDA stuck low */
306 DEB2("BUS ERROR - SDA Stuck low\n");
307 pca_reset(adap);
308 goto out;
309 case 0x90: /* Bus error - SCL stuck low */
310 DEB2("BUS ERROR - SCL Stuck low\n");
311 pca_reset(adap);
312 goto out;
313 case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
314 DEB2("BUS ERROR - Illegal START or STOP\n");
315 pca_reset(adap);
316 goto out;
317 default:
318 printk(KERN_ERR DRIVER ": unhandled SIO state 0x%02x\n", state);
319 break;
320 }
321
322 }
323
324 ret = curmsg;
325 out:
326 DEB1(KERN_CRIT "}}} transfered %d/%d messages. "
327 "status is %#04x. control is %#04x\n",
328 curmsg, num, pca_status(adap),
329 pca_get_con(adap));
330 return ret;
331}
332
333static u32 pca_func(struct i2c_adapter *adap)
334{
335 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
336}
337
338static int pca_init(struct i2c_algo_pca_data *adap)
339{
340 static int freqs[] = {330,288,217,146,88,59,44,36};
341 int own, clock;
342
343 own = pca_own(adap);
344 clock = pca_clock(adap);
345 DEB1(KERN_INFO DRIVER ": own address is %#04x\n", own);
346 DEB1(KERN_INFO DRIVER ": clock freqeuncy is %dkHz\n", freqs[clock]);
347
348 pca_outw(adap, I2C_PCA_ADR, own << 1);
349
350 pca_set_con(adap, I2C_PCA_CON_ENSIO | clock);
351 udelay(500); /* 500 µs for oscilator to stabilise */
352
353 return 0;
354}
355
356static struct i2c_algorithm pca_algo = {
357 .name = "PCA9564 algorithm",
358 .id = I2C_ALGO_PCA,
359 .master_xfer = pca_xfer,
360 .functionality = pca_func,
361};
362
363/*
364 * registering functions to load algorithms at runtime
365 */
366int i2c_pca_add_bus(struct i2c_adapter *adap)
367{
368 struct i2c_algo_pca_data *pca_adap = adap->algo_data;
369 int rval;
370
371 /* register new adapter to i2c module... */
372
373 adap->id |= pca_algo.id;
374 adap->algo = &pca_algo;
375
376 adap->timeout = 100; /* default values, should */
377 adap->retries = 3; /* be replaced by defines */
378
379 rval = pca_init(pca_adap);
380
381 if (!rval)
382 i2c_add_adapter(adap);
383
384 return rval;
385}
386
387int i2c_pca_del_bus(struct i2c_adapter *adap)
388{
389 return i2c_del_adapter(adap);
390}
391
392EXPORT_SYMBOL(i2c_pca_add_bus);
393EXPORT_SYMBOL(i2c_pca_del_bus);
394
395MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>");
396MODULE_DESCRIPTION("I2C-Bus PCA9564 algorithm");
397MODULE_LICENSE("GPL");
398
399module_param(i2c_debug, int, 0);
diff --git a/drivers/i2c/algos/i2c-algo-pca.h b/drivers/i2c/algos/i2c-algo-pca.h
new file mode 100644
index 000000000000..2fee07e05211
--- /dev/null
+++ b/drivers/i2c/algos/i2c-algo-pca.h
@@ -0,0 +1,26 @@
1#ifndef I2C_PCA9564_H
2#define I2C_PCA9564_H 1
3
4#define I2C_PCA_STA 0x00 /* STATUS Read Only */
5#define I2C_PCA_TO 0x00 /* TIMEOUT Write Only */
6#define I2C_PCA_DAT 0x01 /* DATA Read/Write */
7#define I2C_PCA_ADR 0x02 /* OWN ADR Read/Write */
8#define I2C_PCA_CON 0x03 /* CONTROL Read/Write */
9
10#define I2C_PCA_CON_AA 0x80 /* Assert Acknowledge */
11#define I2C_PCA_CON_ENSIO 0x40 /* Enable */
12#define I2C_PCA_CON_STA 0x20 /* Start */
13#define I2C_PCA_CON_STO 0x10 /* Stop */
14#define I2C_PCA_CON_SI 0x08 /* Serial Interrupt */
15#define I2C_PCA_CON_CR 0x07 /* Clock Rate (MASK) */
16
17#define I2C_PCA_CON_330kHz 0x00
18#define I2C_PCA_CON_288kHz 0x01
19#define I2C_PCA_CON_217kHz 0x02
20#define I2C_PCA_CON_146kHz 0x03
21#define I2C_PCA_CON_88kHz 0x04
22#define I2C_PCA_CON_59kHz 0x05
23#define I2C_PCA_CON_44kHz 0x06
24#define I2C_PCA_CON_36kHz 0x07
25
26#endif /* I2C_PCA9564_H */
diff --git a/drivers/i2c/algos/i2c-algo-pcf.c b/drivers/i2c/algos/i2c-algo-pcf.c
new file mode 100644
index 000000000000..8d087dac32af
--- /dev/null
+++ b/drivers/i2c/algos/i2c-algo-pcf.c
@@ -0,0 +1,507 @@
1/* ------------------------------------------------------------------------- */
2/* i2c-algo-pcf.c i2c driver algorithms for PCF8584 adapters */
3/* ------------------------------------------------------------------------- */
4/* Copyright (C) 1995-1997 Simon G. Vogl
5 1998-2000 Hans Berglund
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
20/* ------------------------------------------------------------------------- */
21
22/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and
23 Frodo Looijaard <frodol@dds.nl> ,and also from Martin Bailey
24 <mbailey@littlefeet-inc.com> */
25
26/* Partially rewriten by Oleg I. Vdovikin <vdovikin@jscc.ru> to handle multiple
27 messages, proper stop/repstart signaling during receive,
28 added detect code */
29
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/delay.h>
33#include <linux/slab.h>
34#include <linux/init.h>
35#include <linux/errno.h>
36#include <linux/i2c.h>
37#include <linux/i2c-algo-pcf.h>
38#include "i2c-algo-pcf.h"
39
40
41#define DEB2(x) if (i2c_debug>=2) x
42#define DEB3(x) if (i2c_debug>=3) x /* print several statistical values*/
43#define DEBPROTO(x) if (i2c_debug>=9) x;
44 /* debug the protocol by showing transferred bits */
45#define DEF_TIMEOUT 16
46
47/* module parameters:
48 */
49static int i2c_debug;
50
51/* --- setting states on the bus with the right timing: --------------- */
52
53#define set_pcf(adap, ctl, val) adap->setpcf(adap->data, ctl, val)
54#define get_pcf(adap, ctl) adap->getpcf(adap->data, ctl)
55#define get_own(adap) adap->getown(adap->data)
56#define get_clock(adap) adap->getclock(adap->data)
57#define i2c_outb(adap, val) adap->setpcf(adap->data, 0, val)
58#define i2c_inb(adap) adap->getpcf(adap->data, 0)
59
60/* --- other auxiliary functions -------------------------------------- */
61
62static void i2c_start(struct i2c_algo_pcf_data *adap)
63{
64 DEBPROTO(printk("S "));
65 set_pcf(adap, 1, I2C_PCF_START);
66}
67
68static void i2c_repstart(struct i2c_algo_pcf_data *adap)
69{
70 DEBPROTO(printk(" Sr "));
71 set_pcf(adap, 1, I2C_PCF_REPSTART);
72}
73
74
75static void i2c_stop(struct i2c_algo_pcf_data *adap)
76{
77 DEBPROTO(printk("P\n"));
78 set_pcf(adap, 1, I2C_PCF_STOP);
79}
80
81static int wait_for_bb(struct i2c_algo_pcf_data *adap) {
82
83 int timeout = DEF_TIMEOUT;
84 int status;
85
86 status = get_pcf(adap, 1);
87#ifndef STUB_I2C
88 while (timeout-- && !(status & I2C_PCF_BB)) {
89 udelay(100); /* wait for 100 us */
90 status = get_pcf(adap, 1);
91 }
92#endif
93 if (timeout <= 0) {
94 printk(KERN_ERR "Timeout waiting for Bus Busy\n");
95 }
96
97 return (timeout<=0);
98}
99
100
101static int wait_for_pin(struct i2c_algo_pcf_data *adap, int *status) {
102
103 int timeout = DEF_TIMEOUT;
104
105 *status = get_pcf(adap, 1);
106#ifndef STUB_I2C
107 while (timeout-- && (*status & I2C_PCF_PIN)) {
108 adap->waitforpin();
109 *status = get_pcf(adap, 1);
110 }
111 if (*status & I2C_PCF_LAB) {
112 DEB2(printk(KERN_INFO
113 "i2c-algo-pcf.o: lost arbitration (CSR 0x%02x)\n",
114 *status));
115 /* Cleanup from LAB-- reset and enable ESO.
116 * This resets the PCF8584; since we've lost the bus, no
117 * further attempts should be made by callers to clean up
118 * (no i2c_stop() etc.)
119 */
120 set_pcf(adap, 1, I2C_PCF_PIN);
121 set_pcf(adap, 1, I2C_PCF_ESO);
122 /* TODO: we should pause for a time period sufficient for any
123 * running I2C transaction to complete-- the arbitration
124 * logic won't work properly until the next START is seen.
125 */
126 DEB2(printk(KERN_INFO
127 "i2c-algo-pcf.o: reset LAB condition (CSR 0x%02x)\n",
128 get_pcf(adap,1)));
129 return(-EINTR);
130 }
131#endif
132 if (timeout <= 0)
133 return(-1);
134 else
135 return(0);
136}
137
138/*
139 * This should perform the 'PCF8584 initialization sequence' as described
140 * in the Philips IC12 data book (1995, Aug 29).
141 * There should be a 30 clock cycle wait after reset, I assume this
142 * has been fulfilled.
143 * There should be a delay at the end equal to the longest I2C message
144 * to synchronize the BB-bit (in multimaster systems). How long is
145 * this? I assume 1 second is always long enough.
146 *
147 * vdovikin: added detect code for PCF8584
148 */
149static int pcf_init_8584 (struct i2c_algo_pcf_data *adap)
150{
151 unsigned char temp;
152
153 DEB3(printk(KERN_DEBUG "i2c-algo-pcf.o: PCF state 0x%02x\n", get_pcf(adap, 1)));
154
155 /* S1=0x80: S0 selected, serial interface off */
156 set_pcf(adap, 1, I2C_PCF_PIN);
157 /* check to see S1 now used as R/W ctrl -
158 PCF8584 does that when ESO is zero */
159 if (((temp = get_pcf(adap, 1)) & 0x7f) != (0)) {
160 DEB2(printk(KERN_ERR "i2c-algo-pcf.o: PCF detection failed -- can't select S0 (0x%02x).\n", temp));
161 return -ENXIO; /* definetly not PCF8584 */
162 }
163
164 /* load own address in S0, effective address is (own << 1) */
165 i2c_outb(adap, get_own(adap));
166 /* check it's really written */
167 if ((temp = i2c_inb(adap)) != get_own(adap)) {
168 DEB2(printk(KERN_ERR "i2c-algo-pcf.o: PCF detection failed -- can't set S0 (0x%02x).\n", temp));
169 return -ENXIO;
170 }
171
172 /* S1=0xA0, next byte in S2 */
173 set_pcf(adap, 1, I2C_PCF_PIN | I2C_PCF_ES1);
174 /* check to see S2 now selected */
175 if (((temp = get_pcf(adap, 1)) & 0x7f) != I2C_PCF_ES1) {
176 DEB2(printk(KERN_ERR "i2c-algo-pcf.o: PCF detection failed -- can't select S2 (0x%02x).\n", temp));
177 return -ENXIO;
178 }
179
180 /* load clock register S2 */
181 i2c_outb(adap, get_clock(adap));
182 /* check it's really written, the only 5 lowest bits does matter */
183 if (((temp = i2c_inb(adap)) & 0x1f) != get_clock(adap)) {
184 DEB2(printk(KERN_ERR "i2c-algo-pcf.o: PCF detection failed -- can't set S2 (0x%02x).\n", temp));
185 return -ENXIO;
186 }
187
188 /* Enable serial interface, idle, S0 selected */
189 set_pcf(adap, 1, I2C_PCF_IDLE);
190
191 /* check to see PCF is really idled and we can access status register */
192 if ((temp = get_pcf(adap, 1)) != (I2C_PCF_PIN | I2C_PCF_BB)) {
193 DEB2(printk(KERN_ERR "i2c-algo-pcf.o: PCF detection failed -- can't select S1` (0x%02x).\n", temp));
194 return -ENXIO;
195 }
196
197 printk(KERN_DEBUG "i2c-algo-pcf.o: deteted and initialized PCF8584.\n");
198
199 return 0;
200}
201
202
203/* ----- Utility functions
204 */
205
206static inline int try_address(struct i2c_algo_pcf_data *adap,
207 unsigned char addr, int retries)
208{
209 int i, status, ret = -1;
210 int wfp;
211 for (i=0;i<retries;i++) {
212 i2c_outb(adap, addr);
213 i2c_start(adap);
214 status = get_pcf(adap, 1);
215 if ((wfp = wait_for_pin(adap, &status)) >= 0) {
216 if ((status & I2C_PCF_LRB) == 0) {
217 i2c_stop(adap);
218 break; /* success! */
219 }
220 }
221 if (wfp == -EINTR) {
222 /* arbitration lost */
223 udelay(adap->udelay);
224 return -EINTR;
225 }
226 i2c_stop(adap);
227 udelay(adap->udelay);
228 }
229 DEB2(if (i) printk(KERN_DEBUG "i2c-algo-pcf.o: needed %d retries for %d\n",i,
230 addr));
231 return ret;
232}
233
234
235static int pcf_sendbytes(struct i2c_adapter *i2c_adap, const char *buf,
236 int count, int last)
237{
238 struct i2c_algo_pcf_data *adap = i2c_adap->algo_data;
239 int wrcount, status, timeout;
240
241 for (wrcount=0; wrcount<count; ++wrcount) {
242 DEB2(dev_dbg(&i2c_adap->dev, "i2c_write: writing %2.2X\n",
243 buf[wrcount]&0xff));
244 i2c_outb(adap, buf[wrcount]);
245 timeout = wait_for_pin(adap, &status);
246 if (timeout) {
247 if (timeout == -EINTR) {
248 /* arbitration lost */
249 return -EINTR;
250 }
251 i2c_stop(adap);
252 dev_err(&i2c_adap->dev, "i2c_write: error - timeout.\n");
253 return -EREMOTEIO; /* got a better one ?? */
254 }
255#ifndef STUB_I2C
256 if (status & I2C_PCF_LRB) {
257 i2c_stop(adap);
258 dev_err(&i2c_adap->dev, "i2c_write: error - no ack.\n");
259 return -EREMOTEIO; /* got a better one ?? */
260 }
261#endif
262 }
263 if (last) {
264 i2c_stop(adap);
265 }
266 else {
267 i2c_repstart(adap);
268 }
269
270 return (wrcount);
271}
272
273
274static int pcf_readbytes(struct i2c_adapter *i2c_adap, char *buf,
275 int count, int last)
276{
277 int i, status;
278 struct i2c_algo_pcf_data *adap = i2c_adap->algo_data;
279 int wfp;
280
281 /* increment number of bytes to read by one -- read dummy byte */
282 for (i = 0; i <= count; i++) {
283
284 if ((wfp = wait_for_pin(adap, &status))) {
285 if (wfp == -EINTR) {
286 /* arbitration lost */
287 return -EINTR;
288 }
289 i2c_stop(adap);
290 dev_err(&i2c_adap->dev, "pcf_readbytes timed out.\n");
291 return (-1);
292 }
293
294#ifndef STUB_I2C
295 if ((status & I2C_PCF_LRB) && (i != count)) {
296 i2c_stop(adap);
297 dev_err(&i2c_adap->dev, "i2c_read: i2c_inb, No ack.\n");
298 return (-1);
299 }
300#endif
301
302 if (i == count - 1) {
303 set_pcf(adap, 1, I2C_PCF_ESO);
304 } else
305 if (i == count) {
306 if (last) {
307 i2c_stop(adap);
308 } else {
309 i2c_repstart(adap);
310 }
311 };
312
313 if (i) {
314 buf[i - 1] = i2c_inb(adap);
315 } else {
316 i2c_inb(adap); /* dummy read */
317 }
318 }
319
320 return (i - 1);
321}
322
323
324static inline int pcf_doAddress(struct i2c_algo_pcf_data *adap,
325 struct i2c_msg *msg, int retries)
326{
327 unsigned short flags = msg->flags;
328 unsigned char addr;
329 int ret;
330 if ( (flags & I2C_M_TEN) ) {
331 /* a ten bit address */
332 addr = 0xf0 | (( msg->addr >> 7) & 0x03);
333 DEB2(printk(KERN_DEBUG "addr0: %d\n",addr));
334 /* try extended address code...*/
335 ret = try_address(adap, addr, retries);
336 if (ret!=1) {
337 printk(KERN_ERR "died at extended address code.\n");
338 return -EREMOTEIO;
339 }
340 /* the remaining 8 bit address */
341 i2c_outb(adap,msg->addr & 0x7f);
342/* Status check comes here */
343 if (ret != 1) {
344 printk(KERN_ERR "died at 2nd address code.\n");
345 return -EREMOTEIO;
346 }
347 if ( flags & I2C_M_RD ) {
348 i2c_repstart(adap);
349 /* okay, now switch into reading mode */
350 addr |= 0x01;
351 ret = try_address(adap, addr, retries);
352 if (ret!=1) {
353 printk(KERN_ERR "died at extended address code.\n");
354 return -EREMOTEIO;
355 }
356 }
357 } else { /* normal 7bit address */
358 addr = ( msg->addr << 1 );
359 if (flags & I2C_M_RD )
360 addr |= 1;
361 if (flags & I2C_M_REV_DIR_ADDR )
362 addr ^= 1;
363 i2c_outb(adap, addr);
364 }
365 return 0;
366}
367
368static int pcf_xfer(struct i2c_adapter *i2c_adap,
369 struct i2c_msg *msgs,
370 int num)
371{
372 struct i2c_algo_pcf_data *adap = i2c_adap->algo_data;
373 struct i2c_msg *pmsg;
374 int i;
375 int ret=0, timeout, status;
376
377
378 /* Check for bus busy */
379 timeout = wait_for_bb(adap);
380 if (timeout) {
381 DEB2(printk(KERN_ERR "i2c-algo-pcf.o: "
382 "Timeout waiting for BB in pcf_xfer\n");)
383 return -EIO;
384 }
385
386 for (i = 0;ret >= 0 && i < num; i++) {
387 pmsg = &msgs[i];
388
389 DEB2(printk(KERN_DEBUG "i2c-algo-pcf.o: Doing %s %d bytes to 0x%02x - %d of %d messages\n",
390 pmsg->flags & I2C_M_RD ? "read" : "write",
391 pmsg->len, pmsg->addr, i + 1, num);)
392
393 ret = pcf_doAddress(adap, pmsg, i2c_adap->retries);
394
395 /* Send START */
396 if (i == 0) {
397 i2c_start(adap);
398 }
399
400 /* Wait for PIN (pending interrupt NOT) */
401 timeout = wait_for_pin(adap, &status);
402 if (timeout) {
403 if (timeout == -EINTR) {
404 /* arbitration lost */
405 return (-EINTR);
406 }
407 i2c_stop(adap);
408 DEB2(printk(KERN_ERR "i2c-algo-pcf.o: Timeout waiting "
409 "for PIN(1) in pcf_xfer\n");)
410 return (-EREMOTEIO);
411 }
412
413#ifndef STUB_I2C
414 /* Check LRB (last rcvd bit - slave ack) */
415 if (status & I2C_PCF_LRB) {
416 i2c_stop(adap);
417 DEB2(printk(KERN_ERR "i2c-algo-pcf.o: No LRB(1) in pcf_xfer\n");)
418 return (-EREMOTEIO);
419 }
420#endif
421
422 DEB3(printk(KERN_DEBUG "i2c-algo-pcf.o: Msg %d, addr=0x%x, flags=0x%x, len=%d\n",
423 i, msgs[i].addr, msgs[i].flags, msgs[i].len);)
424
425 /* Read */
426 if (pmsg->flags & I2C_M_RD) {
427 /* read bytes into buffer*/
428 ret = pcf_readbytes(i2c_adap, pmsg->buf, pmsg->len,
429 (i + 1 == num));
430
431 if (ret != pmsg->len) {
432 DEB2(printk(KERN_DEBUG "i2c-algo-pcf.o: fail: "
433 "only read %d bytes.\n",ret));
434 } else {
435 DEB2(printk(KERN_DEBUG "i2c-algo-pcf.o: read %d bytes.\n",ret));
436 }
437 } else { /* Write */
438 ret = pcf_sendbytes(i2c_adap, pmsg->buf, pmsg->len,
439 (i + 1 == num));
440
441 if (ret != pmsg->len) {
442 DEB2(printk(KERN_DEBUG "i2c-algo-pcf.o: fail: "
443 "only wrote %d bytes.\n",ret));
444 } else {
445 DEB2(printk(KERN_DEBUG "i2c-algo-pcf.o: wrote %d bytes.\n",ret));
446 }
447 }
448 }
449
450 return (i);
451}
452
453static u32 pcf_func(struct i2c_adapter *adap)
454{
455 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
456 I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING;
457}
458
459/* -----exported algorithm data: ------------------------------------- */
460
461static struct i2c_algorithm pcf_algo = {
462 .name = "PCF8584 algorithm",
463 .id = I2C_ALGO_PCF,
464 .master_xfer = pcf_xfer,
465 .functionality = pcf_func,
466};
467
468/*
469 * registering functions to load algorithms at runtime
470 */
471int i2c_pcf_add_bus(struct i2c_adapter *adap)
472{
473 struct i2c_algo_pcf_data *pcf_adap = adap->algo_data;
474 int rval;
475
476 DEB2(dev_dbg(&adap->dev, "hw routines registered.\n"));
477
478 /* register new adapter to i2c module... */
479
480 adap->id |= pcf_algo.id;
481 adap->algo = &pcf_algo;
482
483 adap->timeout = 100; /* default values, should */
484 adap->retries = 3; /* be replaced by defines */
485
486 rval = pcf_init_8584(pcf_adap);
487 if (!rval)
488 i2c_add_adapter(adap);
489 return rval;
490}
491
492
493int i2c_pcf_del_bus(struct i2c_adapter *adap)
494{
495 return i2c_del_adapter(adap);
496}
497
498EXPORT_SYMBOL(i2c_pcf_add_bus);
499EXPORT_SYMBOL(i2c_pcf_del_bus);
500
501MODULE_AUTHOR("Hans Berglund <hb@spacetec.no>");
502MODULE_DESCRIPTION("I2C-Bus PCF8584 algorithm");
503MODULE_LICENSE("GPL");
504
505module_param(i2c_debug, int, S_IRUGO | S_IWUSR);
506MODULE_PARM_DESC(i2c_debug,
507 "debug level - 0 off; 1 normal; 2,3 more verbose; 9 pcf-protocol");
diff --git a/drivers/i2c/algos/i2c-algo-pcf.h b/drivers/i2c/algos/i2c-algo-pcf.h
new file mode 100644
index 000000000000..5263a9eeb8d7
--- /dev/null
+++ b/drivers/i2c/algos/i2c-algo-pcf.h
@@ -0,0 +1,76 @@
1/* -------------------------------------------------------------------- */
2/* i2c-pcf8584.h: PCF 8584 global defines */
3/* -------------------------------------------------------------------- */
4/* Copyright (C) 1996 Simon G. Vogl
5 1999 Hans Berglund
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
20/* -------------------------------------------------------------------- */
21
22/* With some changes from Frodo Looijaard <frodol@dds.nl> */
23
24#ifndef I2C_PCF8584_H
25#define I2C_PCF8584_H 1
26
27/* ----- Control register bits ---------------------------------------- */
28#define I2C_PCF_PIN 0x80
29#define I2C_PCF_ESO 0x40
30#define I2C_PCF_ES1 0x20
31#define I2C_PCF_ES2 0x10
32#define I2C_PCF_ENI 0x08
33#define I2C_PCF_STA 0x04
34#define I2C_PCF_STO 0x02
35#define I2C_PCF_ACK 0x01
36
37#define I2C_PCF_START (I2C_PCF_PIN | I2C_PCF_ESO | I2C_PCF_STA | I2C_PCF_ACK)
38#define I2C_PCF_STOP (I2C_PCF_PIN | I2C_PCF_ESO | I2C_PCF_STO | I2C_PCF_ACK)
39#define I2C_PCF_REPSTART ( I2C_PCF_ESO | I2C_PCF_STA | I2C_PCF_ACK)
40#define I2C_PCF_IDLE (I2C_PCF_PIN | I2C_PCF_ESO | I2C_PCF_ACK)
41
42/* ----- Status register bits ----------------------------------------- */
43/*#define I2C_PCF_PIN 0x80 as above*/
44
45#define I2C_PCF_INI 0x40 /* 1 if not initialized */
46#define I2C_PCF_STS 0x20
47#define I2C_PCF_BER 0x10
48#define I2C_PCF_AD0 0x08
49#define I2C_PCF_LRB 0x08
50#define I2C_PCF_AAS 0x04
51#define I2C_PCF_LAB 0x02
52#define I2C_PCF_BB 0x01
53
54/* ----- Chip clock frequencies --------------------------------------- */
55#define I2C_PCF_CLK3 0x00
56#define I2C_PCF_CLK443 0x10
57#define I2C_PCF_CLK6 0x14
58#define I2C_PCF_CLK 0x18
59#define I2C_PCF_CLK12 0x1c
60
61/* ----- transmission frequencies ------------------------------------- */
62#define I2C_PCF_TRNS90 0x00 /* 90 kHz */
63#define I2C_PCF_TRNS45 0x01 /* 45 kHz */
64#define I2C_PCF_TRNS11 0x02 /* 11 kHz */
65#define I2C_PCF_TRNS15 0x03 /* 1.5 kHz */
66
67
68/* ----- Access to internal registers according to ES1,ES2 ------------ */
69/* they are mapped to the data port ( a0 = 0 ) */
70/* available when ESO == 0 : */
71
72#define I2C_PCF_OWNADR 0
73#define I2C_PCF_INTREG I2C_PCF_ES2
74#define I2C_PCF_CLKREG I2C_PCF_ES1
75
76#endif /* I2C_PCF8584_H */
diff --git a/drivers/i2c/algos/i2c-algo-sgi.c b/drivers/i2c/algos/i2c-algo-sgi.c
new file mode 100644
index 000000000000..422721b241e5
--- /dev/null
+++ b/drivers/i2c/algos/i2c-algo-sgi.c
@@ -0,0 +1,189 @@
1/*
2 * i2c-algo-sgi.c: i2c driver algorithms for SGI adapters.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License version 2 as published by the Free Software Foundation.
6 *
7 * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
8 */
9
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/init.h>
13#include <linux/errno.h>
14#include <linux/delay.h>
15
16#include <linux/i2c.h>
17#include <linux/i2c-algo-sgi.h>
18
19
20#define SGI_I2C_FORCE_IDLE (0 << 0)
21#define SGI_I2C_NOT_IDLE (1 << 0)
22#define SGI_I2C_WRITE (0 << 1)
23#define SGI_I2C_READ (1 << 1)
24#define SGI_I2C_RELEASE_BUS (0 << 2)
25#define SGI_I2C_HOLD_BUS (1 << 2)
26#define SGI_I2C_XFER_DONE (0 << 4)
27#define SGI_I2C_XFER_BUSY (1 << 4)
28#define SGI_I2C_ACK (0 << 5)
29#define SGI_I2C_NACK (1 << 5)
30#define SGI_I2C_BUS_OK (0 << 7)
31#define SGI_I2C_BUS_ERR (1 << 7)
32
33#define get_control() adap->getctrl(adap->data)
34#define set_control(val) adap->setctrl(adap->data, val)
35#define read_data() adap->rdata(adap->data)
36#define write_data(val) adap->wdata(adap->data, val)
37
38
39static int wait_xfer_done(struct i2c_algo_sgi_data *adap)
40{
41 int i;
42
43 for (i = 0; i < adap->xfer_timeout; i++) {
44 if ((get_control() & SGI_I2C_XFER_BUSY) == 0)
45 return 0;
46 udelay(1);
47 }
48
49 return -ETIMEDOUT;
50}
51
52static int wait_ack(struct i2c_algo_sgi_data *adap)
53{
54 int i;
55
56 if (wait_xfer_done(adap))
57 return -ETIMEDOUT;
58 for (i = 0; i < adap->ack_timeout; i++) {
59 if ((get_control() & SGI_I2C_NACK) == 0)
60 return 0;
61 udelay(1);
62 }
63
64 return -ETIMEDOUT;
65}
66
67static int force_idle(struct i2c_algo_sgi_data *adap)
68{
69 int i;
70
71 set_control(SGI_I2C_FORCE_IDLE);
72 for (i = 0; i < adap->xfer_timeout; i++) {
73 if ((get_control() & SGI_I2C_NOT_IDLE) == 0)
74 goto out;
75 udelay(1);
76 }
77 return -ETIMEDOUT;
78out:
79 if (get_control() & SGI_I2C_BUS_ERR)
80 return -EIO;
81 return 0;
82}
83
84static int do_address(struct i2c_algo_sgi_data *adap, unsigned int addr,
85 int rd)
86{
87 if (rd)
88 set_control(SGI_I2C_NOT_IDLE);
89 /* Check if bus is idle, eventually force it to do so */
90 if (get_control() & SGI_I2C_NOT_IDLE)
91 if (force_idle(adap))
92 return -EIO;
93 /* Write out the i2c chip address and specify operation */
94 set_control(SGI_I2C_HOLD_BUS | SGI_I2C_WRITE | SGI_I2C_NOT_IDLE);
95 if (rd)
96 addr |= 1;
97 write_data(addr);
98 if (wait_ack(adap))
99 return -EIO;
100 return 0;
101}
102
103static int i2c_read(struct i2c_algo_sgi_data *adap, unsigned char *buf,
104 unsigned int len)
105{
106 int i;
107
108 set_control(SGI_I2C_HOLD_BUS | SGI_I2C_READ | SGI_I2C_NOT_IDLE);
109 for (i = 0; i < len; i++) {
110 if (wait_xfer_done(adap))
111 return -EIO;
112 buf[i] = read_data();
113 }
114 set_control(SGI_I2C_RELEASE_BUS | SGI_I2C_FORCE_IDLE);
115
116 return 0;
117
118}
119
120static int i2c_write(struct i2c_algo_sgi_data *adap, unsigned char *buf,
121 unsigned int len)
122{
123 int i;
124
125 /* We are already in write state */
126 for (i = 0; i < len; i++) {
127 write_data(buf[i]);
128 if (wait_ack(adap))
129 return -EIO;
130 }
131 return 0;
132}
133
134static int sgi_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs,
135 int num)
136{
137 struct i2c_algo_sgi_data *adap = i2c_adap->algo_data;
138 struct i2c_msg *p;
139 int i, err = 0;
140
141 for (i = 0; !err && i < num; i++) {
142 p = &msgs[i];
143 err = do_address(adap, p->addr, p->flags & I2C_M_RD);
144 if (err || !p->len)
145 continue;
146 if (p->flags & I2C_M_RD)
147 err = i2c_read(adap, p->buf, p->len);
148 else
149 err = i2c_write(adap, p->buf, p->len);
150 }
151
152 return err;
153}
154
155static u32 sgi_func(struct i2c_adapter *adap)
156{
157 return I2C_FUNC_SMBUS_EMUL;
158}
159
160static struct i2c_algorithm sgi_algo = {
161 .name = "SGI algorithm",
162 .id = I2C_ALGO_SGI,
163 .master_xfer = sgi_xfer,
164 .functionality = sgi_func,
165};
166
167/*
168 * registering functions to load algorithms at runtime
169 */
170int i2c_sgi_add_bus(struct i2c_adapter *adap)
171{
172 adap->id |= sgi_algo.id;
173 adap->algo = &sgi_algo;
174
175 return i2c_add_adapter(adap);
176}
177
178
179int i2c_sgi_del_bus(struct i2c_adapter *adap)
180{
181 return i2c_del_adapter(adap);
182}
183
184EXPORT_SYMBOL(i2c_sgi_add_bus);
185EXPORT_SYMBOL(i2c_sgi_del_bus);
186
187MODULE_AUTHOR("Ladislav Michl <ladis@linux-mips.org>");
188MODULE_DESCRIPTION("I2C-Bus SGI algorithm");
189MODULE_LICENSE("GPL");
diff --git a/drivers/i2c/algos/i2c-algo-sibyte.c b/drivers/i2c/algos/i2c-algo-sibyte.c
new file mode 100644
index 000000000000..35789bb7126a
--- /dev/null
+++ b/drivers/i2c/algos/i2c-algo-sibyte.c
@@ -0,0 +1,222 @@
1/* ------------------------------------------------------------------------- */
2/* i2c-algo-sibyte.c i2c driver algorithms for bit-shift adapters */
3/* ------------------------------------------------------------------------- */
4/* Copyright (C) 2001,2002,2003 Broadcom Corporation
5 Copyright (C) 1995-2000 Simon G. Vogl
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
20/* ------------------------------------------------------------------------- */
21
22/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even
23 Frodo Looijaard <frodol@dds.nl>. */
24
25/* Ported for SiByte SOCs by Broadcom Corporation. */
26
27#include <linux/config.h>
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/init.h>
31
32#include <asm/io.h>
33#include <asm/sibyte/sb1250_regs.h>
34#include <asm/sibyte/sb1250_smbus.h>
35
36#include <linux/i2c.h>
37#include <linux/i2c-algo-sibyte.h>
38
39/* ----- global defines ----------------------------------------------- */
40#define SMB_CSR(a,r) ((long)(a->reg_base + r))
41
42/* ----- global variables --------------------------------------------- */
43
44/* module parameters:
45 */
46static int bit_scan=0; /* have a look at what's hanging 'round */
47
48
49static int smbus_xfer(struct i2c_adapter *i2c_adap, u16 addr,
50 unsigned short flags, char read_write,
51 u8 command, int size, union i2c_smbus_data * data)
52{
53 struct i2c_algo_sibyte_data *adap = i2c_adap->algo_data;
54 int data_bytes = 0;
55 int error;
56
57 while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY)
58 ;
59
60 switch (size) {
61 case I2C_SMBUS_QUICK:
62 csr_out32((V_SMB_ADDR(addr) | (read_write == I2C_SMBUS_READ ? M_SMB_QDATA : 0) |
63 V_SMB_TT_QUICKCMD), SMB_CSR(adap, R_SMB_START));
64 break;
65 case I2C_SMBUS_BYTE:
66 if (read_write == I2C_SMBUS_READ) {
67 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_RD1BYTE),
68 SMB_CSR(adap, R_SMB_START));
69 data_bytes = 1;
70 } else {
71 csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD));
72 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR1BYTE),
73 SMB_CSR(adap, R_SMB_START));
74 }
75 break;
76 case I2C_SMBUS_BYTE_DATA:
77 csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD));
78 if (read_write == I2C_SMBUS_READ) {
79 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_CMD_RD1BYTE),
80 SMB_CSR(adap, R_SMB_START));
81 data_bytes = 1;
82 } else {
83 csr_out32(V_SMB_LB(data->byte), SMB_CSR(adap, R_SMB_DATA));
84 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR2BYTE),
85 SMB_CSR(adap, R_SMB_START));
86 }
87 break;
88 case I2C_SMBUS_WORD_DATA:
89 csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD));
90 if (read_write == I2C_SMBUS_READ) {
91 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_CMD_RD2BYTE),
92 SMB_CSR(adap, R_SMB_START));
93 data_bytes = 2;
94 } else {
95 csr_out32(V_SMB_LB(data->word & 0xff), SMB_CSR(adap, R_SMB_DATA));
96 csr_out32(V_SMB_MB(data->word >> 8), SMB_CSR(adap, R_SMB_DATA));
97 csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR2BYTE),
98 SMB_CSR(adap, R_SMB_START));
99 }
100 break;
101 default:
102 return -1; /* XXXKW better error code? */
103 }
104
105 while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY)
106 ;
107
108 error = csr_in32(SMB_CSR(adap, R_SMB_STATUS));
109 if (error & M_SMB_ERROR) {
110 /* Clear error bit by writing a 1 */
111 csr_out32(M_SMB_ERROR, SMB_CSR(adap, R_SMB_STATUS));
112 return -1; /* XXXKW better error code? */
113 }
114
115 if (data_bytes == 1)
116 data->byte = csr_in32(SMB_CSR(adap, R_SMB_DATA)) & 0xff;
117 if (data_bytes == 2)
118 data->word = csr_in32(SMB_CSR(adap, R_SMB_DATA)) & 0xffff;
119
120 return 0;
121}
122
123static int algo_control(struct i2c_adapter *adapter,
124 unsigned int cmd, unsigned long arg)
125{
126 return 0;
127}
128
129static u32 bit_func(struct i2c_adapter *adap)
130{
131 return (I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
132 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA);
133}
134
135
136/* -----exported algorithm data: ------------------------------------- */
137
138static struct i2c_algorithm i2c_sibyte_algo = {
139 .name = "SiByte algorithm",
140 .id = I2C_ALGO_SIBYTE,
141 .smbus_xfer = smbus_xfer,
142 .algo_control = algo_control, /* ioctl */
143 .functionality = bit_func,
144};
145
146/*
147 * registering functions to load algorithms at runtime
148 */
149int i2c_sibyte_add_bus(struct i2c_adapter *i2c_adap, int speed)
150{
151 int i;
152 struct i2c_algo_sibyte_data *adap = i2c_adap->algo_data;
153
154 /* register new adapter to i2c module... */
155
156 i2c_adap->id |= i2c_sibyte_algo.id;
157 i2c_adap->algo = &i2c_sibyte_algo;
158
159 /* Set the frequency to 100 kHz */
160 csr_out32(speed, SMB_CSR(adap,R_SMB_FREQ));
161 csr_out32(0, SMB_CSR(adap,R_SMB_CONTROL));
162
163 /* scan bus */
164 if (bit_scan) {
165 union i2c_smbus_data data;
166 int rc;
167 printk(KERN_INFO " i2c-algo-sibyte.o: scanning bus %s.\n",
168 i2c_adap->name);
169 for (i = 0x00; i < 0x7f; i++) {
170 /* XXXKW is this a realistic probe? */
171 rc = smbus_xfer(i2c_adap, i, 0, I2C_SMBUS_READ, 0,
172 I2C_SMBUS_BYTE_DATA, &data);
173 if (!rc) {
174 printk("(%02x)",i);
175 } else
176 printk(".");
177 }
178 printk("\n");
179 }
180
181 i2c_add_adapter(i2c_adap);
182
183 return 0;
184}
185
186
187int i2c_sibyte_del_bus(struct i2c_adapter *adap)
188{
189 int res;
190
191 if ((res = i2c_del_adapter(adap)) < 0)
192 return res;
193
194 return 0;
195}
196
197int __init i2c_algo_sibyte_init (void)
198{
199 printk("i2c-algo-sibyte.o: i2c SiByte algorithm module\n");
200 return 0;
201}
202
203
204EXPORT_SYMBOL(i2c_sibyte_add_bus);
205EXPORT_SYMBOL(i2c_sibyte_del_bus);
206
207#ifdef MODULE
208MODULE_AUTHOR("Kip Walker, Broadcom Corp.");
209MODULE_DESCRIPTION("SiByte I2C-Bus algorithm");
210MODULE_PARM(bit_scan, "i");
211MODULE_PARM_DESC(bit_scan, "Scan for active chips on the bus");
212MODULE_LICENSE("GPL");
213
214int init_module(void)
215{
216 return i2c_algo_sibyte_init();
217}
218
219void cleanup_module(void)
220{
221}
222#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 20:43:27 -0500