diff options
Diffstat (limited to 'drivers/hwmon')
-rw-r--r-- | drivers/hwmon/w83627ehf.c | 36 |
1 files changed, 22 insertions, 14 deletions
diff --git a/drivers/hwmon/w83627ehf.c b/drivers/hwmon/w83627ehf.c index b15c6a998b72..d5aa25ce5dbd 100644 --- a/drivers/hwmon/w83627ehf.c +++ b/drivers/hwmon/w83627ehf.c | |||
@@ -1276,23 +1276,31 @@ static int __devinit w83627ehf_probe(struct platform_device *pdev) | |||
1276 | 1276 | ||
1277 | data->vrm = vid_which_vrm(); | 1277 | data->vrm = vid_which_vrm(); |
1278 | superio_enter(sio_data->sioreg); | 1278 | superio_enter(sio_data->sioreg); |
1279 | /* Set VID input sensibility if needed. In theory the BIOS should | ||
1280 | have set it, but in practice it's not always the case. */ | ||
1281 | en_vrm10 = superio_inb(sio_data->sioreg, SIO_REG_EN_VRM10); | ||
1282 | if ((en_vrm10 & 0x08) && data->vrm != 100) { | ||
1283 | dev_warn(dev, "Setting VID input voltage to TTL\n"); | ||
1284 | superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10, | ||
1285 | en_vrm10 & ~0x08); | ||
1286 | } else if (!(en_vrm10 & 0x08) && data->vrm == 100) { | ||
1287 | dev_warn(dev, "Setting VID input voltage to VRM10\n"); | ||
1288 | superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10, | ||
1289 | en_vrm10 | 0x08); | ||
1290 | } | ||
1291 | /* Read VID value */ | 1279 | /* Read VID value */ |
1292 | superio_select(sio_data->sioreg, W83627EHF_LD_HWM); | 1280 | superio_select(sio_data->sioreg, W83627EHF_LD_HWM); |
1293 | if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) | 1281 | if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) { |
1282 | /* Set VID input sensibility if needed. In theory the BIOS | ||
1283 | should have set it, but in practice it's not always the | ||
1284 | case. We only do it for the W83627EHF/EHG because the | ||
1285 | W83627DHG is more complex in this respect. */ | ||
1286 | if (sio_data->kind == w83627ehf) { | ||
1287 | en_vrm10 = superio_inb(sio_data->sioreg, | ||
1288 | SIO_REG_EN_VRM10); | ||
1289 | if ((en_vrm10 & 0x08) && data->vrm == 90) { | ||
1290 | dev_warn(dev, "Setting VID input voltage to " | ||
1291 | "TTL\n"); | ||
1292 | superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10, | ||
1293 | en_vrm10 & ~0x08); | ||
1294 | } else if (!(en_vrm10 & 0x08) && data->vrm == 100) { | ||
1295 | dev_warn(dev, "Setting VID input voltage to " | ||
1296 | "VRM10\n"); | ||
1297 | superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10, | ||
1298 | en_vrm10 | 0x08); | ||
1299 | } | ||
1300 | } | ||
1301 | |||
1294 | data->vid = superio_inb(sio_data->sioreg, SIO_REG_VID_DATA) & 0x3f; | 1302 | data->vid = superio_inb(sio_data->sioreg, SIO_REG_VID_DATA) & 0x3f; |
1295 | else { | 1303 | } else { |
1296 | dev_info(dev, "VID pins in output mode, CPU VID not " | 1304 | dev_info(dev, "VID pins in output mode, CPU VID not " |
1297 | "available\n"); | 1305 | "available\n"); |
1298 | data->vid = 0x3f; | 1306 | data->vid = 0x3f; |