diff options
Diffstat (limited to 'drivers/hwmon/w83781d.c')
-rw-r--r-- | drivers/hwmon/w83781d.c | 193 |
1 files changed, 92 insertions, 101 deletions
diff --git a/drivers/hwmon/w83781d.c b/drivers/hwmon/w83781d.c index 4f93d79a4308..ad6b6ca90f6b 100644 --- a/drivers/hwmon/w83781d.c +++ b/drivers/hwmon/w83781d.c | |||
@@ -271,8 +271,8 @@ static int w83781d_detach_client(struct i2c_client *client); | |||
271 | static int __devinit w83781d_isa_probe(struct platform_device *pdev); | 271 | static int __devinit w83781d_isa_probe(struct platform_device *pdev); |
272 | static int __devexit w83781d_isa_remove(struct platform_device *pdev); | 272 | static int __devexit w83781d_isa_remove(struct platform_device *pdev); |
273 | 273 | ||
274 | static int w83781d_read_value(struct i2c_client *client, u16 reg); | 274 | static int w83781d_read_value(struct w83781d_data *data, u16 reg); |
275 | static int w83781d_write_value(struct i2c_client *client, u16 reg, u16 value); | 275 | static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value); |
276 | static struct w83781d_data *w83781d_update_device(struct device *dev); | 276 | static struct w83781d_data *w83781d_update_device(struct device *dev); |
277 | static void w83781d_init_device(struct device *dev); | 277 | static void w83781d_init_device(struct device *dev); |
278 | 278 | ||
@@ -310,14 +310,13 @@ show_in_reg(in_max); | |||
310 | static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \ | 310 | static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \ |
311 | { \ | 311 | { \ |
312 | struct w83781d_data *data = dev_get_drvdata(dev); \ | 312 | struct w83781d_data *data = dev_get_drvdata(dev); \ |
313 | struct i2c_client *client = &data->client; \ | ||
314 | u32 val; \ | 313 | u32 val; \ |
315 | \ | 314 | \ |
316 | val = simple_strtoul(buf, NULL, 10); \ | 315 | val = simple_strtoul(buf, NULL, 10); \ |
317 | \ | 316 | \ |
318 | mutex_lock(&data->update_lock); \ | 317 | mutex_lock(&data->update_lock); \ |
319 | data->in_##reg[nr] = IN_TO_REG(val); \ | 318 | data->in_##reg[nr] = IN_TO_REG(val); \ |
320 | w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \ | 319 | w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \ |
321 | \ | 320 | \ |
322 | mutex_unlock(&data->update_lock); \ | 321 | mutex_unlock(&data->update_lock); \ |
323 | return count; \ | 322 | return count; \ |
@@ -373,7 +372,6 @@ static ssize_t | |||
373 | store_fan_min(struct device *dev, const char *buf, size_t count, int nr) | 372 | store_fan_min(struct device *dev, const char *buf, size_t count, int nr) |
374 | { | 373 | { |
375 | struct w83781d_data *data = dev_get_drvdata(dev); | 374 | struct w83781d_data *data = dev_get_drvdata(dev); |
376 | struct i2c_client *client = &data->client; | ||
377 | u32 val; | 375 | u32 val; |
378 | 376 | ||
379 | val = simple_strtoul(buf, NULL, 10); | 377 | val = simple_strtoul(buf, NULL, 10); |
@@ -381,7 +379,7 @@ store_fan_min(struct device *dev, const char *buf, size_t count, int nr) | |||
381 | mutex_lock(&data->update_lock); | 379 | mutex_lock(&data->update_lock); |
382 | data->fan_min[nr - 1] = | 380 | data->fan_min[nr - 1] = |
383 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1])); | 381 | FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1])); |
384 | w83781d_write_value(client, W83781D_REG_FAN_MIN(nr), | 382 | w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), |
385 | data->fan_min[nr - 1]); | 383 | data->fan_min[nr - 1]); |
386 | 384 | ||
387 | mutex_unlock(&data->update_lock); | 385 | mutex_unlock(&data->update_lock); |
@@ -432,7 +430,6 @@ show_temp_reg(temp_max_hyst); | |||
432 | static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \ | 430 | static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \ |
433 | { \ | 431 | { \ |
434 | struct w83781d_data *data = dev_get_drvdata(dev); \ | 432 | struct w83781d_data *data = dev_get_drvdata(dev); \ |
435 | struct i2c_client *client = &data->client; \ | ||
436 | s32 val; \ | 433 | s32 val; \ |
437 | \ | 434 | \ |
438 | val = simple_strtol(buf, NULL, 10); \ | 435 | val = simple_strtol(buf, NULL, 10); \ |
@@ -441,11 +438,11 @@ static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t cou | |||
441 | \ | 438 | \ |
442 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ | 439 | if (nr >= 2) { /* TEMP2 and TEMP3 */ \ |
443 | data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ | 440 | data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \ |
444 | w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ | 441 | w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \ |
445 | data->temp_##reg##_add[nr-2]); \ | 442 | data->temp_##reg##_add[nr-2]); \ |
446 | } else { /* TEMP1 */ \ | 443 | } else { /* TEMP1 */ \ |
447 | data->temp_##reg = TEMP_TO_REG(val); \ | 444 | data->temp_##reg = TEMP_TO_REG(val); \ |
448 | w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \ | 445 | w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \ |
449 | data->temp_##reg); \ | 446 | data->temp_##reg); \ |
450 | } \ | 447 | } \ |
451 | \ | 448 | \ |
@@ -542,7 +539,6 @@ store_beep_reg(struct device *dev, const char *buf, size_t count, | |||
542 | int update_mask) | 539 | int update_mask) |
543 | { | 540 | { |
544 | struct w83781d_data *data = dev_get_drvdata(dev); | 541 | struct w83781d_data *data = dev_get_drvdata(dev); |
545 | struct i2c_client *client = &data->client; | ||
546 | u32 val, val2; | 542 | u32 val, val2; |
547 | 543 | ||
548 | val = simple_strtoul(buf, NULL, 10); | 544 | val = simple_strtoul(buf, NULL, 10); |
@@ -551,21 +547,21 @@ store_beep_reg(struct device *dev, const char *buf, size_t count, | |||
551 | 547 | ||
552 | if (update_mask == BEEP_MASK) { /* We are storing beep_mask */ | 548 | if (update_mask == BEEP_MASK) { /* We are storing beep_mask */ |
553 | data->beep_mask = BEEP_MASK_TO_REG(val, data->type); | 549 | data->beep_mask = BEEP_MASK_TO_REG(val, data->type); |
554 | w83781d_write_value(client, W83781D_REG_BEEP_INTS1, | 550 | w83781d_write_value(data, W83781D_REG_BEEP_INTS1, |
555 | data->beep_mask & 0xff); | 551 | data->beep_mask & 0xff); |
556 | 552 | ||
557 | if ((data->type != w83781d) && (data->type != as99127f)) { | 553 | if ((data->type != w83781d) && (data->type != as99127f)) { |
558 | w83781d_write_value(client, W83781D_REG_BEEP_INTS3, | 554 | w83781d_write_value(data, W83781D_REG_BEEP_INTS3, |
559 | ((data->beep_mask) >> 16) & 0xff); | 555 | ((data->beep_mask) >> 16) & 0xff); |
560 | } | 556 | } |
561 | 557 | ||
562 | val2 = (data->beep_mask >> 8) & 0x7f; | 558 | val2 = (data->beep_mask >> 8) & 0x7f; |
563 | } else { /* We are storing beep_enable */ | 559 | } else { /* We are storing beep_enable */ |
564 | val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f; | 560 | val2 = w83781d_read_value(data, W83781D_REG_BEEP_INTS2) & 0x7f; |
565 | data->beep_enable = !!val; | 561 | data->beep_enable = !!val; |
566 | } | 562 | } |
567 | 563 | ||
568 | w83781d_write_value(client, W83781D_REG_BEEP_INTS2, | 564 | w83781d_write_value(data, W83781D_REG_BEEP_INTS2, |
569 | val2 | data->beep_enable << 7); | 565 | val2 | data->beep_enable << 7); |
570 | 566 | ||
571 | mutex_unlock(&data->update_lock); | 567 | mutex_unlock(&data->update_lock); |
@@ -602,7 +598,6 @@ static ssize_t | |||
602 | store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr) | 598 | store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr) |
603 | { | 599 | { |
604 | struct w83781d_data *data = dev_get_drvdata(dev); | 600 | struct w83781d_data *data = dev_get_drvdata(dev); |
605 | struct i2c_client *client = &data->client; | ||
606 | unsigned long min; | 601 | unsigned long min; |
607 | u8 reg; | 602 | u8 reg; |
608 | unsigned long val = simple_strtoul(buf, NULL, 10); | 603 | unsigned long val = simple_strtoul(buf, NULL, 10); |
@@ -615,22 +610,22 @@ store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr) | |||
615 | 610 | ||
616 | data->fan_div[nr] = DIV_TO_REG(val, data->type); | 611 | data->fan_div[nr] = DIV_TO_REG(val, data->type); |
617 | 612 | ||
618 | reg = (w83781d_read_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) | 613 | reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV) |
619 | & (nr==0 ? 0xcf : 0x3f)) | 614 | & (nr==0 ? 0xcf : 0x3f)) |
620 | | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); | 615 | | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6)); |
621 | w83781d_write_value(client, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); | 616 | w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg); |
622 | 617 | ||
623 | /* w83781d and as99127f don't have extended divisor bits */ | 618 | /* w83781d and as99127f don't have extended divisor bits */ |
624 | if (data->type != w83781d && data->type != as99127f) { | 619 | if (data->type != w83781d && data->type != as99127f) { |
625 | reg = (w83781d_read_value(client, W83781D_REG_VBAT) | 620 | reg = (w83781d_read_value(data, W83781D_REG_VBAT) |
626 | & ~(1 << (5 + nr))) | 621 | & ~(1 << (5 + nr))) |
627 | | ((data->fan_div[nr] & 0x04) << (3 + nr)); | 622 | | ((data->fan_div[nr] & 0x04) << (3 + nr)); |
628 | w83781d_write_value(client, W83781D_REG_VBAT, reg); | 623 | w83781d_write_value(data, W83781D_REG_VBAT, reg); |
629 | } | 624 | } |
630 | 625 | ||
631 | /* Restore fan_min */ | 626 | /* Restore fan_min */ |
632 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); | 627 | data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); |
633 | w83781d_write_value(client, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]); | 628 | w83781d_write_value(data, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]); |
634 | 629 | ||
635 | mutex_unlock(&data->update_lock); | 630 | mutex_unlock(&data->update_lock); |
636 | return count; | 631 | return count; |
@@ -669,14 +664,13 @@ static ssize_t | |||
669 | store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr) | 664 | store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr) |
670 | { | 665 | { |
671 | struct w83781d_data *data = dev_get_drvdata(dev); | 666 | struct w83781d_data *data = dev_get_drvdata(dev); |
672 | struct i2c_client *client = &data->client; | ||
673 | u32 val; | 667 | u32 val; |
674 | 668 | ||
675 | val = simple_strtoul(buf, NULL, 10); | 669 | val = simple_strtoul(buf, NULL, 10); |
676 | 670 | ||
677 | mutex_lock(&data->update_lock); | 671 | mutex_lock(&data->update_lock); |
678 | data->pwm[nr - 1] = SENSORS_LIMIT(val, 0, 255); | 672 | data->pwm[nr - 1] = SENSORS_LIMIT(val, 0, 255); |
679 | w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]); | 673 | w83781d_write_value(data, W83781D_REG_PWM(nr), data->pwm[nr - 1]); |
680 | mutex_unlock(&data->update_lock); | 674 | mutex_unlock(&data->update_lock); |
681 | return count; | 675 | return count; |
682 | } | 676 | } |
@@ -685,7 +679,6 @@ static ssize_t | |||
685 | store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr) | 679 | store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr) |
686 | { | 680 | { |
687 | struct w83781d_data *data = dev_get_drvdata(dev); | 681 | struct w83781d_data *data = dev_get_drvdata(dev); |
688 | struct i2c_client *client = &data->client; | ||
689 | u32 val, reg; | 682 | u32 val, reg; |
690 | 683 | ||
691 | val = simple_strtoul(buf, NULL, 10); | 684 | val = simple_strtoul(buf, NULL, 10); |
@@ -695,12 +688,12 @@ store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr) | |||
695 | switch (val) { | 688 | switch (val) { |
696 | case 0: | 689 | case 0: |
697 | case 1: | 690 | case 1: |
698 | reg = w83781d_read_value(client, W83781D_REG_PWMCLK12); | 691 | reg = w83781d_read_value(data, W83781D_REG_PWMCLK12); |
699 | w83781d_write_value(client, W83781D_REG_PWMCLK12, | 692 | w83781d_write_value(data, W83781D_REG_PWMCLK12, |
700 | (reg & 0xf7) | (val << 3)); | 693 | (reg & 0xf7) | (val << 3)); |
701 | 694 | ||
702 | reg = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); | 695 | reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); |
703 | w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, | 696 | w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, |
704 | (reg & 0xef) | (!val << 4)); | 697 | (reg & 0xef) | (!val << 4)); |
705 | 698 | ||
706 | data->pwmenable[nr - 1] = val; | 699 | data->pwmenable[nr - 1] = val; |
@@ -758,7 +751,6 @@ static ssize_t | |||
758 | store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr) | 751 | store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr) |
759 | { | 752 | { |
760 | struct w83781d_data *data = dev_get_drvdata(dev); | 753 | struct w83781d_data *data = dev_get_drvdata(dev); |
761 | struct i2c_client *client = &data->client; | ||
762 | u32 val, tmp; | 754 | u32 val, tmp; |
763 | 755 | ||
764 | val = simple_strtoul(buf, NULL, 10); | 756 | val = simple_strtoul(buf, NULL, 10); |
@@ -767,26 +759,26 @@ store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr) | |||
767 | 759 | ||
768 | switch (val) { | 760 | switch (val) { |
769 | case 1: /* PII/Celeron diode */ | 761 | case 1: /* PII/Celeron diode */ |
770 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | 762 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
771 | w83781d_write_value(client, W83781D_REG_SCFG1, | 763 | w83781d_write_value(data, W83781D_REG_SCFG1, |
772 | tmp | BIT_SCFG1[nr - 1]); | 764 | tmp | BIT_SCFG1[nr - 1]); |
773 | tmp = w83781d_read_value(client, W83781D_REG_SCFG2); | 765 | tmp = w83781d_read_value(data, W83781D_REG_SCFG2); |
774 | w83781d_write_value(client, W83781D_REG_SCFG2, | 766 | w83781d_write_value(data, W83781D_REG_SCFG2, |
775 | tmp | BIT_SCFG2[nr - 1]); | 767 | tmp | BIT_SCFG2[nr - 1]); |
776 | data->sens[nr - 1] = val; | 768 | data->sens[nr - 1] = val; |
777 | break; | 769 | break; |
778 | case 2: /* 3904 */ | 770 | case 2: /* 3904 */ |
779 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | 771 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
780 | w83781d_write_value(client, W83781D_REG_SCFG1, | 772 | w83781d_write_value(data, W83781D_REG_SCFG1, |
781 | tmp | BIT_SCFG1[nr - 1]); | 773 | tmp | BIT_SCFG1[nr - 1]); |
782 | tmp = w83781d_read_value(client, W83781D_REG_SCFG2); | 774 | tmp = w83781d_read_value(data, W83781D_REG_SCFG2); |
783 | w83781d_write_value(client, W83781D_REG_SCFG2, | 775 | w83781d_write_value(data, W83781D_REG_SCFG2, |
784 | tmp & ~BIT_SCFG2[nr - 1]); | 776 | tmp & ~BIT_SCFG2[nr - 1]); |
785 | data->sens[nr - 1] = val; | 777 | data->sens[nr - 1] = val; |
786 | break; | 778 | break; |
787 | case W83781D_DEFAULT_BETA: /* thermistor */ | 779 | case W83781D_DEFAULT_BETA: /* thermistor */ |
788 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | 780 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
789 | w83781d_write_value(client, W83781D_REG_SCFG1, | 781 | w83781d_write_value(data, W83781D_REG_SCFG1, |
790 | tmp & ~BIT_SCFG1[nr - 1]); | 782 | tmp & ~BIT_SCFG1[nr - 1]); |
791 | data->sens[nr - 1] = val; | 783 | data->sens[nr - 1] = val; |
792 | break; | 784 | break; |
@@ -868,12 +860,12 @@ w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind, | |||
868 | goto ERROR_SC_1; | 860 | goto ERROR_SC_1; |
869 | } | 861 | } |
870 | } | 862 | } |
871 | w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR, | 863 | w83781d_write_value(data, W83781D_REG_I2C_SUBADDR, |
872 | (force_subclients[2] & 0x07) | | 864 | (force_subclients[2] & 0x07) | |
873 | ((force_subclients[3] & 0x07) << 4)); | 865 | ((force_subclients[3] & 0x07) << 4)); |
874 | data->lm75[0]->addr = force_subclients[2]; | 866 | data->lm75[0]->addr = force_subclients[2]; |
875 | } else { | 867 | } else { |
876 | val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR); | 868 | val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR); |
877 | data->lm75[0]->addr = 0x48 + (val1 & 0x07); | 869 | data->lm75[0]->addr = 0x48 + (val1 & 0x07); |
878 | } | 870 | } |
879 | 871 | ||
@@ -1105,14 +1097,14 @@ w83781d_detect(struct i2c_adapter *adapter, int address, int kind) | |||
1105 | force_*=... parameter, and the Winbond will be reset to the right | 1097 | force_*=... parameter, and the Winbond will be reset to the right |
1106 | bank. */ | 1098 | bank. */ |
1107 | if (kind < 0) { | 1099 | if (kind < 0) { |
1108 | if (w83781d_read_value(client, W83781D_REG_CONFIG) & 0x80) { | 1100 | if (w83781d_read_value(data, W83781D_REG_CONFIG) & 0x80) { |
1109 | dev_dbg(&adapter->dev, "Detection of w83781d chip " | 1101 | dev_dbg(&adapter->dev, "Detection of w83781d chip " |
1110 | "failed at step 3\n"); | 1102 | "failed at step 3\n"); |
1111 | err = -ENODEV; | 1103 | err = -ENODEV; |
1112 | goto ERROR2; | 1104 | goto ERROR2; |
1113 | } | 1105 | } |
1114 | val1 = w83781d_read_value(client, W83781D_REG_BANK); | 1106 | val1 = w83781d_read_value(data, W83781D_REG_BANK); |
1115 | val2 = w83781d_read_value(client, W83781D_REG_CHIPMAN); | 1107 | val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN); |
1116 | /* Check for Winbond or Asus ID if in bank 0 */ | 1108 | /* Check for Winbond or Asus ID if in bank 0 */ |
1117 | if ((!(val1 & 0x07)) && | 1109 | if ((!(val1 & 0x07)) && |
1118 | (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3)) | 1110 | (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3)) |
@@ -1127,7 +1119,7 @@ w83781d_detect(struct i2c_adapter *adapter, int address, int kind) | |||
1127 | if ((!(val1 & 0x80) && (val2 == 0xa3)) || | 1119 | if ((!(val1 & 0x80) && (val2 == 0xa3)) || |
1128 | ((val1 & 0x80) && (val2 == 0x5c))) { | 1120 | ((val1 & 0x80) && (val2 == 0x5c))) { |
1129 | if (w83781d_read_value | 1121 | if (w83781d_read_value |
1130 | (client, W83781D_REG_I2C_ADDR) != address) { | 1122 | (data, W83781D_REG_I2C_ADDR) != address) { |
1131 | dev_dbg(&adapter->dev, "Detection of w83781d " | 1123 | dev_dbg(&adapter->dev, "Detection of w83781d " |
1132 | "chip failed at step 5\n"); | 1124 | "chip failed at step 5\n"); |
1133 | err = -ENODEV; | 1125 | err = -ENODEV; |
@@ -1138,14 +1130,14 @@ w83781d_detect(struct i2c_adapter *adapter, int address, int kind) | |||
1138 | 1130 | ||
1139 | /* We have either had a force parameter, or we have already detected the | 1131 | /* We have either had a force parameter, or we have already detected the |
1140 | Winbond. Put it now into bank 0 and Vendor ID High Byte */ | 1132 | Winbond. Put it now into bank 0 and Vendor ID High Byte */ |
1141 | w83781d_write_value(client, W83781D_REG_BANK, | 1133 | w83781d_write_value(data, W83781D_REG_BANK, |
1142 | (w83781d_read_value(client, W83781D_REG_BANK) | 1134 | (w83781d_read_value(data, W83781D_REG_BANK) |
1143 | & 0x78) | 0x80); | 1135 | & 0x78) | 0x80); |
1144 | 1136 | ||
1145 | /* Determine the chip type. */ | 1137 | /* Determine the chip type. */ |
1146 | if (kind <= 0) { | 1138 | if (kind <= 0) { |
1147 | /* get vendor ID */ | 1139 | /* get vendor ID */ |
1148 | val2 = w83781d_read_value(client, W83781D_REG_CHIPMAN); | 1140 | val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN); |
1149 | if (val2 == 0x5c) | 1141 | if (val2 == 0x5c) |
1150 | vendid = winbond; | 1142 | vendid = winbond; |
1151 | else if (val2 == 0x12) | 1143 | else if (val2 == 0x12) |
@@ -1157,7 +1149,7 @@ w83781d_detect(struct i2c_adapter *adapter, int address, int kind) | |||
1157 | goto ERROR2; | 1149 | goto ERROR2; |
1158 | } | 1150 | } |
1159 | 1151 | ||
1160 | val1 = w83781d_read_value(client, W83781D_REG_WCHIPID); | 1152 | val1 = w83781d_read_value(data, W83781D_REG_WCHIPID); |
1161 | if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) | 1153 | if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond) |
1162 | kind = w83781d; | 1154 | kind = w83781d; |
1163 | else if (val1 == 0x30 && vendid == winbond) | 1155 | else if (val1 == 0x30 && vendid == winbond) |
@@ -1290,7 +1282,7 @@ w83781d_isa_probe(struct platform_device *pdev) | |||
1290 | i2c_set_clientdata(&data->client, data); | 1282 | i2c_set_clientdata(&data->client, data); |
1291 | platform_set_drvdata(pdev, data); | 1283 | platform_set_drvdata(pdev, data); |
1292 | 1284 | ||
1293 | reg = w83781d_read_value(&data->client, W83781D_REG_WCHIPID); | 1285 | reg = w83781d_read_value(data, W83781D_REG_WCHIPID); |
1294 | switch (reg) { | 1286 | switch (reg) { |
1295 | case 0x21: | 1287 | case 0x21: |
1296 | data->type = w83627hf; | 1288 | data->type = w83627hf; |
@@ -1355,9 +1347,9 @@ w83781d_isa_remove(struct platform_device *pdev) | |||
1355 | There are some ugly typecasts here, but the good news is - they should | 1347 | There are some ugly typecasts here, but the good news is - they should |
1356 | nowhere else be necessary! */ | 1348 | nowhere else be necessary! */ |
1357 | static int | 1349 | static int |
1358 | w83781d_read_value(struct i2c_client *client, u16 reg) | 1350 | w83781d_read_value(struct w83781d_data *data, u16 reg) |
1359 | { | 1351 | { |
1360 | struct w83781d_data *data = i2c_get_clientdata(client); | 1352 | struct i2c_client *client = &data->client; |
1361 | int res, word_sized, bank; | 1353 | int res, word_sized, bank; |
1362 | struct i2c_client *cl; | 1354 | struct i2c_client *cl; |
1363 | 1355 | ||
@@ -1424,9 +1416,9 @@ w83781d_read_value(struct i2c_client *client, u16 reg) | |||
1424 | } | 1416 | } |
1425 | 1417 | ||
1426 | static int | 1418 | static int |
1427 | w83781d_write_value(struct i2c_client *client, u16 reg, u16 value) | 1419 | w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value) |
1428 | { | 1420 | { |
1429 | struct w83781d_data *data = i2c_get_clientdata(client); | 1421 | struct i2c_client *client = &data->client; |
1430 | int word_sized, bank; | 1422 | int word_sized, bank; |
1431 | struct i2c_client *cl; | 1423 | struct i2c_client *cl; |
1432 | 1424 | ||
@@ -1491,7 +1483,6 @@ static void | |||
1491 | w83781d_init_device(struct device *dev) | 1483 | w83781d_init_device(struct device *dev) |
1492 | { | 1484 | { |
1493 | struct w83781d_data *data = dev_get_drvdata(dev); | 1485 | struct w83781d_data *data = dev_get_drvdata(dev); |
1494 | struct i2c_client *client = &data->client; | ||
1495 | int i, p; | 1486 | int i, p; |
1496 | int type = data->type; | 1487 | int type = data->type; |
1497 | u8 tmp; | 1488 | u8 tmp; |
@@ -1508,38 +1499,38 @@ w83781d_init_device(struct device *dev) | |||
1508 | "having, please report!\n"); | 1499 | "having, please report!\n"); |
1509 | 1500 | ||
1510 | /* save these registers */ | 1501 | /* save these registers */ |
1511 | i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); | 1502 | i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); |
1512 | p = w83781d_read_value(client, W83781D_REG_PWMCLK12); | 1503 | p = w83781d_read_value(data, W83781D_REG_PWMCLK12); |
1513 | /* Reset all except Watchdog values and last conversion values | 1504 | /* Reset all except Watchdog values and last conversion values |
1514 | This sets fan-divs to 2, among others */ | 1505 | This sets fan-divs to 2, among others */ |
1515 | w83781d_write_value(client, W83781D_REG_CONFIG, 0x80); | 1506 | w83781d_write_value(data, W83781D_REG_CONFIG, 0x80); |
1516 | /* Restore the registers and disable power-on abnormal beep. | 1507 | /* Restore the registers and disable power-on abnormal beep. |
1517 | This saves FAN 1/2/3 input/output values set by BIOS. */ | 1508 | This saves FAN 1/2/3 input/output values set by BIOS. */ |
1518 | w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80); | 1509 | w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); |
1519 | w83781d_write_value(client, W83781D_REG_PWMCLK12, p); | 1510 | w83781d_write_value(data, W83781D_REG_PWMCLK12, p); |
1520 | /* Disable master beep-enable (reset turns it on). | 1511 | /* Disable master beep-enable (reset turns it on). |
1521 | Individual beep_mask should be reset to off but for some reason | 1512 | Individual beep_mask should be reset to off but for some reason |
1522 | disabling this bit helps some people not get beeped */ | 1513 | disabling this bit helps some people not get beeped */ |
1523 | w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0); | 1514 | w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0); |
1524 | } | 1515 | } |
1525 | 1516 | ||
1526 | /* Disable power-on abnormal beep, as advised by the datasheet. | 1517 | /* Disable power-on abnormal beep, as advised by the datasheet. |
1527 | Already done if reset=1. */ | 1518 | Already done if reset=1. */ |
1528 | if (init && !reset && type != as99127f) { | 1519 | if (init && !reset && type != as99127f) { |
1529 | i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG); | 1520 | i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG); |
1530 | w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80); | 1521 | w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80); |
1531 | } | 1522 | } |
1532 | 1523 | ||
1533 | data->vrm = vid_which_vrm(); | 1524 | data->vrm = vid_which_vrm(); |
1534 | 1525 | ||
1535 | if ((type != w83781d) && (type != as99127f)) { | 1526 | if ((type != w83781d) && (type != as99127f)) { |
1536 | tmp = w83781d_read_value(client, W83781D_REG_SCFG1); | 1527 | tmp = w83781d_read_value(data, W83781D_REG_SCFG1); |
1537 | for (i = 1; i <= 3; i++) { | 1528 | for (i = 1; i <= 3; i++) { |
1538 | if (!(tmp & BIT_SCFG1[i - 1])) { | 1529 | if (!(tmp & BIT_SCFG1[i - 1])) { |
1539 | data->sens[i - 1] = W83781D_DEFAULT_BETA; | 1530 | data->sens[i - 1] = W83781D_DEFAULT_BETA; |
1540 | } else { | 1531 | } else { |
1541 | if (w83781d_read_value | 1532 | if (w83781d_read_value |
1542 | (client, | 1533 | (data, |
1543 | W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) | 1534 | W83781D_REG_SCFG2) & BIT_SCFG2[i - 1]) |
1544 | data->sens[i - 1] = 1; | 1535 | data->sens[i - 1] = 1; |
1545 | else | 1536 | else |
@@ -1552,36 +1543,36 @@ w83781d_init_device(struct device *dev) | |||
1552 | 1543 | ||
1553 | if (init && type != as99127f) { | 1544 | if (init && type != as99127f) { |
1554 | /* Enable temp2 */ | 1545 | /* Enable temp2 */ |
1555 | tmp = w83781d_read_value(client, W83781D_REG_TEMP2_CONFIG); | 1546 | tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG); |
1556 | if (tmp & 0x01) { | 1547 | if (tmp & 0x01) { |
1557 | dev_warn(dev, "Enabling temp2, readings " | 1548 | dev_warn(dev, "Enabling temp2, readings " |
1558 | "might not make sense\n"); | 1549 | "might not make sense\n"); |
1559 | w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG, | 1550 | w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG, |
1560 | tmp & 0xfe); | 1551 | tmp & 0xfe); |
1561 | } | 1552 | } |
1562 | 1553 | ||
1563 | /* Enable temp3 */ | 1554 | /* Enable temp3 */ |
1564 | if (type != w83783s) { | 1555 | if (type != w83783s) { |
1565 | tmp = w83781d_read_value(client, | 1556 | tmp = w83781d_read_value(data, |
1566 | W83781D_REG_TEMP3_CONFIG); | 1557 | W83781D_REG_TEMP3_CONFIG); |
1567 | if (tmp & 0x01) { | 1558 | if (tmp & 0x01) { |
1568 | dev_warn(dev, "Enabling temp3, " | 1559 | dev_warn(dev, "Enabling temp3, " |
1569 | "readings might not make sense\n"); | 1560 | "readings might not make sense\n"); |
1570 | w83781d_write_value(client, | 1561 | w83781d_write_value(data, |
1571 | W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); | 1562 | W83781D_REG_TEMP3_CONFIG, tmp & 0xfe); |
1572 | } | 1563 | } |
1573 | } | 1564 | } |
1574 | } | 1565 | } |
1575 | 1566 | ||
1576 | /* Start monitoring */ | 1567 | /* Start monitoring */ |
1577 | w83781d_write_value(client, W83781D_REG_CONFIG, | 1568 | w83781d_write_value(data, W83781D_REG_CONFIG, |
1578 | (w83781d_read_value(client, | 1569 | (w83781d_read_value(data, |
1579 | W83781D_REG_CONFIG) & 0xf7) | 1570 | W83781D_REG_CONFIG) & 0xf7) |
1580 | | 0x01); | 1571 | | 0x01); |
1581 | 1572 | ||
1582 | /* A few vars need to be filled upon startup */ | 1573 | /* A few vars need to be filled upon startup */ |
1583 | for (i = 1; i <= 3; i++) { | 1574 | for (i = 1; i <= 3; i++) { |
1584 | data->fan_min[i - 1] = w83781d_read_value(client, | 1575 | data->fan_min[i - 1] = w83781d_read_value(data, |
1585 | W83781D_REG_FAN_MIN(i)); | 1576 | W83781D_REG_FAN_MIN(i)); |
1586 | } | 1577 | } |
1587 | if (type != w83781d && type != as99127f) | 1578 | if (type != w83781d && type != as99127f) |
@@ -1607,97 +1598,97 @@ static struct w83781d_data *w83781d_update_device(struct device *dev) | |||
1607 | if (data->type == w83783s && i == 1) | 1598 | if (data->type == w83783s && i == 1) |
1608 | continue; /* 783S has no in1 */ | 1599 | continue; /* 783S has no in1 */ |
1609 | data->in[i] = | 1600 | data->in[i] = |
1610 | w83781d_read_value(client, W83781D_REG_IN(i)); | 1601 | w83781d_read_value(data, W83781D_REG_IN(i)); |
1611 | data->in_min[i] = | 1602 | data->in_min[i] = |
1612 | w83781d_read_value(client, W83781D_REG_IN_MIN(i)); | 1603 | w83781d_read_value(data, W83781D_REG_IN_MIN(i)); |
1613 | data->in_max[i] = | 1604 | data->in_max[i] = |
1614 | w83781d_read_value(client, W83781D_REG_IN_MAX(i)); | 1605 | w83781d_read_value(data, W83781D_REG_IN_MAX(i)); |
1615 | if ((data->type != w83782d) | 1606 | if ((data->type != w83782d) |
1616 | && (data->type != w83627hf) && (i == 6)) | 1607 | && (data->type != w83627hf) && (i == 6)) |
1617 | break; | 1608 | break; |
1618 | } | 1609 | } |
1619 | for (i = 1; i <= 3; i++) { | 1610 | for (i = 1; i <= 3; i++) { |
1620 | data->fan[i - 1] = | 1611 | data->fan[i - 1] = |
1621 | w83781d_read_value(client, W83781D_REG_FAN(i)); | 1612 | w83781d_read_value(data, W83781D_REG_FAN(i)); |
1622 | data->fan_min[i - 1] = | 1613 | data->fan_min[i - 1] = |
1623 | w83781d_read_value(client, W83781D_REG_FAN_MIN(i)); | 1614 | w83781d_read_value(data, W83781D_REG_FAN_MIN(i)); |
1624 | } | 1615 | } |
1625 | if (data->type != w83781d && data->type != as99127f) { | 1616 | if (data->type != w83781d && data->type != as99127f) { |
1626 | for (i = 1; i <= 4; i++) { | 1617 | for (i = 1; i <= 4; i++) { |
1627 | data->pwm[i - 1] = | 1618 | data->pwm[i - 1] = |
1628 | w83781d_read_value(client, | 1619 | w83781d_read_value(data, |
1629 | W83781D_REG_PWM(i)); | 1620 | W83781D_REG_PWM(i)); |
1630 | if ((data->type != w83782d || !client->driver) | 1621 | if ((data->type != w83782d || !client->driver) |
1631 | && i == 2) | 1622 | && i == 2) |
1632 | break; | 1623 | break; |
1633 | } | 1624 | } |
1634 | /* Only PWM2 can be disabled */ | 1625 | /* Only PWM2 can be disabled */ |
1635 | data->pwmenable[1] = (w83781d_read_value(client, | 1626 | data->pwmenable[1] = (w83781d_read_value(data, |
1636 | W83781D_REG_PWMCLK12) & 0x08) >> 3; | 1627 | W83781D_REG_PWMCLK12) & 0x08) >> 3; |
1637 | } | 1628 | } |
1638 | 1629 | ||
1639 | data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1)); | 1630 | data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1)); |
1640 | data->temp_max = | 1631 | data->temp_max = |
1641 | w83781d_read_value(client, W83781D_REG_TEMP_OVER(1)); | 1632 | w83781d_read_value(data, W83781D_REG_TEMP_OVER(1)); |
1642 | data->temp_max_hyst = | 1633 | data->temp_max_hyst = |
1643 | w83781d_read_value(client, W83781D_REG_TEMP_HYST(1)); | 1634 | w83781d_read_value(data, W83781D_REG_TEMP_HYST(1)); |
1644 | data->temp_add[0] = | 1635 | data->temp_add[0] = |
1645 | w83781d_read_value(client, W83781D_REG_TEMP(2)); | 1636 | w83781d_read_value(data, W83781D_REG_TEMP(2)); |
1646 | data->temp_max_add[0] = | 1637 | data->temp_max_add[0] = |
1647 | w83781d_read_value(client, W83781D_REG_TEMP_OVER(2)); | 1638 | w83781d_read_value(data, W83781D_REG_TEMP_OVER(2)); |
1648 | data->temp_max_hyst_add[0] = | 1639 | data->temp_max_hyst_add[0] = |
1649 | w83781d_read_value(client, W83781D_REG_TEMP_HYST(2)); | 1640 | w83781d_read_value(data, W83781D_REG_TEMP_HYST(2)); |
1650 | if (data->type != w83783s) { | 1641 | if (data->type != w83783s) { |
1651 | data->temp_add[1] = | 1642 | data->temp_add[1] = |
1652 | w83781d_read_value(client, W83781D_REG_TEMP(3)); | 1643 | w83781d_read_value(data, W83781D_REG_TEMP(3)); |
1653 | data->temp_max_add[1] = | 1644 | data->temp_max_add[1] = |
1654 | w83781d_read_value(client, | 1645 | w83781d_read_value(data, |
1655 | W83781D_REG_TEMP_OVER(3)); | 1646 | W83781D_REG_TEMP_OVER(3)); |
1656 | data->temp_max_hyst_add[1] = | 1647 | data->temp_max_hyst_add[1] = |
1657 | w83781d_read_value(client, | 1648 | w83781d_read_value(data, |
1658 | W83781D_REG_TEMP_HYST(3)); | 1649 | W83781D_REG_TEMP_HYST(3)); |
1659 | } | 1650 | } |
1660 | i = w83781d_read_value(client, W83781D_REG_VID_FANDIV); | 1651 | i = w83781d_read_value(data, W83781D_REG_VID_FANDIV); |
1661 | data->vid = i & 0x0f; | 1652 | data->vid = i & 0x0f; |
1662 | data->vid |= (w83781d_read_value(client, | 1653 | data->vid |= (w83781d_read_value(data, |
1663 | W83781D_REG_CHIPID) & 0x01) << 4; | 1654 | W83781D_REG_CHIPID) & 0x01) << 4; |
1664 | data->fan_div[0] = (i >> 4) & 0x03; | 1655 | data->fan_div[0] = (i >> 4) & 0x03; |
1665 | data->fan_div[1] = (i >> 6) & 0x03; | 1656 | data->fan_div[1] = (i >> 6) & 0x03; |
1666 | data->fan_div[2] = (w83781d_read_value(client, | 1657 | data->fan_div[2] = (w83781d_read_value(data, |
1667 | W83781D_REG_PIN) >> 6) & 0x03; | 1658 | W83781D_REG_PIN) >> 6) & 0x03; |
1668 | if ((data->type != w83781d) && (data->type != as99127f)) { | 1659 | if ((data->type != w83781d) && (data->type != as99127f)) { |
1669 | i = w83781d_read_value(client, W83781D_REG_VBAT); | 1660 | i = w83781d_read_value(data, W83781D_REG_VBAT); |
1670 | data->fan_div[0] |= (i >> 3) & 0x04; | 1661 | data->fan_div[0] |= (i >> 3) & 0x04; |
1671 | data->fan_div[1] |= (i >> 4) & 0x04; | 1662 | data->fan_div[1] |= (i >> 4) & 0x04; |
1672 | data->fan_div[2] |= (i >> 5) & 0x04; | 1663 | data->fan_div[2] |= (i >> 5) & 0x04; |
1673 | } | 1664 | } |
1674 | if ((data->type == w83782d) || (data->type == w83627hf)) { | 1665 | if ((data->type == w83782d) || (data->type == w83627hf)) { |
1675 | data->alarms = w83781d_read_value(client, | 1666 | data->alarms = w83781d_read_value(data, |
1676 | W83782D_REG_ALARM1) | 1667 | W83782D_REG_ALARM1) |
1677 | | (w83781d_read_value(client, | 1668 | | (w83781d_read_value(data, |
1678 | W83782D_REG_ALARM2) << 8) | 1669 | W83782D_REG_ALARM2) << 8) |
1679 | | (w83781d_read_value(client, | 1670 | | (w83781d_read_value(data, |
1680 | W83782D_REG_ALARM3) << 16); | 1671 | W83782D_REG_ALARM3) << 16); |
1681 | } else if (data->type == w83783s) { | 1672 | } else if (data->type == w83783s) { |
1682 | data->alarms = w83781d_read_value(client, | 1673 | data->alarms = w83781d_read_value(data, |
1683 | W83782D_REG_ALARM1) | 1674 | W83782D_REG_ALARM1) |
1684 | | (w83781d_read_value(client, | 1675 | | (w83781d_read_value(data, |
1685 | W83782D_REG_ALARM2) << 8); | 1676 | W83782D_REG_ALARM2) << 8); |
1686 | } else { | 1677 | } else { |
1687 | /* No real-time status registers, fall back to | 1678 | /* No real-time status registers, fall back to |
1688 | interrupt status registers */ | 1679 | interrupt status registers */ |
1689 | data->alarms = w83781d_read_value(client, | 1680 | data->alarms = w83781d_read_value(data, |
1690 | W83781D_REG_ALARM1) | 1681 | W83781D_REG_ALARM1) |
1691 | | (w83781d_read_value(client, | 1682 | | (w83781d_read_value(data, |
1692 | W83781D_REG_ALARM2) << 8); | 1683 | W83781D_REG_ALARM2) << 8); |
1693 | } | 1684 | } |
1694 | i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2); | 1685 | i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2); |
1695 | data->beep_enable = i >> 7; | 1686 | data->beep_enable = i >> 7; |
1696 | data->beep_mask = ((i & 0x7f) << 8) + | 1687 | data->beep_mask = ((i & 0x7f) << 8) + |
1697 | w83781d_read_value(client, W83781D_REG_BEEP_INTS1); | 1688 | w83781d_read_value(data, W83781D_REG_BEEP_INTS1); |
1698 | if ((data->type != w83781d) && (data->type != as99127f)) { | 1689 | if ((data->type != w83781d) && (data->type != as99127f)) { |
1699 | data->beep_mask |= | 1690 | data->beep_mask |= |
1700 | w83781d_read_value(client, | 1691 | w83781d_read_value(data, |
1701 | W83781D_REG_BEEP_INTS3) << 16; | 1692 | W83781D_REG_BEEP_INTS3) << 16; |
1702 | } | 1693 | } |
1703 | data->last_updated = jiffies; | 1694 | data->last_updated = jiffies; |