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path: root/drivers/hwmon/w83627hf.c
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Diffstat (limited to 'drivers/hwmon/w83627hf.c')
-rw-r--r--drivers/hwmon/w83627hf.c96
1 files changed, 42 insertions, 54 deletions
diff --git a/drivers/hwmon/w83627hf.c b/drivers/hwmon/w83627hf.c
index 2be28ac4ede0..b257c7223733 100644
--- a/drivers/hwmon/w83627hf.c
+++ b/drivers/hwmon/w83627hf.c
@@ -59,10 +59,11 @@ static struct platform_device *pdev;
59#define DRVNAME "w83627hf" 59#define DRVNAME "w83627hf"
60enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf }; 60enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
61 61
62static u16 force_addr; 62struct w83627hf_sio_data {
63module_param(force_addr, ushort, 0); 63 enum chips type;
64MODULE_PARM_DESC(force_addr, 64 int sioaddr;
65 "Initialize the base address of the sensors"); 65};
66
66static u8 force_i2c = 0x1f; 67static u8 force_i2c = 0x1f;
67module_param(force_i2c, byte, 0); 68module_param(force_i2c, byte, 0);
68MODULE_PARM_DESC(force_i2c, 69MODULE_PARM_DESC(force_i2c,
@@ -77,9 +78,7 @@ module_param(force_id, ushort, 0);
77MODULE_PARM_DESC(force_id, "Override the detected device ID"); 78MODULE_PARM_DESC(force_id, "Override the detected device ID");
78 79
79/* modified from kernel/include/traps.c */ 80/* modified from kernel/include/traps.c */
80static int REG; /* The register to read/write */
81#define DEV 0x07 /* Register: Logical device select */ 81#define DEV 0x07 /* Register: Logical device select */
82static int VAL; /* The value to read/write */
83 82
84/* logical device numbers for superio_select (below) */ 83/* logical device numbers for superio_select (below) */
85#define W83627HF_LD_FDC 0x00 84#define W83627HF_LD_FDC 0x00
@@ -109,37 +108,37 @@ static int VAL; /* The value to read/write */
109#define W83687THF_VID_DATA 0xF1 /* w83687thf only */ 108#define W83687THF_VID_DATA 0xF1 /* w83687thf only */
110 109
111static inline void 110static inline void
112superio_outb(int reg, int val) 111superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
113{ 112{
114 outb(reg, REG); 113 outb(reg, sio->sioaddr);
115 outb(val, VAL); 114 outb(val, sio->sioaddr + 1);
116} 115}
117 116
118static inline int 117static inline int
119superio_inb(int reg) 118superio_inb(struct w83627hf_sio_data *sio, int reg)
120{ 119{
121 outb(reg, REG); 120 outb(reg, sio->sioaddr);
122 return inb(VAL); 121 return inb(sio->sioaddr + 1);
123} 122}
124 123
125static inline void 124static inline void
126superio_select(int ld) 125superio_select(struct w83627hf_sio_data *sio, int ld)
127{ 126{
128 outb(DEV, REG); 127 outb(DEV, sio->sioaddr);
129 outb(ld, VAL); 128 outb(ld, sio->sioaddr + 1);
130} 129}
131 130
132static inline void 131static inline void
133superio_enter(void) 132superio_enter(struct w83627hf_sio_data *sio)
134{ 133{
135 outb(0x87, REG); 134 outb(0x87, sio->sioaddr);
136 outb(0x87, REG); 135 outb(0x87, sio->sioaddr);
137} 136}
138 137
139static inline void 138static inline void
140superio_exit(void) 139superio_exit(struct w83627hf_sio_data *sio)
141{ 140{
142 outb(0xAA, REG); 141 outb(0xAA, sio->sioaddr);
143} 142}
144 143
145#define W627_DEVID 0x52 144#define W627_DEVID 0x52
@@ -380,10 +379,6 @@ struct w83627hf_data {
380 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */ 379 u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
381}; 380};
382 381
383struct w83627hf_sio_data {
384 enum chips type;
385};
386
387 382
388static int w83627hf_probe(struct platform_device *pdev); 383static int w83627hf_probe(struct platform_device *pdev);
389static int __devexit w83627hf_remove(struct platform_device *pdev); 384static int __devexit w83627hf_remove(struct platform_device *pdev);
@@ -1140,11 +1135,8 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1140 "W83687THF", 1135 "W83687THF",
1141 }; 1136 };
1142 1137
1143 REG = sioaddr; 1138 superio_enter(sio_data);
1144 VAL = sioaddr + 1; 1139 val = force_id ? force_id : superio_inb(sio_data, DEVID);
1145
1146 superio_enter();
1147 val = force_id ? force_id : superio_inb(DEVID);
1148 switch (val) { 1140 switch (val) {
1149 case W627_DEVID: 1141 case W627_DEVID:
1150 sio_data->type = w83627hf; 1142 sio_data->type = w83627hf;
@@ -1168,16 +1160,9 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1168 goto exit; 1160 goto exit;
1169 } 1161 }
1170 1162
1171 superio_select(W83627HF_LD_HWM); 1163 superio_select(sio_data, W83627HF_LD_HWM);
1172 force_addr &= WINB_ALIGNMENT; 1164 val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
1173 if (force_addr) { 1165 superio_inb(sio_data, WINB_BASE_REG + 1);
1174 printk(KERN_WARNING DRVNAME ": Forcing address 0x%x\n",
1175 force_addr);
1176 superio_outb(WINB_BASE_REG, force_addr >> 8);
1177 superio_outb(WINB_BASE_REG + 1, force_addr & 0xff);
1178 }
1179 val = (superio_inb(WINB_BASE_REG) << 8) |
1180 superio_inb(WINB_BASE_REG + 1);
1181 *addr = val & WINB_ALIGNMENT; 1166 *addr = val & WINB_ALIGNMENT;
1182 if (*addr == 0) { 1167 if (*addr == 0) {
1183 printk(KERN_WARNING DRVNAME ": Base address not set, " 1168 printk(KERN_WARNING DRVNAME ": Base address not set, "
@@ -1185,18 +1170,19 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr,
1185 goto exit; 1170 goto exit;
1186 } 1171 }
1187 1172
1188 val = superio_inb(WINB_ACT_REG); 1173 val = superio_inb(sio_data, WINB_ACT_REG);
1189 if (!(val & 0x01)) { 1174 if (!(val & 0x01)) {
1190 printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n"); 1175 printk(KERN_WARNING DRVNAME ": Enabling HWM logical device\n");
1191 superio_outb(WINB_ACT_REG, val | 0x01); 1176 superio_outb(sio_data, WINB_ACT_REG, val | 0x01);
1192 } 1177 }
1193 1178
1194 err = 0; 1179 err = 0;
1180 sio_data->sioaddr = sioaddr;
1195 pr_info(DRVNAME ": Found %s chip at %#x\n", 1181 pr_info(DRVNAME ": Found %s chip at %#x\n",
1196 names[sio_data->type], *addr); 1182 names[sio_data->type], *addr);
1197 1183
1198 exit: 1184 exit:
1199 superio_exit(); 1185 superio_exit(sio_data);
1200 return err; 1186 return err;
1201} 1187}
1202 1188
@@ -1511,20 +1497,21 @@ static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
1511 1497
1512static int __devinit w83627thf_read_gpio5(struct platform_device *pdev) 1498static int __devinit w83627thf_read_gpio5(struct platform_device *pdev)
1513{ 1499{
1500 struct w83627hf_sio_data *sio_data = pdev->dev.platform_data;
1514 int res = 0xff, sel; 1501 int res = 0xff, sel;
1515 1502
1516 superio_enter(); 1503 superio_enter(sio_data);
1517 superio_select(W83627HF_LD_GPIO5); 1504 superio_select(sio_data, W83627HF_LD_GPIO5);
1518 1505
1519 /* Make sure these GPIO pins are enabled */ 1506 /* Make sure these GPIO pins are enabled */
1520 if (!(superio_inb(W83627THF_GPIO5_EN) & (1<<3))) { 1507 if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
1521 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n"); 1508 dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
1522 goto exit; 1509 goto exit;
1523 } 1510 }
1524 1511
1525 /* Make sure the pins are configured for input 1512 /* Make sure the pins are configured for input
1526 There must be at least five (VRM 9), and possibly 6 (VRM 10) */ 1513 There must be at least five (VRM 9), and possibly 6 (VRM 10) */
1527 sel = superio_inb(W83627THF_GPIO5_IOSR) & 0x3f; 1514 sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f;
1528 if ((sel & 0x1f) != 0x1f) { 1515 if ((sel & 0x1f) != 0x1f) {
1529 dev_dbg(&pdev->dev, "GPIO5 not configured for VID " 1516 dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
1530 "function\n"); 1517 "function\n");
@@ -1532,37 +1519,38 @@ static int __devinit w83627thf_read_gpio5(struct platform_device *pdev)
1532 } 1519 }
1533 1520
1534 dev_info(&pdev->dev, "Reading VID from GPIO5\n"); 1521 dev_info(&pdev->dev, "Reading VID from GPIO5\n");
1535 res = superio_inb(W83627THF_GPIO5_DR) & sel; 1522 res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel;
1536 1523
1537exit: 1524exit:
1538 superio_exit(); 1525 superio_exit(sio_data);
1539 return res; 1526 return res;
1540} 1527}
1541 1528
1542static int __devinit w83687thf_read_vid(struct platform_device *pdev) 1529static int __devinit w83687thf_read_vid(struct platform_device *pdev)
1543{ 1530{
1531 struct w83627hf_sio_data *sio_data = pdev->dev.platform_data;
1544 int res = 0xff; 1532 int res = 0xff;
1545 1533
1546 superio_enter(); 1534 superio_enter(sio_data);
1547 superio_select(W83627HF_LD_HWM); 1535 superio_select(sio_data, W83627HF_LD_HWM);
1548 1536
1549 /* Make sure these GPIO pins are enabled */ 1537 /* Make sure these GPIO pins are enabled */
1550 if (!(superio_inb(W83687THF_VID_EN) & (1 << 2))) { 1538 if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) {
1551 dev_dbg(&pdev->dev, "VID disabled, no VID function\n"); 1539 dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
1552 goto exit; 1540 goto exit;
1553 } 1541 }
1554 1542
1555 /* Make sure the pins are configured for input */ 1543 /* Make sure the pins are configured for input */
1556 if (!(superio_inb(W83687THF_VID_CFG) & (1 << 4))) { 1544 if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) {
1557 dev_dbg(&pdev->dev, "VID configured as output, " 1545 dev_dbg(&pdev->dev, "VID configured as output, "
1558 "no VID function\n"); 1546 "no VID function\n");
1559 goto exit; 1547 goto exit;
1560 } 1548 }
1561 1549
1562 res = superio_inb(W83687THF_VID_DATA) & 0x3f; 1550 res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f;
1563 1551
1564exit: 1552exit:
1565 superio_exit(); 1553 superio_exit(sio_data);
1566 return res; 1554 return res;
1567} 1555}
1568 1556