1 files changed, 69 insertions, 24 deletions

diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index e9b7fbc5a447..2988da150ed6 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -241,6 +241,55 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
         return tjmax;
 }
 
+static int __devinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
+                               struct device *dev)
+{
+        /* The 100C is default for both mobile and non mobile CPUs */
+        int err;
+        u32 eax, edx;
+        u32 val;
+
+        /* A new feature of current Intel(R) processors, the
+           IA32_TEMPERATURE_TARGET contains the TjMax value */
+        err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
+        if (err) {
+                dev_warn(dev, "Unable to read TjMax from CPU.\n");
+        } else {
+                val = (eax >> 16) & 0xff;
+                /*
+                 * If the TjMax is not plausible, an assumption
+                 * will be used
+                 */
+                if ((val > 80) && (val < 120)) {
+                        dev_info(dev, "TjMax is %d C.\n", val);
+                        return val * 1000;
+                }
+        }
+
+        /*
+         * An assumption is made for early CPUs and unreadable MSR.
+         * NOTE: the given value may not be correct.
+         */
+
+        switch (c->x86_model) {
+        case 0xe:
+        case 0xf:
+        case 0x16:
+        case 0x1a:
+                dev_warn(dev, "TjMax is assumed as 100 C!\n");
+                return 100000;
+                break;
+        case 0x17:
+        case 0x1c:              /* Atom CPUs */
+                return adjust_tjmax(c, id, dev);
+                break;
+        default:
+                dev_warn(dev, "CPU (model=0x%x) is not supported yet,"
+                        " using default TjMax of 100C.\n", c->x86_model);
+                return 100000;
+        }
+}
+
 static int __devinit coretemp_probe(struct platform_device *pdev)
 {
         struct coretemp_data *data;
@@ -283,14 +332,18 @@ static int __devinit coretemp_probe(struct platform_device *pdev)
                 }
         }
 
-        data->tjmax = adjust_tjmax(c, data->id, &pdev->dev);
+        data->tjmax = get_tjmax(c, data->id, &pdev->dev);
         platform_set_drvdata(pdev, data);
 
-        /* read the still undocumented IA32_TEMPERATURE_TARGET it exists
-           on older CPUs but not in this register, Atoms don't have it either */
+        /*
+         * read the still undocumented IA32_TEMPERATURE_TARGET. It exists
+         * on older CPUs but not in this register,
+         * Atoms don't have it either.
+         */
 
         if ((c->x86_model > 0xe) && (c->x86_model != 0x1c)) {
-                err = rdmsr_safe_on_cpu(data->id, 0x1a2, &eax, &edx);
+                err = rdmsr_safe_on_cpu(data->id, MSR_IA32_TEMPERATURE_TARGET,
+                    &eax, &edx);
                 if (err) {
                         dev_warn(&pdev->dev, "Unable to read"
                                         " IA32_TEMPERATURE_TARGET MSR\n");
@@ -451,28 +504,20 @@ static int __init coretemp_init(void)
 
         for_each_online_cpu(i) {
                 struct cpuinfo_x86 *c = &cpu_data(i);
+                /*
+                 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
+                 * sensors. We check this bit only, all the early CPUs
+                 * without thermal sensors will be filtered out.
+                 */
+                if (c->cpuid_level >= 6 && (cpuid_eax(0x06) & 0x01)) {
+                        err = coretemp_device_add(i);
+                        if (err)
+                                goto exit_devices_unreg;
 
-                /* check if family 6, models 0xe (Pentium M DC),
-                  0xf (Core 2 DC 65nm), 0x16 (Core 2 SC 65nm),
-                  0x17 (Penryn 45nm), 0x1a (Nehalem), 0x1c (Atom),
-                  0x1e (Lynnfield) */
-                if ((c->cpuid_level < 0) || (c->x86 != 0x6) ||
-                    !((c->x86_model == 0xe) || (c->x86_model == 0xf) ||
-                        (c->x86_model == 0x16) || (c->x86_model == 0x17) ||
-                        (c->x86_model == 0x1a) || (c->x86_model == 0x1c) ||
-                        (c->x86_model == 0x1e))) {
-
-                        /* supported CPU not found, but report the unknown
-                           family 6 CPU */
-                        if ((c->x86 == 0x6) && (c->x86_model > 0xf))
-                                printk(KERN_WARNING DRVNAME ": Unknown CPU "
-                                        "model 0x%x\n", c->x86_model);
-                        continue;
+                } else {
+                        printk(KERN_INFO DRVNAME ": CPU (model=0x%x)"
+                                " has no thermal sensor.\n", c->x86_model);
                 }
-
-                err = coretemp_device_add(i);
-                if (err)
-                        goto exit_devices_unreg;
         }
         if (list_empty(&pdev_list)) {
                 err = -ENODEV;