1 files changed, 19 insertions, 10 deletions

diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 972cf4ba963c..4c15ed7eb786 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -157,17 +157,24 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
         /* The 100C is default for both mobile and non mobile CPUs */
 
         int tjmax = 100000;
-        int ismobile = 1;
+        int usemsr_ee = 1;
         int err;
         u32 eax, edx;
 
         /* Early chips have no MSR for TjMax */
 
         if ((c->x86_model == 0xf) && (c->x86_mask < 4)) {
-                ismobile = 0;
+                usemsr_ee = 0;
         }
 
-        if ((c->x86_model > 0xe) && (ismobile)) {
+        /* Atoms seems to have TjMax at 90C */
+
+        if (c->x86_model == 0x1c) {
+                usemsr_ee = 0;
+                tjmax = 90000;
+        }
+
+        if ((c->x86_model > 0xe) && (usemsr_ee)) {
 
                 /* Now we can detect the mobile CPU using Intel provided table
                    http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
@@ -179,13 +186,13 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
                         dev_warn(dev,
                                  "Unable to access MSR 0x17, assuming desktop"
                                  " CPU\n");
-                        ismobile = 0;
+                        usemsr_ee = 0;
                 } else if (!(eax & 0x10000000)) {
-                        ismobile = 0;
+                        usemsr_ee = 0;
                 }
         }
 
-        if (ismobile || c->x86_model == 0x1c) {
+        if (usemsr_ee) {
 
                 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
                 if (err) {
@@ -195,7 +202,9 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
                 } else if (eax & 0x40000000) {
                         tjmax = 85000;
                 }
-        } else {
+        /* if we dont use msr EE it means we are desktop CPU (with exeception
+           of Atom) */
+        } else if (tjmax == 100000) {
                 dev_warn(dev, "Using relative temperature scale!\n");
         }
 
@@ -248,9 +257,9 @@ static int __devinit coretemp_probe(struct platform_device *pdev)
         platform_set_drvdata(pdev, data);
 
         /* read the still undocumented IA32_TEMPERATURE_TARGET it exists
-           on older CPUs but not in this register */
+           on older CPUs but not in this register, Atoms don't have it either */
 
-        if (c->x86_model > 0xe) {
+        if ((c->x86_model > 0xe) && (c->x86_model != 0x1c)) {
                 err = rdmsr_safe_on_cpu(data->id, 0x1a2, &eax, &edx);
                 if (err) {
                         dev_warn(&pdev->dev, "Unable to read"
@@ -413,7 +422,7 @@ static int __init coretemp_init(void)
         for_each_online_cpu(i) {
                 struct cpuinfo_x86 *c = &cpu_data(i);
 
-                /* check if family 6, models 0xe, 0xf, 0x16, 0x17, 0x1A */
+                /* check if family 6, models 0xe, 0xf, 0x16, 0x17, 0x1A, 0x1c */
                 if ((c->cpuid_level < 0) || (c->x86 != 0x6) ||
                     !((c->x86_model == 0xe) || (c->x86_model == 0xf) ||
                         (c->x86_model == 0x16) || (c->x86_model == 0x17) ||