diff options
Diffstat (limited to 'drivers/hwmon/abituguru3.c')
-rw-r--r-- | drivers/hwmon/abituguru3.c | 1141 |
1 files changed, 1141 insertions, 0 deletions
diff --git a/drivers/hwmon/abituguru3.c b/drivers/hwmon/abituguru3.c new file mode 100644 index 000000000000..cdd8b6dea16d --- /dev/null +++ b/drivers/hwmon/abituguru3.c | |||
@@ -0,0 +1,1141 @@ | |||
1 | /* | ||
2 | abituguru3.c Copyright (c) 2006 Hans de Goede <j.w.r.degoede@hhs.nl> | ||
3 | |||
4 | This program is free software; you can redistribute it and/or modify | ||
5 | it under the terms of the GNU General Public License as published by | ||
6 | the Free Software Foundation; either version 2 of the License, or | ||
7 | (at your option) any later version. | ||
8 | |||
9 | This program is distributed in the hope that it will be useful, | ||
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | GNU General Public License for more details. | ||
13 | |||
14 | You should have received a copy of the GNU General Public License | ||
15 | along with this program; if not, write to the Free Software | ||
16 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
17 | */ | ||
18 | /* | ||
19 | This driver supports the sensor part of revision 3 of the custom Abit uGuru | ||
20 | chip found on newer Abit uGuru motherboards. Note: because of lack of specs | ||
21 | only reading the sensors and their settings is supported. | ||
22 | */ | ||
23 | #include <linux/module.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/slab.h> | ||
26 | #include <linux/jiffies.h> | ||
27 | #include <linux/mutex.h> | ||
28 | #include <linux/err.h> | ||
29 | #include <linux/delay.h> | ||
30 | #include <linux/platform_device.h> | ||
31 | #include <linux/hwmon.h> | ||
32 | #include <linux/hwmon-sysfs.h> | ||
33 | #include <asm/io.h> | ||
34 | |||
35 | /* uGuru3 bank addresses */ | ||
36 | #define ABIT_UGURU3_SETTINGS_BANK 0x01 | ||
37 | #define ABIT_UGURU3_SENSORS_BANK 0x08 | ||
38 | #define ABIT_UGURU3_MISC_BANK 0x09 | ||
39 | #define ABIT_UGURU3_ALARMS_START 0x1E | ||
40 | #define ABIT_UGURU3_SETTINGS_START 0x24 | ||
41 | #define ABIT_UGURU3_VALUES_START 0x80 | ||
42 | #define ABIT_UGURU3_BOARD_ID 0x0A | ||
43 | /* uGuru3 sensor bank flags */ /* Alarm if: */ | ||
44 | #define ABIT_UGURU3_TEMP_HIGH_ALARM_ENABLE 0x01 /* temp over warn */ | ||
45 | #define ABIT_UGURU3_VOLT_HIGH_ALARM_ENABLE 0x02 /* volt over max */ | ||
46 | #define ABIT_UGURU3_VOLT_LOW_ALARM_ENABLE 0x04 /* volt under min */ | ||
47 | #define ABIT_UGURU3_TEMP_HIGH_ALARM_FLAG 0x10 /* temp is over warn */ | ||
48 | #define ABIT_UGURU3_VOLT_HIGH_ALARM_FLAG 0x20 /* volt is over max */ | ||
49 | #define ABIT_UGURU3_VOLT_LOW_ALARM_FLAG 0x40 /* volt is under min */ | ||
50 | #define ABIT_UGURU3_FAN_LOW_ALARM_ENABLE 0x01 /* fan under min */ | ||
51 | #define ABIT_UGURU3_BEEP_ENABLE 0x08 /* beep if alarm */ | ||
52 | #define ABIT_UGURU3_SHUTDOWN_ENABLE 0x80 /* shutdown if alarm */ | ||
53 | /* sensor types */ | ||
54 | #define ABIT_UGURU3_IN_SENSOR 0 | ||
55 | #define ABIT_UGURU3_TEMP_SENSOR 1 | ||
56 | #define ABIT_UGURU3_FAN_SENSOR 2 | ||
57 | |||
58 | /* Timeouts / Retries, if these turn out to need a lot of fiddling we could | ||
59 | convert them to params. Determined by trial and error. I assume this is | ||
60 | cpu-speed independent, since the ISA-bus and not the CPU should be the | ||
61 | bottleneck. */ | ||
62 | #define ABIT_UGURU3_WAIT_TIMEOUT 250 | ||
63 | /* Normally the 0xAC at the end of synchronize() is reported after the | ||
64 | first read, but sometimes not and we need to poll */ | ||
65 | #define ABIT_UGURU3_SYNCHRONIZE_TIMEOUT 5 | ||
66 | /* utility macros */ | ||
67 | #define ABIT_UGURU3_NAME "abituguru3" | ||
68 | #define ABIT_UGURU3_DEBUG(format, arg...) \ | ||
69 | if (verbose) \ | ||
70 | printk(KERN_DEBUG ABIT_UGURU3_NAME ": " format , ## arg) | ||
71 | |||
72 | /* Macros to help calculate the sysfs_names array length */ | ||
73 | #define ABIT_UGURU3_MAX_NO_SENSORS 26 | ||
74 | /* sum of strlen +1 of: in??_input\0, in??_{min,max}\0, in??_{min,max}_alarm\0, | ||
75 | in??_{min,max}_alarm_enable\0, in??_beep\0, in??_shutdown\0, in??_label\0 */ | ||
76 | #define ABIT_UGURU3_IN_NAMES_LENGTH (11 + 2 * 9 + 2 * 15 + 2 * 22 + 10 + 14 + 11) | ||
77 | /* sum of strlen +1 of: temp??_input\0, temp??_max\0, temp??_crit\0, | ||
78 | temp??_alarm\0, temp??_alarm_enable\0, temp??_beep\0, temp??_shutdown\0, | ||
79 | temp??_label\0 */ | ||
80 | #define ABIT_UGURU3_TEMP_NAMES_LENGTH (13 + 11 + 12 + 13 + 20 + 12 + 16 + 13) | ||
81 | /* sum of strlen +1 of: fan??_input\0, fan??_min\0, fan??_alarm\0, | ||
82 | fan??_alarm_enable\0, fan??_beep\0, fan??_shutdown\0, fan??_label\0 */ | ||
83 | #define ABIT_UGURU3_FAN_NAMES_LENGTH (12 + 10 + 12 + 19 + 11 + 15 + 12) | ||
84 | /* Worst case scenario 16 in sensors (longest names_length) and the rest | ||
85 | temp sensors (second longest names_length). */ | ||
86 | #define ABIT_UGURU3_SYSFS_NAMES_LENGTH (16 * ABIT_UGURU3_IN_NAMES_LENGTH + \ | ||
87 | (ABIT_UGURU3_MAX_NO_SENSORS - 16) * ABIT_UGURU3_TEMP_NAMES_LENGTH) | ||
88 | |||
89 | /* All the macros below are named identical to the openguru2 program | ||
90 | reverse engineered by Louis Kruger, hence the names might not be 100% | ||
91 | logical. I could come up with better names, but I prefer keeping the names | ||
92 | identical so that this driver can be compared with his work more easily. */ | ||
93 | /* Two i/o-ports are used by uGuru */ | ||
94 | #define ABIT_UGURU3_BASE 0x00E0 | ||
95 | #define ABIT_UGURU3_CMD 0x00 | ||
96 | #define ABIT_UGURU3_DATA 0x04 | ||
97 | #define ABIT_UGURU3_REGION_LENGTH 5 | ||
98 | /* The wait_xxx functions return this on success and the last contents | ||
99 | of the DATA register (0-255) on failure. */ | ||
100 | #define ABIT_UGURU3_SUCCESS -1 | ||
101 | /* uGuru status flags */ | ||
102 | #define ABIT_UGURU3_STATUS_READY_FOR_READ 0x01 | ||
103 | #define ABIT_UGURU3_STATUS_BUSY 0x02 | ||
104 | |||
105 | |||
106 | /* Structures */ | ||
107 | struct abituguru3_sensor_info { | ||
108 | const char* name; | ||
109 | int port; | ||
110 | int type; | ||
111 | int multiplier; | ||
112 | int divisor; | ||
113 | int offset; | ||
114 | }; | ||
115 | |||
116 | struct abituguru3_motherboard_info { | ||
117 | u16 id; | ||
118 | const char *name; | ||
119 | /* + 1 -> end of sensors indicated by a sensor with name == NULL */ | ||
120 | struct abituguru3_sensor_info sensors[ABIT_UGURU3_MAX_NO_SENSORS + 1]; | ||
121 | }; | ||
122 | |||
123 | /* For the Abit uGuru, we need to keep some data in memory. | ||
124 | The structure is dynamically allocated, at the same time when a new | ||
125 | abituguru3 device is allocated. */ | ||
126 | struct abituguru3_data { | ||
127 | struct class_device *class_dev; /* hwmon registered device */ | ||
128 | struct mutex update_lock; /* protect access to data and uGuru */ | ||
129 | unsigned short addr; /* uguru base address */ | ||
130 | char valid; /* !=0 if following fields are valid */ | ||
131 | unsigned long last_updated; /* In jiffies */ | ||
132 | |||
133 | /* For convenience the sysfs attr and their names are generated | ||
134 | automatically. We have max 10 entries per sensor (for in sensors) */ | ||
135 | struct sensor_device_attribute_2 sysfs_attr[ABIT_UGURU3_MAX_NO_SENSORS | ||
136 | * 10]; | ||
137 | |||
138 | /* Buffer to store the dynamically generated sysfs names */ | ||
139 | char sysfs_names[ABIT_UGURU3_SYSFS_NAMES_LENGTH]; | ||
140 | |||
141 | /* Pointer to the sensors info for the detected motherboard */ | ||
142 | const struct abituguru3_sensor_info *sensors; | ||
143 | |||
144 | /* The abituguru3 supports upto 48 sensors, and thus has registers | ||
145 | sets for 48 sensors, for convienence reasons / simplicity of the | ||
146 | code we always read and store all registers for all 48 sensors */ | ||
147 | |||
148 | /* Alarms for all 48 sensors (1 bit per sensor) */ | ||
149 | u8 alarms[48/8]; | ||
150 | |||
151 | /* Value of all 48 sensors */ | ||
152 | u8 value[48]; | ||
153 | |||
154 | /* Settings of all 48 sensors, note in and temp sensors (the first 32 | ||
155 | sensors) have 3 bytes of settings, while fans only have 2 bytes, | ||
156 | for convenience we use 3 bytes for all sensors */ | ||
157 | u8 settings[48][3]; | ||
158 | }; | ||
159 | |||
160 | |||
161 | /* Constants */ | ||
162 | static const struct abituguru3_motherboard_info abituguru3_motherboards[] = { | ||
163 | { 0x000C, "unknown", { | ||
164 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
165 | { "DDR", 1, 0, 10, 1, 0 }, | ||
166 | { "DDR VTT", 2, 0, 10, 1, 0 }, | ||
167 | { "CPU VTT 1.2V", 3, 0, 10, 1, 0 }, | ||
168 | { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 }, | ||
169 | { "MCH 2.5V", 5, 0, 20, 1, 0 }, | ||
170 | { "ICH 1.05V", 6, 0, 10, 1, 0 }, | ||
171 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
172 | { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, | ||
173 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
174 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
175 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
176 | { "CPU", 24, 1, 1, 1, 0 }, | ||
177 | { "System ", 25, 1, 1, 1, 0 }, | ||
178 | { "PWM", 26, 1, 1, 1, 0 }, | ||
179 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
180 | { "NB Fan", 33, 2, 60, 1, 0 }, | ||
181 | { "SYS FAN", 34, 2, 60, 1, 0 }, | ||
182 | { "AUX1 Fan", 35, 2, 60, 1, 0 }, | ||
183 | { NULL, 0, 0, 0, 0, 0 } } | ||
184 | }, | ||
185 | { 0x000D, "Abit AW8", { | ||
186 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
187 | { "DDR", 1, 0, 10, 1, 0 }, | ||
188 | { "DDR VTT", 2, 0, 10, 1, 0 }, | ||
189 | { "CPU VTT 1.2V", 3, 0, 10, 1, 0 }, | ||
190 | { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 }, | ||
191 | { "MCH 2.5V", 5, 0, 20, 1, 0 }, | ||
192 | { "ICH 1.05V", 6, 0, 10, 1, 0 }, | ||
193 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
194 | { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, | ||
195 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
196 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
197 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
198 | { "CPU", 24, 1, 1, 1, 0 }, | ||
199 | { "System ", 25, 1, 1, 1, 0 }, | ||
200 | { "PWM1", 26, 1, 1, 1, 0 }, | ||
201 | { "PWM2", 27, 1, 1, 1, 0 }, | ||
202 | { "PWM3", 28, 1, 1, 1, 0 }, | ||
203 | { "PWM4", 29, 1, 1, 1, 0 }, | ||
204 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
205 | { "NB Fan", 33, 2, 60, 1, 0 }, | ||
206 | { "SYS Fan", 34, 2, 60, 1, 0 }, | ||
207 | { "AUX1 Fan", 35, 2, 60, 1, 0 }, | ||
208 | { "AUX2 Fan", 36, 2, 60, 1, 0 }, | ||
209 | { "AUX3 Fan", 37, 2, 60, 1, 0 }, | ||
210 | { "AUX4 Fan", 38, 2, 60, 1, 0 }, | ||
211 | { "AUX5 Fan", 39, 2, 60, 1, 0 }, | ||
212 | { NULL, 0, 0, 0, 0, 0 } } | ||
213 | }, | ||
214 | { 0x000E, "AL-8", { | ||
215 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
216 | { "DDR", 1, 0, 10, 1, 0 }, | ||
217 | { "DDR VTT", 2, 0, 10, 1, 0 }, | ||
218 | { "CPU VTT 1.2V", 3, 0, 10, 1, 0 }, | ||
219 | { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 }, | ||
220 | { "MCH 2.5V", 5, 0, 20, 1, 0 }, | ||
221 | { "ICH 1.05V", 6, 0, 10, 1, 0 }, | ||
222 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
223 | { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, | ||
224 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
225 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
226 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
227 | { "CPU", 24, 1, 1, 1, 0 }, | ||
228 | { "System ", 25, 1, 1, 1, 0 }, | ||
229 | { "PWM", 26, 1, 1, 1, 0 }, | ||
230 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
231 | { "NB Fan", 33, 2, 60, 1, 0 }, | ||
232 | { "SYS Fan", 34, 2, 60, 1, 0 }, | ||
233 | { NULL, 0, 0, 0, 0, 0 } } | ||
234 | }, | ||
235 | { 0x000F, "unknown", { | ||
236 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
237 | { "DDR", 1, 0, 10, 1, 0 }, | ||
238 | { "DDR VTT", 2, 0, 10, 1, 0 }, | ||
239 | { "CPU VTT 1.2V", 3, 0, 10, 1, 0 }, | ||
240 | { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 }, | ||
241 | { "MCH 2.5V", 5, 0, 20, 1, 0 }, | ||
242 | { "ICH 1.05V", 6, 0, 10, 1, 0 }, | ||
243 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
244 | { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, | ||
245 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
246 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
247 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
248 | { "CPU", 24, 1, 1, 1, 0 }, | ||
249 | { "System ", 25, 1, 1, 1, 0 }, | ||
250 | { "PWM", 26, 1, 1, 1, 0 }, | ||
251 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
252 | { "NB Fan", 33, 2, 60, 1, 0 }, | ||
253 | { "SYS Fan", 34, 2, 60, 1, 0 }, | ||
254 | { NULL, 0, 0, 0, 0, 0 } } | ||
255 | }, | ||
256 | { 0x0010, "Abit NI8 SLI GR", { | ||
257 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
258 | { "DDR", 1, 0, 10, 1, 0 }, | ||
259 | { "DDR VTT", 2, 0, 10, 1, 0 }, | ||
260 | { "CPU VTT 1.2V", 3, 0, 10, 1, 0 }, | ||
261 | { "NB 1.4V", 4, 0, 10, 1, 0 }, | ||
262 | { "SB 1.5V", 6, 0, 10, 1, 0 }, | ||
263 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
264 | { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, | ||
265 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
266 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
267 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
268 | { "CPU", 24, 1, 1, 1, 0 }, | ||
269 | { "SYS", 25, 1, 1, 1, 0 }, | ||
270 | { "PWM", 26, 1, 1, 1, 0 }, | ||
271 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
272 | { "NB Fan", 33, 2, 60, 1, 0 }, | ||
273 | { "SYS Fan", 34, 2, 60, 1, 0 }, | ||
274 | { "AUX1 Fan", 35, 2, 60, 1, 0 }, | ||
275 | { "OTES1 Fan", 36, 2, 60, 1, 0 }, | ||
276 | { NULL, 0, 0, 0, 0, 0 } } | ||
277 | }, | ||
278 | { 0x0011, "Abit AT8 32X", { | ||
279 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
280 | { "DDR", 1, 0, 20, 1, 0 }, | ||
281 | { "DDR VTT", 2, 0, 10, 1, 0 }, | ||
282 | { "CPU VDDA 2.5V", 6, 0, 20, 1, 0 }, | ||
283 | { "NB 1.8V", 4, 0, 10, 1, 0 }, | ||
284 | { "NB 1.8V Dual", 5, 0, 10, 1, 0 }, | ||
285 | { "HTV 1.2", 3, 0, 10, 1, 0 }, | ||
286 | { "PCIE 1.2V", 12, 0, 10, 1, 0 }, | ||
287 | { "NB 1.2V", 13, 0, 10, 1, 0 }, | ||
288 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
289 | { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, | ||
290 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
291 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
292 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
293 | { "CPU", 24, 1, 1, 1, 0 }, | ||
294 | { "NB", 25, 1, 1, 1, 0 }, | ||
295 | { "System", 26, 1, 1, 1, 0 }, | ||
296 | { "PWM", 27, 1, 1, 1, 0 }, | ||
297 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
298 | { "NB Fan", 33, 2, 60, 1, 0 }, | ||
299 | { "SYS Fan", 34, 2, 60, 1, 0 }, | ||
300 | { "AUX1 Fan", 35, 2, 60, 1, 0 }, | ||
301 | { "AUX2 Fan", 36, 2, 60, 1, 0 }, | ||
302 | { NULL, 0, 0, 0, 0, 0 } } | ||
303 | }, | ||
304 | { 0x0012, "Abit AN8 32X", { | ||
305 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
306 | { "DDR", 1, 0, 20, 1, 0 }, | ||
307 | { "DDR VTT", 2, 0, 10, 1, 0 }, | ||
308 | { "HyperTransport", 3, 0, 10, 1, 0 }, | ||
309 | { "CPU VDDA 2.5V", 5, 0, 20, 1, 0 }, | ||
310 | { "NB", 4, 0, 10, 1, 0 }, | ||
311 | { "SB", 6, 0, 10, 1, 0 }, | ||
312 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
313 | { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, | ||
314 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
315 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
316 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
317 | { "CPU", 24, 1, 1, 1, 0 }, | ||
318 | { "SYS", 25, 1, 1, 1, 0 }, | ||
319 | { "PWM", 26, 1, 1, 1, 0 }, | ||
320 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
321 | { "NB Fan", 33, 2, 60, 1, 0 }, | ||
322 | { "SYS Fan", 34, 2, 60, 1, 0 }, | ||
323 | { "AUX1 Fan", 36, 2, 60, 1, 0 }, | ||
324 | { NULL, 0, 0, 0, 0, 0 } } | ||
325 | }, | ||
326 | { 0x0013, "unknown", { | ||
327 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
328 | { "DDR", 1, 0, 10, 1, 0 }, | ||
329 | { "DDR VTT", 2, 0, 10, 1, 0 }, | ||
330 | { "CPU VTT 1.2V", 3, 0, 10, 1, 0 }, | ||
331 | { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 }, | ||
332 | { "MCH 2.5V", 5, 0, 20, 1, 0 }, | ||
333 | { "ICH 1.05V", 6, 0, 10, 1, 0 }, | ||
334 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
335 | { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, | ||
336 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
337 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
338 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
339 | { "CPU", 24, 1, 1, 1, 0 }, | ||
340 | { "System ", 25, 1, 1, 1, 0 }, | ||
341 | { "PWM1", 26, 1, 1, 1, 0 }, | ||
342 | { "PWM2", 27, 1, 1, 1, 0 }, | ||
343 | { "PWM3", 28, 1, 1, 1, 0 }, | ||
344 | { "PWM4", 29, 1, 1, 1, 0 }, | ||
345 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
346 | { "NB Fan", 33, 2, 60, 1, 0 }, | ||
347 | { "SYS Fan", 34, 2, 60, 1, 0 }, | ||
348 | { "AUX1 Fan", 35, 2, 60, 1, 0 }, | ||
349 | { "AUX2 Fan", 36, 2, 60, 1, 0 }, | ||
350 | { "AUX3 Fan", 37, 2, 60, 1, 0 }, | ||
351 | { "AUX4 Fan", 38, 2, 60, 1, 0 }, | ||
352 | { NULL, 0, 0, 0, 0, 0 } } | ||
353 | }, | ||
354 | { 0x0014, "Abit AB9 Pro", { | ||
355 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
356 | { "DDR", 1, 0, 10, 1, 0 }, | ||
357 | { "DDR VTT", 2, 0, 10, 1, 0 }, | ||
358 | { "CPU VTT 1.2V", 3, 0, 10, 1, 0 }, | ||
359 | { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 }, | ||
360 | { "MCH 2.5V", 5, 0, 20, 1, 0 }, | ||
361 | { "ICH 1.05V", 6, 0, 10, 1, 0 }, | ||
362 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
363 | { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, | ||
364 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
365 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
366 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
367 | { "CPU", 24, 1, 1, 1, 0 }, | ||
368 | { "System ", 25, 1, 1, 1, 0 }, | ||
369 | { "PWM", 26, 1, 1, 1, 0 }, | ||
370 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
371 | { "NB Fan", 33, 2, 60, 1, 0 }, | ||
372 | { "SYS Fan", 34, 2, 60, 1, 0 }, | ||
373 | { NULL, 0, 0, 0, 0, 0 } } | ||
374 | }, | ||
375 | { 0x0015, "unknown", { | ||
376 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
377 | { "DDR", 1, 0, 20, 1, 0 }, | ||
378 | { "DDR VTT", 2, 0, 10, 1, 0 }, | ||
379 | { "HyperTransport", 3, 0, 10, 1, 0 }, | ||
380 | { "CPU VDDA 2.5V", 5, 0, 20, 1, 0 }, | ||
381 | { "NB", 4, 0, 10, 1, 0 }, | ||
382 | { "SB", 6, 0, 10, 1, 0 }, | ||
383 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
384 | { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, | ||
385 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
386 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
387 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
388 | { "CPU", 24, 1, 1, 1, 0 }, | ||
389 | { "SYS", 25, 1, 1, 1, 0 }, | ||
390 | { "PWM", 26, 1, 1, 1, 0 }, | ||
391 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
392 | { "NB Fan", 33, 2, 60, 1, 0 }, | ||
393 | { "SYS Fan", 34, 2, 60, 1, 0 }, | ||
394 | { "AUX1 Fan", 33, 2, 60, 1, 0 }, | ||
395 | { "AUX2 Fan", 35, 2, 60, 1, 0 }, | ||
396 | { "AUX3 Fan", 36, 2, 60, 1, 0 }, | ||
397 | { NULL, 0, 0, 0, 0, 0 } } | ||
398 | }, | ||
399 | { 0x0016, "AW9D-MAX", { | ||
400 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
401 | { "DDR2", 1, 0, 20, 1, 0 }, | ||
402 | { "DDR2 VTT", 2, 0, 10, 1, 0 }, | ||
403 | { "CPU VTT 1.2V", 3, 0, 10, 1, 0 }, | ||
404 | { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 }, | ||
405 | { "MCH 2.5V", 5, 0, 20, 1, 0 }, | ||
406 | { "ICH 1.05V", 6, 0, 10, 1, 0 }, | ||
407 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
408 | { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, | ||
409 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
410 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
411 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
412 | { "CPU", 24, 1, 1, 1, 0 }, | ||
413 | { "System ", 25, 1, 1, 1, 0 }, | ||
414 | { "PWM1", 26, 1, 1, 1, 0 }, | ||
415 | { "PWM2", 27, 1, 1, 1, 0 }, | ||
416 | { "PWM3", 28, 1, 1, 1, 0 }, | ||
417 | { "PWM4", 29, 1, 1, 1, 0 }, | ||
418 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
419 | { "NB Fan", 33, 2, 60, 1, 0 }, | ||
420 | { "SYS Fan", 34, 2, 60, 1, 0 }, | ||
421 | { "AUX1 Fan", 35, 2, 60, 1, 0 }, | ||
422 | { "AUX2 Fan", 36, 2, 60, 1, 0 }, | ||
423 | { "AUX3 Fan", 37, 2, 60, 1, 0 }, | ||
424 | { "OTES1 Fan", 38, 2, 60, 1, 0 }, | ||
425 | { NULL, 0, 0, 0, 0, 0 } } | ||
426 | }, | ||
427 | { 0x0017, "unknown", { | ||
428 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
429 | { "DDR2", 1, 0, 20, 1, 0 }, | ||
430 | { "DDR2 VTT", 2, 0, 10, 1, 0 }, | ||
431 | { "HyperTransport", 3, 0, 10, 1, 0 }, | ||
432 | { "CPU VDDA 2.5V", 6, 0, 20, 1, 0 }, | ||
433 | { "NB 1.8V", 4, 0, 10, 1, 0 }, | ||
434 | { "NB 1.2V ", 13, 0, 10, 1, 0 }, | ||
435 | { "SB 1.2V", 5, 0, 10, 1, 0 }, | ||
436 | { "PCIE 1.2V", 12, 0, 10, 1, 0 }, | ||
437 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
438 | { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, | ||
439 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
440 | { "ATX +3.3V", 10, 0, 20, 1, 0 }, | ||
441 | { "ATX 5VSB", 11, 0, 30, 1, 0 }, | ||
442 | { "CPU", 24, 1, 1, 1, 0 }, | ||
443 | { "System ", 26, 1, 1, 1, 0 }, | ||
444 | { "PWM", 27, 1, 1, 1, 0 }, | ||
445 | { "CPU FAN", 32, 2, 60, 1, 0 }, | ||
446 | { "SYS FAN", 34, 2, 60, 1, 0 }, | ||
447 | { "AUX1 FAN", 35, 2, 60, 1, 0 }, | ||
448 | { "AUX2 FAN", 36, 2, 60, 1, 0 }, | ||
449 | { "AUX3 FAN", 37, 2, 60, 1, 0 }, | ||
450 | { NULL, 0, 0, 0, 0, 0 } } | ||
451 | }, | ||
452 | { 0x0018, "unknown", { | ||
453 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
454 | { "DDR2", 1, 0, 20, 1, 0 }, | ||
455 | { "DDR2 VTT", 2, 0, 10, 1, 0 }, | ||
456 | { "CPU VTT", 3, 0, 10, 1, 0 }, | ||
457 | { "MCH 1.25V", 4, 0, 10, 1, 0 }, | ||
458 | { "ICHIO 1.5V", 5, 0, 10, 1, 0 }, | ||
459 | { "ICH 1.05V", 6, 0, 10, 1, 0 }, | ||
460 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
461 | { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, | ||
462 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
463 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
464 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
465 | { "CPU", 24, 1, 1, 1, 0 }, | ||
466 | { "System ", 25, 1, 1, 1, 0 }, | ||
467 | { "PWM Phase1", 26, 1, 1, 1, 0 }, | ||
468 | { "PWM Phase2", 27, 1, 1, 1, 0 }, | ||
469 | { "PWM Phase3", 28, 1, 1, 1, 0 }, | ||
470 | { "PWM Phase4", 29, 1, 1, 1, 0 }, | ||
471 | { "PWM Phase5", 30, 1, 1, 1, 0 }, | ||
472 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
473 | { "SYS Fan", 34, 2, 60, 1, 0 }, | ||
474 | { "AUX1 Fan", 33, 2, 60, 1, 0 }, | ||
475 | { "AUX2 Fan", 35, 2, 60, 1, 0 }, | ||
476 | { "AUX3 Fan", 36, 2, 60, 1, 0 }, | ||
477 | { NULL, 0, 0, 0, 0, 0 } } | ||
478 | }, | ||
479 | { 0x0019, "unknown", { | ||
480 | { "CPU Core", 7, 0, 10, 1, 0 }, | ||
481 | { "DDR2", 13, 0, 20, 1, 0 }, | ||
482 | { "DDR2 VTT", 14, 0, 10, 1, 0 }, | ||
483 | { "CPU VTT", 3, 0, 20, 1, 0 }, | ||
484 | { "NB 1.2V ", 4, 0, 10, 1, 0 }, | ||
485 | { "SB 1.5V", 6, 0, 10, 1, 0 }, | ||
486 | { "HyperTransport", 5, 0, 10, 1, 0 }, | ||
487 | { "ATX +12V (24-Pin)", 12, 0, 60, 1, 0 }, | ||
488 | { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 }, | ||
489 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
490 | { "ATX +3.3V", 10, 0, 20, 1, 0 }, | ||
491 | { "ATX 5VSB", 11, 0, 30, 1, 0 }, | ||
492 | { "CPU", 24, 1, 1, 1, 0 }, | ||
493 | { "System ", 25, 1, 1, 1, 0 }, | ||
494 | { "PWM Phase1", 26, 1, 1, 1, 0 }, | ||
495 | { "PWM Phase2", 27, 1, 1, 1, 0 }, | ||
496 | { "PWM Phase3", 28, 1, 1, 1, 0 }, | ||
497 | { "PWM Phase4", 29, 1, 1, 1, 0 }, | ||
498 | { "PWM Phase5", 30, 1, 1, 1, 0 }, | ||
499 | { "CPU FAN", 32, 2, 60, 1, 0 }, | ||
500 | { "SYS FAN", 34, 2, 60, 1, 0 }, | ||
501 | { "AUX1 FAN", 33, 2, 60, 1, 0 }, | ||
502 | { "AUX2 FAN", 35, 2, 60, 1, 0 }, | ||
503 | { "AUX3 FAN", 36, 2, 60, 1, 0 }, | ||
504 | { NULL, 0, 0, 0, 0, 0 } } | ||
505 | }, | ||
506 | { 0x001A, "unknown", { | ||
507 | { "CPU Core", 0, 0, 10, 1, 0 }, | ||
508 | { "DDR2", 1, 0, 20, 1, 0 }, | ||
509 | { "DDR2 VTT", 2, 0, 10, 1, 0 }, | ||
510 | { "CPU VTT 1.2V", 3, 0, 10, 1, 0 }, | ||
511 | { "MCH 1.25V", 4, 0, 10, 1, 0 }, | ||
512 | { "ICHIO 1.5V", 5, 0, 10, 1, 0 }, | ||
513 | { "ICH 1.05V", 6, 0, 10, 1, 0 }, | ||
514 | { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 }, | ||
515 | { "ATX +12V (8-pin)", 8, 0, 60, 1, 0 }, | ||
516 | { "ATX +5V", 9, 0, 30, 1, 0 }, | ||
517 | { "+3.3V", 10, 0, 20, 1, 0 }, | ||
518 | { "5VSB", 11, 0, 30, 1, 0 }, | ||
519 | { "CPU", 24, 1, 1, 1, 0 }, | ||
520 | { "System ", 25, 1, 1, 1, 0 }, | ||
521 | { "PWM ", 26, 1, 1, 1, 0 }, | ||
522 | { "PWM Phase2", 27, 1, 1, 1, 0 }, | ||
523 | { "PWM Phase3", 28, 1, 1, 1, 0 }, | ||
524 | { "PWM Phase4", 29, 1, 1, 1, 0 }, | ||
525 | { "PWM Phase5", 30, 1, 1, 1, 0 }, | ||
526 | { "CPU Fan", 32, 2, 60, 1, 0 }, | ||
527 | { "SYS Fan", 34, 2, 60, 1, 0 }, | ||
528 | { "AUX1 Fan", 33, 2, 60, 1, 0 }, | ||
529 | { "AUX2 Fan", 35, 2, 60, 1, 0 }, | ||
530 | { "AUX3 Fan", 36, 2, 60, 1, 0 }, | ||
531 | { NULL, 0, 0, 0, 0, 0 } } | ||
532 | }, | ||
533 | { 0x0000, NULL, { { NULL, 0, 0, 0, 0, 0 } } } | ||
534 | }; | ||
535 | |||
536 | |||
537 | /* Insmod parameters */ | ||
538 | static int force; | ||
539 | module_param(force, bool, 0); | ||
540 | MODULE_PARM_DESC(force, "Set to one to force detection."); | ||
541 | /* Default verbose is 1, since this driver is still in the testing phase */ | ||
542 | static int verbose = 1; | ||
543 | module_param(verbose, bool, 0644); | ||
544 | MODULE_PARM_DESC(verbose, "Enable/disable verbose error reporting"); | ||
545 | |||
546 | |||
547 | /* wait while the uguru is busy (usually after a write) */ | ||
548 | static int abituguru3_wait_while_busy(struct abituguru3_data *data) | ||
549 | { | ||
550 | u8 x; | ||
551 | int timeout = ABIT_UGURU3_WAIT_TIMEOUT; | ||
552 | |||
553 | while ((x = inb_p(data->addr + ABIT_UGURU3_DATA)) & | ||
554 | ABIT_UGURU3_STATUS_BUSY) { | ||
555 | timeout--; | ||
556 | if (timeout == 0) | ||
557 | return x; | ||
558 | /* sleep a bit before our last try, to give the uGuru3 one | ||
559 | last chance to respond. */ | ||
560 | if (timeout == 1) | ||
561 | msleep(1); | ||
562 | } | ||
563 | return ABIT_UGURU3_SUCCESS; | ||
564 | } | ||
565 | |||
566 | /* wait till uguru is ready to be read */ | ||
567 | static int abituguru3_wait_for_read(struct abituguru3_data *data) | ||
568 | { | ||
569 | u8 x; | ||
570 | int timeout = ABIT_UGURU3_WAIT_TIMEOUT; | ||
571 | |||
572 | while (!((x = inb_p(data->addr + ABIT_UGURU3_DATA)) & | ||
573 | ABIT_UGURU3_STATUS_READY_FOR_READ)) { | ||
574 | timeout--; | ||
575 | if (timeout == 0) | ||
576 | return x; | ||
577 | /* sleep a bit before our last try, to give the uGuru3 one | ||
578 | last chance to respond. */ | ||
579 | if (timeout == 1) | ||
580 | msleep(1); | ||
581 | } | ||
582 | return ABIT_UGURU3_SUCCESS; | ||
583 | } | ||
584 | |||
585 | /* This synchronizes us with the uGuru3's protocol state machine, this | ||
586 | must be done before each command. */ | ||
587 | static int abituguru3_synchronize(struct abituguru3_data *data) | ||
588 | { | ||
589 | int x, timeout = ABIT_UGURU3_SYNCHRONIZE_TIMEOUT; | ||
590 | |||
591 | if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) { | ||
592 | ABIT_UGURU3_DEBUG("synchronize timeout during initial busy " | ||
593 | "wait, status: 0x%02x\n", x); | ||
594 | return -EIO; | ||
595 | } | ||
596 | |||
597 | outb(0x20, data->addr + ABIT_UGURU3_DATA); | ||
598 | if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) { | ||
599 | ABIT_UGURU3_DEBUG("synchronize timeout after sending 0x20, " | ||
600 | "status: 0x%02x\n", x); | ||
601 | return -EIO; | ||
602 | } | ||
603 | |||
604 | outb(0x10, data->addr + ABIT_UGURU3_CMD); | ||
605 | if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) { | ||
606 | ABIT_UGURU3_DEBUG("synchronize timeout after sending 0x10, " | ||
607 | "status: 0x%02x\n", x); | ||
608 | return -EIO; | ||
609 | } | ||
610 | |||
611 | outb(0x00, data->addr + ABIT_UGURU3_CMD); | ||
612 | if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) { | ||
613 | ABIT_UGURU3_DEBUG("synchronize timeout after sending 0x00, " | ||
614 | "status: 0x%02x\n", x); | ||
615 | return -EIO; | ||
616 | } | ||
617 | |||
618 | if ((x = abituguru3_wait_for_read(data)) != ABIT_UGURU3_SUCCESS) { | ||
619 | ABIT_UGURU3_DEBUG("synchronize timeout waiting for read, " | ||
620 | "status: 0x%02x\n", x); | ||
621 | return -EIO; | ||
622 | } | ||
623 | |||
624 | while ((x = inb(data->addr + ABIT_UGURU3_CMD)) != 0xAC) { | ||
625 | timeout--; | ||
626 | if (timeout == 0) { | ||
627 | ABIT_UGURU3_DEBUG("synchronize timeout cmd does not " | ||
628 | "hold 0xAC after synchronize, cmd: 0x%02x\n", | ||
629 | x); | ||
630 | return -EIO; | ||
631 | } | ||
632 | msleep(1); | ||
633 | } | ||
634 | return 0; | ||
635 | } | ||
636 | |||
637 | /* Read count bytes from sensor sensor_addr in bank bank_addr and store the | ||
638 | result in buf */ | ||
639 | static int abituguru3_read(struct abituguru3_data *data, u8 bank, u8 offset, | ||
640 | u8 count, u8 *buf) | ||
641 | { | ||
642 | int i, x; | ||
643 | |||
644 | if ((x = abituguru3_synchronize(data))) | ||
645 | return x; | ||
646 | |||
647 | outb(0x1A, data->addr + ABIT_UGURU3_DATA); | ||
648 | if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) { | ||
649 | ABIT_UGURU3_DEBUG("read from 0x%02x:0x%02x timed out after " | ||
650 | "sending 0x1A, status: 0x%02x\n", (unsigned int)bank, | ||
651 | (unsigned int)offset, x); | ||
652 | return -EIO; | ||
653 | } | ||
654 | |||
655 | outb(bank, data->addr + ABIT_UGURU3_CMD); | ||
656 | if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) { | ||
657 | ABIT_UGURU3_DEBUG("read from 0x%02x:0x%02x timed out after " | ||
658 | "sending the bank, status: 0x%02x\n", | ||
659 | (unsigned int)bank, (unsigned int)offset, x); | ||
660 | return -EIO; | ||
661 | } | ||
662 | |||
663 | outb(offset, data->addr + ABIT_UGURU3_CMD); | ||
664 | if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) { | ||
665 | ABIT_UGURU3_DEBUG("read from 0x%02x:0x%02x timed out after " | ||
666 | "sending the offset, status: 0x%02x\n", | ||
667 | (unsigned int)bank, (unsigned int)offset, x); | ||
668 | return -EIO; | ||
669 | } | ||
670 | |||
671 | outb(count, data->addr + ABIT_UGURU3_CMD); | ||
672 | if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) { | ||
673 | ABIT_UGURU3_DEBUG("read from 0x%02x:0x%02x timed out after " | ||
674 | "sending the count, status: 0x%02x\n", | ||
675 | (unsigned int)bank, (unsigned int)offset, x); | ||
676 | return -EIO; | ||
677 | } | ||
678 | |||
679 | for (i = 0; i < count; i++) { | ||
680 | if ((x = abituguru3_wait_for_read(data)) != | ||
681 | ABIT_UGURU3_SUCCESS) { | ||
682 | ABIT_UGURU3_DEBUG("timeout reading byte %d from " | ||
683 | "0x%02x:0x%02x, status: 0x%02x\n", i, | ||
684 | (unsigned int)bank, (unsigned int)offset, x); | ||
685 | break; | ||
686 | } | ||
687 | buf[i] = inb(data->addr + ABIT_UGURU3_CMD); | ||
688 | } | ||
689 | return i; | ||
690 | } | ||
691 | |||
692 | /* Sensor settings are stored 1 byte per offset with the bytes | ||
693 | placed add consecutive offsets. */ | ||
694 | static int abituguru3_read_increment_offset(struct abituguru3_data *data, | ||
695 | u8 bank, u8 offset, u8 count, | ||
696 | u8 *buf, int offset_count) | ||
697 | { | ||
698 | int i, x; | ||
699 | |||
700 | for (i = 0; i < offset_count; i++) | ||
701 | if ((x = abituguru3_read(data, bank, offset + i, count, | ||
702 | buf + i * count)) != count) | ||
703 | return i * count + (i && (x < 0)) ? 0 : x; | ||
704 | |||
705 | return i * count; | ||
706 | } | ||
707 | |||
708 | /* Following are the sysfs callback functions. These functions expect: | ||
709 | sensor_device_attribute_2->index: index into the data->sensors array | ||
710 | sensor_device_attribute_2->nr: register offset, bitmask or NA. */ | ||
711 | static struct abituguru3_data *abituguru3_update_device(struct device *dev); | ||
712 | |||
713 | static ssize_t show_value(struct device *dev, | ||
714 | struct device_attribute *devattr, char *buf) | ||
715 | { | ||
716 | int value; | ||
717 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
718 | struct abituguru3_data *data = abituguru3_update_device(dev); | ||
719 | const struct abituguru3_sensor_info *sensor; | ||
720 | |||
721 | if (!data) | ||
722 | return -EIO; | ||
723 | |||
724 | sensor = &data->sensors[attr->index]; | ||
725 | |||
726 | /* are we reading a setting, or is this a normal read? */ | ||
727 | if (attr->nr) | ||
728 | value = data->settings[sensor->port][attr->nr]; | ||
729 | else | ||
730 | value = data->value[sensor->port]; | ||
731 | |||
732 | /* convert the value */ | ||
733 | value = (value * sensor->multiplier) / sensor->divisor + | ||
734 | sensor->offset; | ||
735 | |||
736 | /* alternatively we could update the sensors settings struct for this, | ||
737 | but then its contents would differ from the windows sw ini files */ | ||
738 | if (sensor->type == ABIT_UGURU3_TEMP_SENSOR) | ||
739 | value *= 1000; | ||
740 | |||
741 | return sprintf(buf, "%d\n", value); | ||
742 | } | ||
743 | |||
744 | static ssize_t show_alarm(struct device *dev, | ||
745 | struct device_attribute *devattr, char *buf) | ||
746 | { | ||
747 | int port; | ||
748 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
749 | struct abituguru3_data *data = abituguru3_update_device(dev); | ||
750 | |||
751 | if (!data) | ||
752 | return -EIO; | ||
753 | |||
754 | port = data->sensors[attr->index].port; | ||
755 | |||
756 | /* See if the alarm bit for this sensor is set and if a bitmask is | ||
757 | given in attr->nr also check if the alarm matches the type of alarm | ||
758 | we're looking for (for volt it can be either low or high). The type | ||
759 | is stored in a few readonly bits in the settings of the sensor. */ | ||
760 | if ((data->alarms[port / 8] & (0x01 << (port % 8))) && | ||
761 | (!attr->nr || (data->settings[port][0] & attr->nr))) | ||
762 | return sprintf(buf, "1\n"); | ||
763 | else | ||
764 | return sprintf(buf, "0\n"); | ||
765 | } | ||
766 | |||
767 | static ssize_t show_mask(struct device *dev, | ||
768 | struct device_attribute *devattr, char *buf) | ||
769 | { | ||
770 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
771 | struct abituguru3_data *data = dev_get_drvdata(dev); | ||
772 | |||
773 | if (data->settings[data->sensors[attr->index].port][0] & attr->nr) | ||
774 | return sprintf(buf, "1\n"); | ||
775 | else | ||
776 | return sprintf(buf, "0\n"); | ||
777 | } | ||
778 | |||
779 | static ssize_t show_label(struct device *dev, | ||
780 | struct device_attribute *devattr, char *buf) | ||
781 | { | ||
782 | struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr); | ||
783 | struct abituguru3_data *data = dev_get_drvdata(dev); | ||
784 | |||
785 | return sprintf(buf, "%s\n", data->sensors[attr->index].name); | ||
786 | } | ||
787 | |||
788 | static ssize_t show_name(struct device *dev, | ||
789 | struct device_attribute *devattr, char *buf) | ||
790 | { | ||
791 | return sprintf(buf, "%s\n", ABIT_UGURU3_NAME); | ||
792 | } | ||
793 | |||
794 | /* Sysfs attr templates, the real entries are generated automatically. */ | ||
795 | static const | ||
796 | struct sensor_device_attribute_2 abituguru3_sysfs_templ[3][10] = { { | ||
797 | SENSOR_ATTR_2(in%d_input, 0444, show_value, NULL, 0, 0), | ||
798 | SENSOR_ATTR_2(in%d_min, 0444, show_value, NULL, 1, 0), | ||
799 | SENSOR_ATTR_2(in%d_max, 0444, show_value, NULL, 2, 0), | ||
800 | SENSOR_ATTR_2(in%d_min_alarm, 0444, show_alarm, NULL, | ||
801 | ABIT_UGURU3_VOLT_LOW_ALARM_FLAG, 0), | ||
802 | SENSOR_ATTR_2(in%d_max_alarm, 0444, show_alarm, NULL, | ||
803 | ABIT_UGURU3_VOLT_HIGH_ALARM_FLAG, 0), | ||
804 | SENSOR_ATTR_2(in%d_beep, 0444, show_mask, NULL, | ||
805 | ABIT_UGURU3_BEEP_ENABLE, 0), | ||
806 | SENSOR_ATTR_2(in%d_shutdown, 0444, show_mask, NULL, | ||
807 | ABIT_UGURU3_SHUTDOWN_ENABLE, 0), | ||
808 | SENSOR_ATTR_2(in%d_min_alarm_enable, 0444, show_mask, NULL, | ||
809 | ABIT_UGURU3_VOLT_LOW_ALARM_ENABLE, 0), | ||
810 | SENSOR_ATTR_2(in%d_max_alarm_enable, 0444, show_mask, NULL, | ||
811 | ABIT_UGURU3_VOLT_HIGH_ALARM_ENABLE, 0), | ||
812 | SENSOR_ATTR_2(in%d_label, 0444, show_label, NULL, 0, 0) | ||
813 | }, { | ||
814 | SENSOR_ATTR_2(temp%d_input, 0444, show_value, NULL, 0, 0), | ||
815 | SENSOR_ATTR_2(temp%d_max, 0444, show_value, NULL, 1, 0), | ||
816 | SENSOR_ATTR_2(temp%d_crit, 0444, show_value, NULL, 2, 0), | ||
817 | SENSOR_ATTR_2(temp%d_alarm, 0444, show_alarm, NULL, 0, 0), | ||
818 | SENSOR_ATTR_2(temp%d_beep, 0444, show_mask, NULL, | ||
819 | ABIT_UGURU3_BEEP_ENABLE, 0), | ||
820 | SENSOR_ATTR_2(temp%d_shutdown, 0444, show_mask, NULL, | ||
821 | ABIT_UGURU3_SHUTDOWN_ENABLE, 0), | ||
822 | SENSOR_ATTR_2(temp%d_alarm_enable, 0444, show_mask, NULL, | ||
823 | ABIT_UGURU3_TEMP_HIGH_ALARM_ENABLE, 0), | ||
824 | SENSOR_ATTR_2(temp%d_label, 0444, show_label, NULL, 0, 0) | ||
825 | }, { | ||
826 | SENSOR_ATTR_2(fan%d_input, 0444, show_value, NULL, 0, 0), | ||
827 | SENSOR_ATTR_2(fan%d_min, 0444, show_value, NULL, 1, 0), | ||
828 | SENSOR_ATTR_2(fan%d_alarm, 0444, show_alarm, NULL, 0, 0), | ||
829 | SENSOR_ATTR_2(fan%d_beep, 0444, show_mask, NULL, | ||
830 | ABIT_UGURU3_BEEP_ENABLE, 0), | ||
831 | SENSOR_ATTR_2(fan%d_shutdown, 0444, show_mask, NULL, | ||
832 | ABIT_UGURU3_SHUTDOWN_ENABLE, 0), | ||
833 | SENSOR_ATTR_2(fan%d_alarm_enable, 0444, show_mask, NULL, | ||
834 | ABIT_UGURU3_FAN_LOW_ALARM_ENABLE, 0), | ||
835 | SENSOR_ATTR_2(fan%d_label, 0444, show_label, NULL, 0, 0) | ||
836 | } }; | ||
837 | |||
838 | static struct sensor_device_attribute_2 abituguru3_sysfs_attr[] = { | ||
839 | SENSOR_ATTR_2(name, 0444, show_name, NULL, 0, 0), | ||
840 | }; | ||
841 | |||
842 | static int __devinit abituguru3_probe(struct platform_device *pdev) | ||
843 | { | ||
844 | const int no_sysfs_attr[3] = { 10, 8, 7 }; | ||
845 | int sensor_index[3] = { 0, 1, 1 }; | ||
846 | struct abituguru3_data *data; | ||
847 | int i, j, type, used, sysfs_names_free, sysfs_attr_i, res = -ENODEV; | ||
848 | char *sysfs_filename; | ||
849 | u8 buf[2]; | ||
850 | u16 id; | ||
851 | |||
852 | if (!(data = kzalloc(sizeof(struct abituguru3_data), GFP_KERNEL))) | ||
853 | return -ENOMEM; | ||
854 | |||
855 | data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start; | ||
856 | mutex_init(&data->update_lock); | ||
857 | platform_set_drvdata(pdev, data); | ||
858 | |||
859 | /* Read the motherboard ID */ | ||
860 | if ((i = abituguru3_read(data, ABIT_UGURU3_MISC_BANK, | ||
861 | ABIT_UGURU3_BOARD_ID, 2, buf)) != 2) { | ||
862 | goto abituguru3_probe_error; | ||
863 | } | ||
864 | |||
865 | /* Completely read the uGuru to see if one really is there */ | ||
866 | if (!abituguru3_update_device(&pdev->dev)) | ||
867 | goto abituguru3_probe_error; | ||
868 | |||
869 | /* lookup the ID in our motherboard table */ | ||
870 | id = ((u16)buf[0] << 8) | (u16)buf[1]; | ||
871 | for (i = 0; abituguru3_motherboards[i].id; i++) | ||
872 | if (abituguru3_motherboards[i].id == id) | ||
873 | break; | ||
874 | if (!abituguru3_motherboards[i].id) { | ||
875 | printk(KERN_ERR ABIT_UGURU3_NAME ": error unknown motherboard " | ||
876 | "ID: %04X. Please report this to the abituguru3 " | ||
877 | "maintainer (see MAINTAINERS)\n", (unsigned int)id); | ||
878 | goto abituguru3_probe_error; | ||
879 | } | ||
880 | data->sensors = abituguru3_motherboards[i].sensors; | ||
881 | printk(KERN_INFO ABIT_UGURU3_NAME ": found Abit uGuru3, motherboard " | ||
882 | "ID: %04X (%s)\n", (unsigned int)id, | ||
883 | abituguru3_motherboards[i].name); | ||
884 | |||
885 | /* Fill the sysfs attr array */ | ||
886 | sysfs_attr_i = 0; | ||
887 | sysfs_filename = data->sysfs_names; | ||
888 | sysfs_names_free = ABIT_UGURU3_SYSFS_NAMES_LENGTH; | ||
889 | for (i = 0; data->sensors[i].name; i++) { | ||
890 | /* Fail safe check, this should never happen! */ | ||
891 | if (i >= ABIT_UGURU3_MAX_NO_SENSORS) { | ||
892 | printk(KERN_ERR ABIT_UGURU3_NAME | ||
893 | ": Fatal error motherboard has more sensors " | ||
894 | "then ABIT_UGURU3_MAX_NO_SENSORS. This should " | ||
895 | "never happen please report to the abituguru3 " | ||
896 | "maintainer (see MAINTAINERS)\n"); | ||
897 | res = -ENAMETOOLONG; | ||
898 | goto abituguru3_probe_error; | ||
899 | } | ||
900 | type = data->sensors[i].type; | ||
901 | for (j = 0; j < no_sysfs_attr[type]; j++) { | ||
902 | used = snprintf(sysfs_filename, sysfs_names_free, | ||
903 | abituguru3_sysfs_templ[type][j].dev_attr.attr. | ||
904 | name, sensor_index[type]) + 1; | ||
905 | data->sysfs_attr[sysfs_attr_i] = | ||
906 | abituguru3_sysfs_templ[type][j]; | ||
907 | data->sysfs_attr[sysfs_attr_i].dev_attr.attr.name = | ||
908 | sysfs_filename; | ||
909 | data->sysfs_attr[sysfs_attr_i].index = i; | ||
910 | sysfs_filename += used; | ||
911 | sysfs_names_free -= used; | ||
912 | sysfs_attr_i++; | ||
913 | } | ||
914 | sensor_index[type]++; | ||
915 | } | ||
916 | /* Fail safe check, this should never happen! */ | ||
917 | if (sysfs_names_free < 0) { | ||
918 | printk(KERN_ERR ABIT_UGURU3_NAME | ||
919 | ": Fatal error ran out of space for sysfs attr names. " | ||
920 | "This should never happen please report to the " | ||
921 | "abituguru3 maintainer (see MAINTAINERS)\n"); | ||
922 | res = -ENAMETOOLONG; | ||
923 | goto abituguru3_probe_error; | ||
924 | } | ||
925 | |||
926 | /* Register sysfs hooks */ | ||
927 | for (i = 0; i < sysfs_attr_i; i++) | ||
928 | if (device_create_file(&pdev->dev, | ||
929 | &data->sysfs_attr[i].dev_attr)) | ||
930 | goto abituguru3_probe_error; | ||
931 | for (i = 0; i < ARRAY_SIZE(abituguru3_sysfs_attr); i++) | ||
932 | if (device_create_file(&pdev->dev, | ||
933 | &abituguru3_sysfs_attr[i].dev_attr)) | ||
934 | goto abituguru3_probe_error; | ||
935 | |||
936 | data->class_dev = hwmon_device_register(&pdev->dev); | ||
937 | if (IS_ERR(data->class_dev)) { | ||
938 | res = PTR_ERR(data->class_dev); | ||
939 | goto abituguru3_probe_error; | ||
940 | } | ||
941 | |||
942 | return 0; /* success */ | ||
943 | |||
944 | abituguru3_probe_error: | ||
945 | for (i = 0; data->sysfs_attr[i].dev_attr.attr.name; i++) | ||
946 | device_remove_file(&pdev->dev, &data->sysfs_attr[i].dev_attr); | ||
947 | for (i = 0; i < ARRAY_SIZE(abituguru3_sysfs_attr); i++) | ||
948 | device_remove_file(&pdev->dev, | ||
949 | &abituguru3_sysfs_attr[i].dev_attr); | ||
950 | kfree(data); | ||
951 | return res; | ||
952 | } | ||
953 | |||
954 | static int __devexit abituguru3_remove(struct platform_device *pdev) | ||
955 | { | ||
956 | int i; | ||
957 | struct abituguru3_data *data = platform_get_drvdata(pdev); | ||
958 | |||
959 | platform_set_drvdata(pdev, NULL); | ||
960 | hwmon_device_unregister(data->class_dev); | ||
961 | for (i = 0; data->sysfs_attr[i].dev_attr.attr.name; i++) | ||
962 | device_remove_file(&pdev->dev, &data->sysfs_attr[i].dev_attr); | ||
963 | for (i = 0; i < ARRAY_SIZE(abituguru3_sysfs_attr); i++) | ||
964 | device_remove_file(&pdev->dev, | ||
965 | &abituguru3_sysfs_attr[i].dev_attr); | ||
966 | kfree(data); | ||
967 | |||
968 | return 0; | ||
969 | } | ||
970 | |||
971 | static struct abituguru3_data *abituguru3_update_device(struct device *dev) | ||
972 | { | ||
973 | int i; | ||
974 | struct abituguru3_data *data = dev_get_drvdata(dev); | ||
975 | |||
976 | mutex_lock(&data->update_lock); | ||
977 | if (!data->valid || time_after(jiffies, data->last_updated + HZ)) { | ||
978 | /* Clear data->valid while updating */ | ||
979 | data->valid = 0; | ||
980 | /* Read alarms */ | ||
981 | if (abituguru3_read_increment_offset(data, | ||
982 | ABIT_UGURU3_SETTINGS_BANK, | ||
983 | ABIT_UGURU3_ALARMS_START, | ||
984 | 1, data->alarms, 48/8) != (48/8)) | ||
985 | goto LEAVE_UPDATE; | ||
986 | /* Read in and temp sensors (3 byte settings / sensor) */ | ||
987 | for (i = 0; i < 32; i++) { | ||
988 | if (abituguru3_read(data, ABIT_UGURU3_SENSORS_BANK, | ||
989 | ABIT_UGURU3_VALUES_START + i, | ||
990 | 1, &data->value[i]) != 1) | ||
991 | goto LEAVE_UPDATE; | ||
992 | if (abituguru3_read_increment_offset(data, | ||
993 | ABIT_UGURU3_SETTINGS_BANK, | ||
994 | ABIT_UGURU3_SETTINGS_START + i * 3, | ||
995 | 1, | ||
996 | data->settings[i], 3) != 3) | ||
997 | goto LEAVE_UPDATE; | ||
998 | } | ||
999 | /* Read temp sensors (2 byte settings / sensor) */ | ||
1000 | for (i = 0; i < 16; i++) { | ||
1001 | if (abituguru3_read(data, ABIT_UGURU3_SENSORS_BANK, | ||
1002 | ABIT_UGURU3_VALUES_START + 32 + i, | ||
1003 | 1, &data->value[32 + i]) != 1) | ||
1004 | goto LEAVE_UPDATE; | ||
1005 | if (abituguru3_read_increment_offset(data, | ||
1006 | ABIT_UGURU3_SETTINGS_BANK, | ||
1007 | ABIT_UGURU3_SETTINGS_START + 32 * 3 + | ||
1008 | i * 2, 1, | ||
1009 | data->settings[32 + i], 2) != 2) | ||
1010 | goto LEAVE_UPDATE; | ||
1011 | } | ||
1012 | data->last_updated = jiffies; | ||
1013 | data->valid = 1; | ||
1014 | } | ||
1015 | LEAVE_UPDATE: | ||
1016 | mutex_unlock(&data->update_lock); | ||
1017 | if (data->valid) | ||
1018 | return data; | ||
1019 | else | ||
1020 | return NULL; | ||
1021 | } | ||
1022 | |||
1023 | #ifdef CONFIG_PM | ||
1024 | static int abituguru3_suspend(struct platform_device *pdev, pm_message_t state) | ||
1025 | { | ||
1026 | struct abituguru3_data *data = platform_get_drvdata(pdev); | ||
1027 | /* make sure all communications with the uguru3 are done and no new | ||
1028 | ones are started */ | ||
1029 | mutex_lock(&data->update_lock); | ||
1030 | return 0; | ||
1031 | } | ||
1032 | |||
1033 | static int abituguru3_resume(struct platform_device *pdev) | ||
1034 | { | ||
1035 | struct abituguru3_data *data = platform_get_drvdata(pdev); | ||
1036 | mutex_unlock(&data->update_lock); | ||
1037 | return 0; | ||
1038 | } | ||
1039 | #else | ||
1040 | #define abituguru3_suspend NULL | ||
1041 | #define abituguru3_resume NULL | ||
1042 | #endif /* CONFIG_PM */ | ||
1043 | |||
1044 | static struct platform_driver abituguru3_driver = { | ||
1045 | .driver = { | ||
1046 | .owner = THIS_MODULE, | ||
1047 | .name = ABIT_UGURU3_NAME, | ||
1048 | }, | ||
1049 | .probe = abituguru3_probe, | ||
1050 | .remove = __devexit_p(abituguru3_remove), | ||
1051 | .suspend = abituguru3_suspend, | ||
1052 | .resume = abituguru3_resume | ||
1053 | }; | ||
1054 | |||
1055 | static int __init abituguru3_detect(void) | ||
1056 | { | ||
1057 | /* See if there is an uguru3 there. An idle uGuru3 will hold 0x00 or | ||
1058 | 0x08 at DATA and 0xAC at CMD. Sometimes the uGuru3 will hold 0x05 | ||
1059 | at CMD instead, why is unknown. So we test for 0x05 too. */ | ||
1060 | u8 data_val = inb_p(ABIT_UGURU3_BASE + ABIT_UGURU3_DATA); | ||
1061 | u8 cmd_val = inb_p(ABIT_UGURU3_BASE + ABIT_UGURU3_CMD); | ||
1062 | if (((data_val == 0x00) || (data_val == 0x08)) && | ||
1063 | ((cmd_val == 0xAC) || (cmd_val == 0x05))) | ||
1064 | return ABIT_UGURU3_BASE; | ||
1065 | |||
1066 | ABIT_UGURU3_DEBUG("no Abit uGuru3 found, data = 0x%02X, cmd = " | ||
1067 | "0x%02X\n", (unsigned int)data_val, (unsigned int)cmd_val); | ||
1068 | |||
1069 | if (force) { | ||
1070 | printk(KERN_INFO ABIT_UGURU3_NAME ": Assuming Abit uGuru3 is " | ||
1071 | "present because of \"force\" parameter\n"); | ||
1072 | return ABIT_UGURU3_BASE; | ||
1073 | } | ||
1074 | |||
1075 | /* No uGuru3 found */ | ||
1076 | return -ENODEV; | ||
1077 | } | ||
1078 | |||
1079 | static struct platform_device *abituguru3_pdev; | ||
1080 | |||
1081 | static int __init abituguru3_init(void) | ||
1082 | { | ||
1083 | int address, err; | ||
1084 | struct resource res = { .flags = IORESOURCE_IO }; | ||
1085 | |||
1086 | address = abituguru3_detect(); | ||
1087 | if (address < 0) | ||
1088 | return address; | ||
1089 | |||
1090 | err = platform_driver_register(&abituguru3_driver); | ||
1091 | if (err) | ||
1092 | goto exit; | ||
1093 | |||
1094 | abituguru3_pdev = platform_device_alloc(ABIT_UGURU3_NAME, address); | ||
1095 | if (!abituguru3_pdev) { | ||
1096 | printk(KERN_ERR ABIT_UGURU3_NAME | ||
1097 | ": Device allocation failed\n"); | ||
1098 | err = -ENOMEM; | ||
1099 | goto exit_driver_unregister; | ||
1100 | } | ||
1101 | |||
1102 | res.start = address; | ||
1103 | res.end = address + ABIT_UGURU3_REGION_LENGTH - 1; | ||
1104 | res.name = ABIT_UGURU3_NAME; | ||
1105 | |||
1106 | err = platform_device_add_resources(abituguru3_pdev, &res, 1); | ||
1107 | if (err) { | ||
1108 | printk(KERN_ERR ABIT_UGURU3_NAME | ||
1109 | ": Device resource addition failed (%d)\n", err); | ||
1110 | goto exit_device_put; | ||
1111 | } | ||
1112 | |||
1113 | err = platform_device_add(abituguru3_pdev); | ||
1114 | if (err) { | ||
1115 | printk(KERN_ERR ABIT_UGURU3_NAME | ||
1116 | ": Device addition failed (%d)\n", err); | ||
1117 | goto exit_device_put; | ||
1118 | } | ||
1119 | |||
1120 | return 0; | ||
1121 | |||
1122 | exit_device_put: | ||
1123 | platform_device_put(abituguru3_pdev); | ||
1124 | exit_driver_unregister: | ||
1125 | platform_driver_unregister(&abituguru3_driver); | ||
1126 | exit: | ||
1127 | return err; | ||
1128 | } | ||
1129 | |||
1130 | static void __exit abituguru3_exit(void) | ||
1131 | { | ||
1132 | platform_device_unregister(abituguru3_pdev); | ||
1133 | platform_driver_unregister(&abituguru3_driver); | ||
1134 | } | ||
1135 | |||
1136 | MODULE_AUTHOR("Hans de Goede <j.w.r.degoede@hhs.nl>"); | ||
1137 | MODULE_DESCRIPTION("Abit uGuru3 Sensor device"); | ||
1138 | MODULE_LICENSE("GPL"); | ||
1139 | |||
1140 | module_init(abituguru3_init); | ||
1141 | module_exit(abituguru3_exit); | ||