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-rw-r--r--drivers/gpu/drm/drm_crtc_helper.c41
-rw-r--r--drivers/gpu/drm/drm_edid.c6
-rw-r--r--drivers/gpu/drm/drm_fb_helper.c76
-rw-r--r--drivers/gpu/drm/i915/intel_display.c102
-rw-r--r--drivers/gpu/drm/i915/intel_fb.c6
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c4
-rw-r--r--drivers/gpu/drm/i915/intel_tv.c2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_fbcon.c1
-rw-r--r--drivers/gpu/drm/radeon/radeon_fb.c2
-rw-r--r--drivers/gpu/drm/savage/savage_bci.c2
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_resource.c2
11 files changed, 200 insertions, 44 deletions
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 7b1eb2fcf616..7e31d4348340 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -831,17 +831,14 @@ int drm_helper_resume_force_mode(struct drm_device *dev)
831} 831}
832EXPORT_SYMBOL(drm_helper_resume_force_mode); 832EXPORT_SYMBOL(drm_helper_resume_force_mode);
833 833
834static struct slow_work_ops output_poll_ops;
835
836#define DRM_OUTPUT_POLL_PERIOD (10*HZ) 834#define DRM_OUTPUT_POLL_PERIOD (10*HZ)
837static void output_poll_execute(struct slow_work *work) 835static void output_poll_execute(struct work_struct *work)
838{ 836{
839 struct delayed_slow_work *delayed_work = container_of(work, struct delayed_slow_work, work); 837 struct delayed_work *delayed_work = to_delayed_work(work);
840 struct drm_device *dev = container_of(delayed_work, struct drm_device, mode_config.output_poll_slow_work); 838 struct drm_device *dev = container_of(delayed_work, struct drm_device, mode_config.output_poll_work);
841 struct drm_connector *connector; 839 struct drm_connector *connector;
842 enum drm_connector_status old_status, status; 840 enum drm_connector_status old_status, status;
843 bool repoll = false, changed = false; 841 bool repoll = false, changed = false;
844 int ret;
845 842
846 mutex_lock(&dev->mode_config.mutex); 843 mutex_lock(&dev->mode_config.mutex);
847 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 844 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
@@ -876,18 +873,15 @@ static void output_poll_execute(struct slow_work *work)
876 dev->mode_config.funcs->output_poll_changed(dev); 873 dev->mode_config.funcs->output_poll_changed(dev);
877 } 874 }
878 875
879 if (repoll) { 876 if (repoll)
880 ret = delayed_slow_work_enqueue(delayed_work, DRM_OUTPUT_POLL_PERIOD); 877 queue_delayed_work(system_nrt_wq, delayed_work, DRM_OUTPUT_POLL_PERIOD);
881 if (ret)
882 DRM_ERROR("delayed enqueue failed %d\n", ret);
883 }
884} 878}
885 879
886void drm_kms_helper_poll_disable(struct drm_device *dev) 880void drm_kms_helper_poll_disable(struct drm_device *dev)
887{ 881{
888 if (!dev->mode_config.poll_enabled) 882 if (!dev->mode_config.poll_enabled)
889 return; 883 return;
890 delayed_slow_work_cancel(&dev->mode_config.output_poll_slow_work); 884 cancel_delayed_work_sync(&dev->mode_config.output_poll_work);
891} 885}
892EXPORT_SYMBOL(drm_kms_helper_poll_disable); 886EXPORT_SYMBOL(drm_kms_helper_poll_disable);
893 887
@@ -895,26 +889,20 @@ void drm_kms_helper_poll_enable(struct drm_device *dev)
895{ 889{
896 bool poll = false; 890 bool poll = false;
897 struct drm_connector *connector; 891 struct drm_connector *connector;
898 int ret;
899 892
900 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 893 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
901 if (connector->polled) 894 if (connector->polled)
902 poll = true; 895 poll = true;
903 } 896 }
904 897
905 if (poll) { 898 if (poll)
906 ret = delayed_slow_work_enqueue(&dev->mode_config.output_poll_slow_work, DRM_OUTPUT_POLL_PERIOD); 899 queue_delayed_work(system_nrt_wq, &dev->mode_config.output_poll_work, DRM_OUTPUT_POLL_PERIOD);
907 if (ret)
908 DRM_ERROR("delayed enqueue failed %d\n", ret);
909 }
910} 900}
911EXPORT_SYMBOL(drm_kms_helper_poll_enable); 901EXPORT_SYMBOL(drm_kms_helper_poll_enable);
912 902
913void drm_kms_helper_poll_init(struct drm_device *dev) 903void drm_kms_helper_poll_init(struct drm_device *dev)
914{ 904{
915 slow_work_register_user(THIS_MODULE); 905 INIT_DELAYED_WORK(&dev->mode_config.output_poll_work, output_poll_execute);
916 delayed_slow_work_init(&dev->mode_config.output_poll_slow_work,
917 &output_poll_ops);
918 dev->mode_config.poll_enabled = true; 906 dev->mode_config.poll_enabled = true;
919 907
920 drm_kms_helper_poll_enable(dev); 908 drm_kms_helper_poll_enable(dev);
@@ -924,7 +912,6 @@ EXPORT_SYMBOL(drm_kms_helper_poll_init);
924void drm_kms_helper_poll_fini(struct drm_device *dev) 912void drm_kms_helper_poll_fini(struct drm_device *dev)
925{ 913{
926 drm_kms_helper_poll_disable(dev); 914 drm_kms_helper_poll_disable(dev);
927 slow_work_unregister_user(THIS_MODULE);
928} 915}
929EXPORT_SYMBOL(drm_kms_helper_poll_fini); 916EXPORT_SYMBOL(drm_kms_helper_poll_fini);
930 917
@@ -932,12 +919,8 @@ void drm_helper_hpd_irq_event(struct drm_device *dev)
932{ 919{
933 if (!dev->mode_config.poll_enabled) 920 if (!dev->mode_config.poll_enabled)
934 return; 921 return;
935 delayed_slow_work_cancel(&dev->mode_config.output_poll_slow_work); 922 /* kill timer and schedule immediate execution, this doesn't block */
936 /* schedule a slow work asap */ 923 cancel_delayed_work(&dev->mode_config.output_poll_work);
937 delayed_slow_work_enqueue(&dev->mode_config.output_poll_slow_work, 0); 924 queue_delayed_work(system_nrt_wq, &dev->mode_config.output_poll_work, 0);
938} 925}
939EXPORT_SYMBOL(drm_helper_hpd_irq_event); 926EXPORT_SYMBOL(drm_helper_hpd_irq_event);
940
941static struct slow_work_ops output_poll_ops = {
942 .execute = output_poll_execute,
943};
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 6ac405534620..96e963108225 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -753,13 +753,11 @@ drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
753 { 1440, 576 }, 753 { 1440, 576 },
754 { 2880, 576 }, 754 { 2880, 576 },
755 }; 755 };
756 static const int n_sizes =
757 sizeof(cea_interlaced)/sizeof(cea_interlaced[0]);
758 756
759 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) 757 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
760 return; 758 return;
761 759
762 for (i = 0; i < n_sizes; i++) { 760 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
763 if ((mode->hdisplay == cea_interlaced[i].w) && 761 if ((mode->hdisplay == cea_interlaced[i].w) &&
764 (mode->vdisplay == cea_interlaced[i].h / 2)) { 762 (mode->vdisplay == cea_interlaced[i].h / 2)) {
765 mode->vdisplay *= 2; 763 mode->vdisplay *= 2;
@@ -1019,7 +1017,7 @@ drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1019 for (i = 0; i < 6; i++) { 1017 for (i = 0; i < 6; i++) {
1020 for (j = 7; j > 0; j--) { 1018 for (j = 7; j > 0; j--) {
1021 m = (i * 8) + (7 - j); 1019 m = (i * 8) + (7 - j);
1022 if (m >= num_est3_modes) 1020 if (m >= ARRAY_SIZE(est3_modes))
1023 break; 1021 break;
1024 if (est[i] & (1 << j)) { 1022 if (est[i] & (1 << j)) {
1025 mode = drm_mode_find_dmt(connector->dev, 1023 mode = drm_mode_find_dmt(connector->dev,
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 719662034bbf..de82e201d682 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -241,6 +241,80 @@ static int drm_fb_helper_parse_command_line(struct drm_fb_helper *fb_helper)
241 return 0; 241 return 0;
242} 242}
243 243
244int drm_fb_helper_debug_enter(struct fb_info *info)
245{
246 struct drm_fb_helper *helper = info->par;
247 struct drm_crtc_helper_funcs *funcs;
248 int i;
249
250 if (list_empty(&kernel_fb_helper_list))
251 return false;
252
253 list_for_each_entry(helper, &kernel_fb_helper_list, kernel_fb_list) {
254 for (i = 0; i < helper->crtc_count; i++) {
255 struct drm_mode_set *mode_set =
256 &helper->crtc_info[i].mode_set;
257
258 if (!mode_set->crtc->enabled)
259 continue;
260
261 funcs = mode_set->crtc->helper_private;
262 funcs->mode_set_base_atomic(mode_set->crtc,
263 mode_set->fb,
264 mode_set->x,
265 mode_set->y);
266
267 }
268 }
269
270 return 0;
271}
272EXPORT_SYMBOL(drm_fb_helper_debug_enter);
273
274/* Find the real fb for a given fb helper CRTC */
275static struct drm_framebuffer *drm_mode_config_fb(struct drm_crtc *crtc)
276{
277 struct drm_device *dev = crtc->dev;
278 struct drm_crtc *c;
279
280 list_for_each_entry(c, &dev->mode_config.crtc_list, head) {
281 if (crtc->base.id == c->base.id)
282 return c->fb;
283 }
284
285 return NULL;
286}
287
288int drm_fb_helper_debug_leave(struct fb_info *info)
289{
290 struct drm_fb_helper *helper = info->par;
291 struct drm_crtc *crtc;
292 struct drm_crtc_helper_funcs *funcs;
293 struct drm_framebuffer *fb;
294 int i;
295
296 for (i = 0; i < helper->crtc_count; i++) {
297 struct drm_mode_set *mode_set = &helper->crtc_info[i].mode_set;
298 crtc = mode_set->crtc;
299 funcs = crtc->helper_private;
300 fb = drm_mode_config_fb(crtc);
301
302 if (!crtc->enabled)
303 continue;
304
305 if (!fb) {
306 DRM_ERROR("no fb to restore??\n");
307 continue;
308 }
309
310 funcs->mode_set_base_atomic(mode_set->crtc, fb, crtc->x,
311 crtc->y);
312 }
313
314 return 0;
315}
316EXPORT_SYMBOL(drm_fb_helper_debug_leave);
317
244bool drm_fb_helper_force_kernel_mode(void) 318bool drm_fb_helper_force_kernel_mode(void)
245{ 319{
246 int i = 0; 320 int i = 0;
@@ -611,7 +685,7 @@ int drm_fb_helper_check_var(struct fb_var_screeninfo *var,
611 struct drm_framebuffer *fb = fb_helper->fb; 685 struct drm_framebuffer *fb = fb_helper->fb;
612 int depth; 686 int depth;
613 687
614 if (var->pixclock != 0) 688 if (var->pixclock != 0 || in_dbg_master())
615 return -EINVAL; 689 return -EINVAL;
616 690
617 /* Need to resize the fb object !!! */ 691 /* Need to resize the fb object !!! */
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6bb5ffc76ced..5ec10e02341b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -980,7 +980,10 @@ void
980intel_wait_for_vblank(struct drm_device *dev) 980intel_wait_for_vblank(struct drm_device *dev)
981{ 981{
982 /* Wait for 20ms, i.e. one cycle at 50hz. */ 982 /* Wait for 20ms, i.e. one cycle at 50hz. */
983 msleep(20); 983 if (in_dbg_master())
984 mdelay(20); /* The kernel debugger cannot call msleep() */
985 else
986 msleep(20);
984} 987}
985 988
986/* Parameters have changed, update FBC info */ 989/* Parameters have changed, update FBC info */
@@ -1314,6 +1317,10 @@ static void intel_update_fbc(struct drm_crtc *crtc,
1314 goto out_disable; 1317 goto out_disable;
1315 } 1318 }
1316 1319
1320 /* If the kernel debugger is active, always disable compression */
1321 if (in_dbg_master())
1322 goto out_disable;
1323
1317 if (intel_fbc_enabled(dev)) { 1324 if (intel_fbc_enabled(dev)) {
1318 /* We can re-enable it in this case, but need to update pitch */ 1325 /* We can re-enable it in this case, but need to update pitch */
1319 if ((fb->pitch > dev_priv->cfb_pitch) || 1326 if ((fb->pitch > dev_priv->cfb_pitch) ||
@@ -1385,6 +1392,98 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj)
1385 return 0; 1392 return 0;
1386} 1393}
1387 1394
1395/* Assume fb object is pinned & idle & fenced and just update base pointers */
1396static int
1397intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb,
1398 int x, int y)
1399{
1400 struct drm_device *dev = crtc->dev;
1401 struct drm_i915_private *dev_priv = dev->dev_private;
1402 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1403 struct intel_framebuffer *intel_fb;
1404 struct drm_i915_gem_object *obj_priv;
1405 struct drm_gem_object *obj;
1406 int plane = intel_crtc->plane;
1407 unsigned long Start, Offset;
1408 int dspbase = (plane == 0 ? DSPAADDR : DSPBADDR);
1409 int dspsurf = (plane == 0 ? DSPASURF : DSPBSURF);
1410 int dspstride = (plane == 0) ? DSPASTRIDE : DSPBSTRIDE;
1411 int dsptileoff = (plane == 0 ? DSPATILEOFF : DSPBTILEOFF);
1412 int dspcntr_reg = (plane == 0) ? DSPACNTR : DSPBCNTR;
1413 u32 dspcntr;
1414
1415 switch (plane) {
1416 case 0:
1417 case 1:
1418 break;
1419 default:
1420 DRM_ERROR("Can't update plane %d in SAREA\n", plane);
1421 return -EINVAL;
1422 }
1423
1424 intel_fb = to_intel_framebuffer(fb);
1425 obj = intel_fb->obj;
1426 obj_priv = to_intel_bo(obj);
1427
1428 dspcntr = I915_READ(dspcntr_reg);
1429 /* Mask out pixel format bits in case we change it */
1430 dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
1431 switch (fb->bits_per_pixel) {
1432 case 8:
1433 dspcntr |= DISPPLANE_8BPP;
1434 break;
1435 case 16:
1436 if (fb->depth == 15)
1437 dspcntr |= DISPPLANE_15_16BPP;
1438 else
1439 dspcntr |= DISPPLANE_16BPP;
1440 break;
1441 case 24:
1442 case 32:
1443 dspcntr |= DISPPLANE_32BPP_NO_ALPHA;
1444 break;
1445 default:
1446 DRM_ERROR("Unknown color depth\n");
1447 return -EINVAL;
1448 }
1449 if (IS_I965G(dev)) {
1450 if (obj_priv->tiling_mode != I915_TILING_NONE)
1451 dspcntr |= DISPPLANE_TILED;
1452 else
1453 dspcntr &= ~DISPPLANE_TILED;
1454 }
1455
1456 if (IS_IRONLAKE(dev))
1457 /* must disable */
1458 dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
1459
1460 I915_WRITE(dspcntr_reg, dspcntr);
1461
1462 Start = obj_priv->gtt_offset;
1463 Offset = y * fb->pitch + x * (fb->bits_per_pixel / 8);
1464
1465 DRM_DEBUG("Writing base %08lX %08lX %d %d\n", Start, Offset, x, y);
1466 I915_WRITE(dspstride, fb->pitch);
1467 if (IS_I965G(dev)) {
1468 I915_WRITE(dspbase, Offset);
1469 I915_READ(dspbase);
1470 I915_WRITE(dspsurf, Start);
1471 I915_READ(dspsurf);
1472 I915_WRITE(dsptileoff, (y << 16) | x);
1473 } else {
1474 I915_WRITE(dspbase, Start + Offset);
1475 I915_READ(dspbase);
1476 }
1477
1478 if ((IS_I965G(dev) || plane == 0))
1479 intel_update_fbc(crtc, &crtc->mode);
1480
1481 intel_wait_for_vblank(dev);
1482 intel_increase_pllclock(crtc, true);
1483
1484 return 0;
1485}
1486
1388static int 1487static int
1389intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, 1488intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
1390 struct drm_framebuffer *old_fb) 1489 struct drm_framebuffer *old_fb)
@@ -5040,6 +5139,7 @@ static const struct drm_crtc_helper_funcs intel_helper_funcs = {
5040 .mode_fixup = intel_crtc_mode_fixup, 5139 .mode_fixup = intel_crtc_mode_fixup,
5041 .mode_set = intel_crtc_mode_set, 5140 .mode_set = intel_crtc_mode_set,
5042 .mode_set_base = intel_pipe_set_base, 5141 .mode_set_base = intel_pipe_set_base,
5142 .mode_set_base_atomic = intel_pipe_set_base_atomic,
5043 .prepare = intel_crtc_prepare, 5143 .prepare = intel_crtc_prepare,
5044 .commit = intel_crtc_commit, 5144 .commit = intel_crtc_commit,
5045 .load_lut = intel_crtc_load_lut, 5145 .load_lut = intel_crtc_load_lut,
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index 1d2d67ce4a84..7bdc96256bf5 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -61,6 +61,8 @@ static struct fb_ops intelfb_ops = {
61 .fb_pan_display = drm_fb_helper_pan_display, 61 .fb_pan_display = drm_fb_helper_pan_display,
62 .fb_blank = drm_fb_helper_blank, 62 .fb_blank = drm_fb_helper_blank,
63 .fb_setcmap = drm_fb_helper_setcmap, 63 .fb_setcmap = drm_fb_helper_setcmap,
64 .fb_debug_enter = drm_fb_helper_debug_enter,
65 .fb_debug_leave = drm_fb_helper_debug_leave,
64}; 66};
65 67
66static int intelfb_create(struct intel_fbdev *ifbdev, 68static int intelfb_create(struct intel_fbdev *ifbdev,
@@ -130,7 +132,7 @@ static int intelfb_create(struct intel_fbdev *ifbdev,
130 132
131 strcpy(info->fix.id, "inteldrmfb"); 133 strcpy(info->fix.id, "inteldrmfb");
132 134
133 info->flags = FBINFO_DEFAULT; 135 info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
134 info->fbops = &intelfb_ops; 136 info->fbops = &intelfb_ops;
135 137
136 /* setup aperture base/size for vesafb takeover */ 138 /* setup aperture base/size for vesafb takeover */
@@ -148,8 +150,6 @@ static int intelfb_create(struct intel_fbdev *ifbdev,
148 info->fix.smem_start = dev->mode_config.fb_base + obj_priv->gtt_offset; 150 info->fix.smem_start = dev->mode_config.fb_base + obj_priv->gtt_offset;
149 info->fix.smem_len = size; 151 info->fix.smem_len = size;
150 152
151 info->flags = FBINFO_DEFAULT;
152
153 info->screen_base = ioremap_wc(dev->agp->base + obj_priv->gtt_offset, 153 info->screen_base = ioremap_wc(dev->agp->base + obj_priv->gtt_offset,
154 size); 154 size);
155 if (!info->screen_base) { 155 if (!info->screen_base) {
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 8b2bfc005c59..d9d4d51aa89e 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -392,13 +392,13 @@ static void intel_sdvo_debug_write(struct intel_encoder *intel_encoder, u8 cmd,
392 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]); 392 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
393 for (; i < 8; i++) 393 for (; i < 8; i++)
394 DRM_LOG_KMS(" "); 394 DRM_LOG_KMS(" ");
395 for (i = 0; i < sizeof(sdvo_cmd_names) / sizeof(sdvo_cmd_names[0]); i++) { 395 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
396 if (cmd == sdvo_cmd_names[i].cmd) { 396 if (cmd == sdvo_cmd_names[i].cmd) {
397 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name); 397 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
398 break; 398 break;
399 } 399 }
400 } 400 }
401 if (i == sizeof(sdvo_cmd_names)/ sizeof(sdvo_cmd_names[0])) 401 if (i == ARRAY_SIZE(sdvo_cmd_names))
402 DRM_LOG_KMS("(%02X)", cmd); 402 DRM_LOG_KMS("(%02X)", cmd);
403 DRM_LOG_KMS("\n"); 403 DRM_LOG_KMS("\n");
404} 404}
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index d61ffbc381e5..cc3726a4a1cb 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1422,7 +1422,7 @@ intel_tv_get_modes(struct drm_connector *connector)
1422 int j, count = 0; 1422 int j, count = 0;
1423 u64 tmp; 1423 u64 tmp;
1424 1424
1425 for (j = 0; j < sizeof(input_res_table) / sizeof(input_res_table[0]); 1425 for (j = 0; j < ARRAY_SIZE(input_res_table);
1426 j++) { 1426 j++) {
1427 struct input_res *input = &input_res_table[j]; 1427 struct input_res *input = &input_res_table[j];
1428 unsigned int hactive_s = input->w; 1428 unsigned int hactive_s = input->w;
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index 11f13fc46971..dbd30b2e43fd 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -250,6 +250,7 @@ nouveau_fbcon_create(struct nouveau_fbdev *nfbdev,
250 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA | 250 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA |
251 FBINFO_HWACCEL_FILLRECT | 251 FBINFO_HWACCEL_FILLRECT |
252 FBINFO_HWACCEL_IMAGEBLIT; 252 FBINFO_HWACCEL_IMAGEBLIT;
253 info->flags |= FBINFO_CAN_FORCE_OUTPUT;
253 info->fbops = &nouveau_fbcon_ops; 254 info->fbops = &nouveau_fbcon_ops;
254 info->fix.smem_start = dev->mode_config.fb_base + nvbo->bo.offset - 255 info->fix.smem_start = dev->mode_config.fb_base + nvbo->bo.offset -
255 dev_priv->vm_vram_base; 256 dev_priv->vm_vram_base;
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index dc1634bb0c11..dbf86962bdd1 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -224,7 +224,7 @@ static int radeonfb_create(struct radeon_fbdev *rfbdev,
224 224
225 drm_fb_helper_fill_fix(info, fb->pitch, fb->depth); 225 drm_fb_helper_fill_fix(info, fb->pitch, fb->depth);
226 226
227 info->flags = FBINFO_DEFAULT; 227 info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
228 info->fbops = &radeonfb_ops; 228 info->fbops = &radeonfb_ops;
229 229
230 tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start; 230 tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
diff --git a/drivers/gpu/drm/savage/savage_bci.c b/drivers/gpu/drm/savage/savage_bci.c
index f576232846c3..976dc8d25280 100644
--- a/drivers/gpu/drm/savage/savage_bci.c
+++ b/drivers/gpu/drm/savage/savage_bci.c
@@ -552,7 +552,7 @@ int savage_driver_load(struct drm_device *dev, unsigned long chipset)
552 552
553 553
554/* 554/*
555 * Initalize mappings. On Savage4 and SavageIX the alignment 555 * Initialize mappings. On Savage4 and SavageIX the alignment
556 * and size of the aperture is not suitable for automatic MTRR setup 556 * and size of the aperture is not suitable for automatic MTRR setup
557 * in drm_addmap. Therefore we add them manually before the maps are 557 * in drm_addmap. Therefore we add them manually before the maps are
558 * initialized, and tear them down on last close. 558 * initialized, and tear them down on last close.
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
index 8612378b131e..5f2d5df01e5c 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
@@ -1017,7 +1017,7 @@ int vmw_gmr_id_alloc(struct vmw_private *dev_priv, uint32_t *p_id)
1017} 1017}
1018 1018
1019/* 1019/*
1020 * Stream managment 1020 * Stream management
1021 */ 1021 */
1022 1022
1023static void vmw_stream_destroy(struct vmw_resource *res) 1023static void vmw_stream_destroy(struct vmw_resource *res)