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-rw-r--r--drivers/gpu/drm/radeon/radeon.h15
-rw-r--r--drivers/gpu/drm/radeon/radeon_cs.c20
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c22
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_kms.c26
-rw-r--r--drivers/gpu/drm/radeon/radeon_vm.c83
-rw-r--r--drivers/gpu/drm/radeon/trinity_dpm.c15
7 files changed, 122 insertions, 63 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index b7204500a9a6..60c47f829122 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -449,6 +449,7 @@ struct radeon_bo_va {
449 449
450 /* protected by vm mutex */ 450 /* protected by vm mutex */
451 struct list_head vm_list; 451 struct list_head vm_list;
452 struct list_head vm_status;
452 453
453 /* constant after initialization */ 454 /* constant after initialization */
454 struct radeon_vm *vm; 455 struct radeon_vm *vm;
@@ -867,6 +868,9 @@ struct radeon_vm {
867 struct list_head va; 868 struct list_head va;
868 unsigned id; 869 unsigned id;
869 870
871 /* BOs freed, but not yet updated in the PT */
872 struct list_head freed;
873
870 /* contains the page directory */ 874 /* contains the page directory */
871 struct radeon_bo *page_directory; 875 struct radeon_bo *page_directory;
872 uint64_t pd_gpu_addr; 876 uint64_t pd_gpu_addr;
@@ -875,6 +879,8 @@ struct radeon_vm {
875 /* array of page tables, one for each page directory entry */ 879 /* array of page tables, one for each page directory entry */
876 struct radeon_vm_pt *page_tables; 880 struct radeon_vm_pt *page_tables;
877 881
882 struct radeon_bo_va *ib_bo_va;
883
878 struct mutex mutex; 884 struct mutex mutex;
879 /* last fence for cs using this vm */ 885 /* last fence for cs using this vm */
880 struct radeon_fence *fence; 886 struct radeon_fence *fence;
@@ -2832,9 +2838,10 @@ void radeon_vm_fence(struct radeon_device *rdev,
2832uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr); 2838uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr);
2833int radeon_vm_update_page_directory(struct radeon_device *rdev, 2839int radeon_vm_update_page_directory(struct radeon_device *rdev,
2834 struct radeon_vm *vm); 2840 struct radeon_vm *vm);
2841int radeon_vm_clear_freed(struct radeon_device *rdev,
2842 struct radeon_vm *vm);
2835int radeon_vm_bo_update(struct radeon_device *rdev, 2843int radeon_vm_bo_update(struct radeon_device *rdev,
2836 struct radeon_vm *vm, 2844 struct radeon_bo_va *bo_va,
2837 struct radeon_bo *bo,
2838 struct ttm_mem_reg *mem); 2845 struct ttm_mem_reg *mem);
2839void radeon_vm_bo_invalidate(struct radeon_device *rdev, 2846void radeon_vm_bo_invalidate(struct radeon_device *rdev,
2840 struct radeon_bo *bo); 2847 struct radeon_bo *bo);
@@ -2847,8 +2854,8 @@ int radeon_vm_bo_set_addr(struct radeon_device *rdev,
2847 struct radeon_bo_va *bo_va, 2854 struct radeon_bo_va *bo_va,
2848 uint64_t offset, 2855 uint64_t offset,
2849 uint32_t flags); 2856 uint32_t flags);
2850int radeon_vm_bo_rmv(struct radeon_device *rdev, 2857void radeon_vm_bo_rmv(struct radeon_device *rdev,
2851 struct radeon_bo_va *bo_va); 2858 struct radeon_bo_va *bo_va);
2852 2859
2853/* audio */ 2860/* audio */
2854void r600_audio_update_hdmi(struct work_struct *work); 2861void r600_audio_update_hdmi(struct work_struct *work);
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
index 71a143461478..ae763f60c8a0 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -461,13 +461,23 @@ static int radeon_bo_vm_update_pte(struct radeon_cs_parser *p,
461 struct radeon_vm *vm) 461 struct radeon_vm *vm)
462{ 462{
463 struct radeon_device *rdev = p->rdev; 463 struct radeon_device *rdev = p->rdev;
464 struct radeon_bo_va *bo_va;
464 int i, r; 465 int i, r;
465 466
466 r = radeon_vm_update_page_directory(rdev, vm); 467 r = radeon_vm_update_page_directory(rdev, vm);
467 if (r) 468 if (r)
468 return r; 469 return r;
469 470
470 r = radeon_vm_bo_update(rdev, vm, rdev->ring_tmp_bo.bo, 471 r = radeon_vm_clear_freed(rdev, vm);
472 if (r)
473 return r;
474
475 if (vm->ib_bo_va == NULL) {
476 DRM_ERROR("Tmp BO not in VM!\n");
477 return -EINVAL;
478 }
479
480 r = radeon_vm_bo_update(rdev, vm->ib_bo_va,
471 &rdev->ring_tmp_bo.bo->tbo.mem); 481 &rdev->ring_tmp_bo.bo->tbo.mem);
472 if (r) 482 if (r)
473 return r; 483 return r;
@@ -480,7 +490,13 @@ static int radeon_bo_vm_update_pte(struct radeon_cs_parser *p,
480 continue; 490 continue;
481 491
482 bo = p->relocs[i].robj; 492 bo = p->relocs[i].robj;
483 r = radeon_vm_bo_update(rdev, vm, bo, &bo->tbo.mem); 493 bo_va = radeon_vm_bo_find(vm, bo);
494 if (bo_va == NULL) {
495 dev_err(rdev->dev, "bo %p not in vm %p\n", bo, vm);
496 return -EINVAL;
497 }
498
499 r = radeon_vm_bo_update(rdev, bo_va, &bo->tbo.mem);
484 if (r) 500 if (r)
485 return r; 501 return r;
486 } 502 }
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 03686fab842d..697add2cd4e3 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1056,36 +1056,36 @@ static void radeon_check_arguments(struct radeon_device *rdev)
1056 if (!radeon_check_pot_argument(radeon_vm_size)) { 1056 if (!radeon_check_pot_argument(radeon_vm_size)) {
1057 dev_warn(rdev->dev, "VM size (%d) must be a power of 2\n", 1057 dev_warn(rdev->dev, "VM size (%d) must be a power of 2\n",
1058 radeon_vm_size); 1058 radeon_vm_size);
1059 radeon_vm_size = 4096; 1059 radeon_vm_size = 4;
1060 } 1060 }
1061 1061
1062 if (radeon_vm_size < 4) { 1062 if (radeon_vm_size < 1) {
1063 dev_warn(rdev->dev, "VM size (%d) to small, min is 4MB\n", 1063 dev_warn(rdev->dev, "VM size (%d) to small, min is 1GB\n",
1064 radeon_vm_size); 1064 radeon_vm_size);
1065 radeon_vm_size = 4096; 1065 radeon_vm_size = 4;
1066 } 1066 }
1067 1067
1068 /* 1068 /*
1069 * Max GPUVM size for Cayman, SI and CI are 40 bits. 1069 * Max GPUVM size for Cayman, SI and CI are 40 bits.
1070 */ 1070 */
1071 if (radeon_vm_size > 1024*1024) { 1071 if (radeon_vm_size > 1024) {
1072 dev_warn(rdev->dev, "VM size (%d) to large, max is 1TB\n", 1072 dev_warn(rdev->dev, "VM size (%d) too large, max is 1TB\n",
1073 radeon_vm_size); 1073 radeon_vm_size);
1074 radeon_vm_size = 4096; 1074 radeon_vm_size = 4;
1075 } 1075 }
1076 1076
1077 /* defines number of bits in page table versus page directory, 1077 /* defines number of bits in page table versus page directory,
1078 * a page is 4KB so we have 12 bits offset, minimum 9 bits in the 1078 * a page is 4KB so we have 12 bits offset, minimum 9 bits in the
1079 * page table and the remaining bits are in the page directory */ 1079 * page table and the remaining bits are in the page directory */
1080 if (radeon_vm_block_size < 9) { 1080 if (radeon_vm_block_size < 9) {
1081 dev_warn(rdev->dev, "VM page table size (%d) to small\n", 1081 dev_warn(rdev->dev, "VM page table size (%d) too small\n",
1082 radeon_vm_block_size); 1082 radeon_vm_block_size);
1083 radeon_vm_block_size = 9; 1083 radeon_vm_block_size = 9;
1084 } 1084 }
1085 1085
1086 if (radeon_vm_block_size > 24 || 1086 if (radeon_vm_block_size > 24 ||
1087 radeon_vm_size < (1ull << radeon_vm_block_size)) { 1087 (radeon_vm_size * 1024) < (1ull << radeon_vm_block_size)) {
1088 dev_warn(rdev->dev, "VM page table size (%d) to large\n", 1088 dev_warn(rdev->dev, "VM page table size (%d) too large\n",
1089 radeon_vm_block_size); 1089 radeon_vm_block_size);
1090 radeon_vm_block_size = 9; 1090 radeon_vm_block_size = 9;
1091 } 1091 }
@@ -1238,7 +1238,7 @@ int radeon_device_init(struct radeon_device *rdev,
1238 /* Adjust VM size here. 1238 /* Adjust VM size here.
1239 * Max GPUVM size for cayman+ is 40 bits. 1239 * Max GPUVM size for cayman+ is 40 bits.
1240 */ 1240 */
1241 rdev->vm_manager.max_pfn = radeon_vm_size << 8; 1241 rdev->vm_manager.max_pfn = radeon_vm_size << 18;
1242 1242
1243 /* Set asic functions */ 1243 /* Set asic functions */
1244 r = radeon_asic_init(rdev); 1244 r = radeon_asic_init(rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index cb1421369e3a..e9e361084249 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -173,7 +173,7 @@ int radeon_dpm = -1;
173int radeon_aspm = -1; 173int radeon_aspm = -1;
174int radeon_runtime_pm = -1; 174int radeon_runtime_pm = -1;
175int radeon_hard_reset = 0; 175int radeon_hard_reset = 0;
176int radeon_vm_size = 4096; 176int radeon_vm_size = 4;
177int radeon_vm_block_size = 9; 177int radeon_vm_block_size = 9;
178int radeon_deep_color = 0; 178int radeon_deep_color = 0;
179 179
@@ -243,7 +243,7 @@ module_param_named(runpm, radeon_runtime_pm, int, 0444);
243MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))"); 243MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
244module_param_named(hard_reset, radeon_hard_reset, int, 0444); 244module_param_named(hard_reset, radeon_hard_reset, int, 0444);
245 245
246MODULE_PARM_DESC(vm_size, "VM address space size in megabytes (default 4GB)"); 246MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
247module_param_named(vm_size, radeon_vm_size, int, 0444); 247module_param_named(vm_size, radeon_vm_size, int, 0444);
248 248
249MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default 9)"); 249MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default 9)");
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index 35d931881b4b..d25ae6acfd5a 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -579,7 +579,7 @@ int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
579 /* new gpu have virtual address space support */ 579 /* new gpu have virtual address space support */
580 if (rdev->family >= CHIP_CAYMAN) { 580 if (rdev->family >= CHIP_CAYMAN) {
581 struct radeon_fpriv *fpriv; 581 struct radeon_fpriv *fpriv;
582 struct radeon_bo_va *bo_va; 582 struct radeon_vm *vm;
583 int r; 583 int r;
584 584
585 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL); 585 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
@@ -587,7 +587,8 @@ int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
587 return -ENOMEM; 587 return -ENOMEM;
588 } 588 }
589 589
590 r = radeon_vm_init(rdev, &fpriv->vm); 590 vm = &fpriv->vm;
591 r = radeon_vm_init(rdev, vm);
591 if (r) { 592 if (r) {
592 kfree(fpriv); 593 kfree(fpriv);
593 return r; 594 return r;
@@ -596,22 +597,23 @@ int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
596 if (rdev->accel_working) { 597 if (rdev->accel_working) {
597 r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); 598 r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false);
598 if (r) { 599 if (r) {
599 radeon_vm_fini(rdev, &fpriv->vm); 600 radeon_vm_fini(rdev, vm);
600 kfree(fpriv); 601 kfree(fpriv);
601 return r; 602 return r;
602 } 603 }
603 604
604 /* map the ib pool buffer read only into 605 /* map the ib pool buffer read only into
605 * virtual address space */ 606 * virtual address space */
606 bo_va = radeon_vm_bo_add(rdev, &fpriv->vm, 607 vm->ib_bo_va = radeon_vm_bo_add(rdev, vm,
607 rdev->ring_tmp_bo.bo); 608 rdev->ring_tmp_bo.bo);
608 r = radeon_vm_bo_set_addr(rdev, bo_va, RADEON_VA_IB_OFFSET, 609 r = radeon_vm_bo_set_addr(rdev, vm->ib_bo_va,
610 RADEON_VA_IB_OFFSET,
609 RADEON_VM_PAGE_READABLE | 611 RADEON_VM_PAGE_READABLE |
610 RADEON_VM_PAGE_SNOOPED); 612 RADEON_VM_PAGE_SNOOPED);
611 613
612 radeon_bo_unreserve(rdev->ring_tmp_bo.bo); 614 radeon_bo_unreserve(rdev->ring_tmp_bo.bo);
613 if (r) { 615 if (r) {
614 radeon_vm_fini(rdev, &fpriv->vm); 616 radeon_vm_fini(rdev, vm);
615 kfree(fpriv); 617 kfree(fpriv);
616 return r; 618 return r;
617 } 619 }
@@ -640,21 +642,19 @@ void radeon_driver_postclose_kms(struct drm_device *dev,
640 /* new gpu have virtual address space support */ 642 /* new gpu have virtual address space support */
641 if (rdev->family >= CHIP_CAYMAN && file_priv->driver_priv) { 643 if (rdev->family >= CHIP_CAYMAN && file_priv->driver_priv) {
642 struct radeon_fpriv *fpriv = file_priv->driver_priv; 644 struct radeon_fpriv *fpriv = file_priv->driver_priv;
643 struct radeon_bo_va *bo_va; 645 struct radeon_vm *vm = &fpriv->vm;
644 int r; 646 int r;
645 647
646 if (rdev->accel_working) { 648 if (rdev->accel_working) {
647 r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); 649 r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false);
648 if (!r) { 650 if (!r) {
649 bo_va = radeon_vm_bo_find(&fpriv->vm, 651 if (vm->ib_bo_va)
650 rdev->ring_tmp_bo.bo); 652 radeon_vm_bo_rmv(rdev, vm->ib_bo_va);
651 if (bo_va)
652 radeon_vm_bo_rmv(rdev, bo_va);
653 radeon_bo_unreserve(rdev->ring_tmp_bo.bo); 653 radeon_bo_unreserve(rdev->ring_tmp_bo.bo);
654 } 654 }
655 } 655 }
656 656
657 radeon_vm_fini(rdev, &fpriv->vm); 657 radeon_vm_fini(rdev, vm);
658 kfree(fpriv); 658 kfree(fpriv);
659 file_priv->driver_priv = NULL; 659 file_priv->driver_priv = NULL;
660 } 660 }
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c
index eecff6bbd341..fa41e0d7d17d 100644
--- a/drivers/gpu/drm/radeon/radeon_vm.c
+++ b/drivers/gpu/drm/radeon/radeon_vm.c
@@ -332,6 +332,7 @@ struct radeon_bo_va *radeon_vm_bo_add(struct radeon_device *rdev,
332 bo_va->ref_count = 1; 332 bo_va->ref_count = 1;
333 INIT_LIST_HEAD(&bo_va->bo_list); 333 INIT_LIST_HEAD(&bo_va->bo_list);
334 INIT_LIST_HEAD(&bo_va->vm_list); 334 INIT_LIST_HEAD(&bo_va->vm_list);
335 INIT_LIST_HEAD(&bo_va->vm_status);
335 336
336 mutex_lock(&vm->mutex); 337 mutex_lock(&vm->mutex);
337 list_add(&bo_va->vm_list, &vm->va); 338 list_add(&bo_va->vm_list, &vm->va);
@@ -468,6 +469,15 @@ int radeon_vm_bo_set_addr(struct radeon_device *rdev,
468 head = &tmp->vm_list; 469 head = &tmp->vm_list;
469 } 470 }
470 471
472 if (bo_va->soffset) {
473 /* add a clone of the bo_va to clear the old address */
474 tmp = kzalloc(sizeof(struct radeon_bo_va), GFP_KERNEL);
475 tmp->soffset = bo_va->soffset;
476 tmp->eoffset = bo_va->eoffset;
477 tmp->vm = vm;
478 list_add(&tmp->vm_status, &vm->freed);
479 }
480
471 bo_va->soffset = soffset; 481 bo_va->soffset = soffset;
472 bo_va->eoffset = eoffset; 482 bo_va->eoffset = eoffset;
473 bo_va->flags = flags; 483 bo_va->flags = flags;
@@ -823,25 +833,19 @@ static void radeon_vm_update_ptes(struct radeon_device *rdev,
823 * Object have to be reserved and mutex must be locked! 833 * Object have to be reserved and mutex must be locked!
824 */ 834 */
825int radeon_vm_bo_update(struct radeon_device *rdev, 835int radeon_vm_bo_update(struct radeon_device *rdev,
826 struct radeon_vm *vm, 836 struct radeon_bo_va *bo_va,
827 struct radeon_bo *bo,
828 struct ttm_mem_reg *mem) 837 struct ttm_mem_reg *mem)
829{ 838{
839 struct radeon_vm *vm = bo_va->vm;
830 struct radeon_ib ib; 840 struct radeon_ib ib;
831 struct radeon_bo_va *bo_va;
832 unsigned nptes, ndw; 841 unsigned nptes, ndw;
833 uint64_t addr; 842 uint64_t addr;
834 int r; 843 int r;
835 844
836 bo_va = radeon_vm_bo_find(vm, bo);
837 if (bo_va == NULL) {
838 dev_err(rdev->dev, "bo %p not in vm %p\n", bo, vm);
839 return -EINVAL;
840 }
841 845
842 if (!bo_va->soffset) { 846 if (!bo_va->soffset) {
843 dev_err(rdev->dev, "bo %p don't has a mapping in vm %p\n", 847 dev_err(rdev->dev, "bo %p don't has a mapping in vm %p\n",
844 bo, vm); 848 bo_va->bo, vm);
845 return -EINVAL; 849 return -EINVAL;
846 } 850 }
847 851
@@ -868,7 +872,7 @@ int radeon_vm_bo_update(struct radeon_device *rdev,
868 872
869 trace_radeon_vm_bo_update(bo_va); 873 trace_radeon_vm_bo_update(bo_va);
870 874
871 nptes = radeon_bo_ngpu_pages(bo); 875 nptes = (bo_va->eoffset - bo_va->soffset) / RADEON_GPU_PAGE_SIZE;
872 876
873 /* padding, etc. */ 877 /* padding, etc. */
874 ndw = 64; 878 ndw = 64;
@@ -911,33 +915,61 @@ int radeon_vm_bo_update(struct radeon_device *rdev,
911} 915}
912 916
913/** 917/**
918 * radeon_vm_clear_freed - clear freed BOs in the PT
919 *
920 * @rdev: radeon_device pointer
921 * @vm: requested vm
922 *
923 * Make sure all freed BOs are cleared in the PT.
924 * Returns 0 for success.
925 *
926 * PTs have to be reserved and mutex must be locked!
927 */
928int radeon_vm_clear_freed(struct radeon_device *rdev,
929 struct radeon_vm *vm)
930{
931 struct radeon_bo_va *bo_va, *tmp;
932 int r;
933
934 list_for_each_entry_safe(bo_va, tmp, &vm->freed, vm_status) {
935 list_del(&bo_va->vm_status);
936 r = radeon_vm_bo_update(rdev, bo_va, NULL);
937 kfree(bo_va);
938 if (r)
939 return r;
940 }
941 return 0;
942
943}
944
945/**
914 * radeon_vm_bo_rmv - remove a bo to a specific vm 946 * radeon_vm_bo_rmv - remove a bo to a specific vm
915 * 947 *
916 * @rdev: radeon_device pointer 948 * @rdev: radeon_device pointer
917 * @bo_va: requested bo_va 949 * @bo_va: requested bo_va
918 * 950 *
919 * Remove @bo_va->bo from the requested vm (cayman+). 951 * Remove @bo_va->bo from the requested vm (cayman+).
920 * Remove @bo_va->bo from the list of bos associated with the bo_va->vm and
921 * remove the ptes for @bo_va in the page table.
922 * Returns 0 for success.
923 * 952 *
924 * Object have to be reserved! 953 * Object have to be reserved!
925 */ 954 */
926int radeon_vm_bo_rmv(struct radeon_device *rdev, 955void radeon_vm_bo_rmv(struct radeon_device *rdev,
927 struct radeon_bo_va *bo_va) 956 struct radeon_bo_va *bo_va)
928{ 957{
929 int r = 0; 958 struct radeon_vm *vm = bo_va->vm;
930 959
931 mutex_lock(&bo_va->vm->mutex); 960 list_del(&bo_va->bo_list);
932 if (bo_va->soffset)
933 r = radeon_vm_bo_update(rdev, bo_va->vm, bo_va->bo, NULL);
934 961
962 mutex_lock(&vm->mutex);
935 list_del(&bo_va->vm_list); 963 list_del(&bo_va->vm_list);
936 mutex_unlock(&bo_va->vm->mutex);
937 list_del(&bo_va->bo_list);
938 964
939 kfree(bo_va); 965 if (bo_va->soffset) {
940 return r; 966 bo_va->bo = NULL;
967 list_add(&bo_va->vm_status, &vm->freed);
968 } else {
969 kfree(bo_va);
970 }
971
972 mutex_unlock(&vm->mutex);
941} 973}
942 974
943/** 975/**
@@ -975,11 +1007,13 @@ int radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm)
975 int r; 1007 int r;
976 1008
977 vm->id = 0; 1009 vm->id = 0;
1010 vm->ib_bo_va = NULL;
978 vm->fence = NULL; 1011 vm->fence = NULL;
979 vm->last_flush = NULL; 1012 vm->last_flush = NULL;
980 vm->last_id_use = NULL; 1013 vm->last_id_use = NULL;
981 mutex_init(&vm->mutex); 1014 mutex_init(&vm->mutex);
982 INIT_LIST_HEAD(&vm->va); 1015 INIT_LIST_HEAD(&vm->va);
1016 INIT_LIST_HEAD(&vm->freed);
983 1017
984 pd_size = radeon_vm_directory_size(rdev); 1018 pd_size = radeon_vm_directory_size(rdev);
985 pd_entries = radeon_vm_num_pdes(rdev); 1019 pd_entries = radeon_vm_num_pdes(rdev);
@@ -1034,7 +1068,8 @@ void radeon_vm_fini(struct radeon_device *rdev, struct radeon_vm *vm)
1034 kfree(bo_va); 1068 kfree(bo_va);
1035 } 1069 }
1036 } 1070 }
1037 1071 list_for_each_entry_safe(bo_va, tmp, &vm->freed, vm_status)
1072 kfree(bo_va);
1038 1073
1039 for (i = 0; i < radeon_vm_num_pdes(rdev); i++) 1074 for (i = 0; i < radeon_vm_num_pdes(rdev); i++)
1040 radeon_bo_unref(&vm->page_tables[i].bo); 1075 radeon_bo_unref(&vm->page_tables[i].bo);
diff --git a/drivers/gpu/drm/radeon/trinity_dpm.c b/drivers/gpu/drm/radeon/trinity_dpm.c
index 20da6ff183df..32e50be9c4ac 100644
--- a/drivers/gpu/drm/radeon/trinity_dpm.c
+++ b/drivers/gpu/drm/radeon/trinity_dpm.c
@@ -1874,15 +1874,16 @@ int trinity_dpm_init(struct radeon_device *rdev)
1874 for (i = 0; i < SUMO_MAX_HARDWARE_POWERLEVELS; i++) 1874 for (i = 0; i < SUMO_MAX_HARDWARE_POWERLEVELS; i++)
1875 pi->at[i] = TRINITY_AT_DFLT; 1875 pi->at[i] = TRINITY_AT_DFLT;
1876 1876
1877 /* There are stability issues reported on latops with 1877 /* There are stability issues reported on with
1878 * bapm installed when switching between AC and battery 1878 * bapm enabled when switching between AC and battery
1879 * power. At the same time, some desktop boards hang 1879 * power. At the same time, some MSI boards hang
1880 * if it's not enabled and dpm is enabled. 1880 * if it's not enabled and dpm is enabled. Just enable
1881 * it for MSI boards right now.
1881 */ 1882 */
1882 if (rdev->flags & RADEON_IS_MOBILITY) 1883 if (rdev->pdev->subsystem_vendor == 0x1462)
1883 pi->enable_bapm = false;
1884 else
1885 pi->enable_bapm = true; 1884 pi->enable_bapm = true;
1885 else
1886 pi->enable_bapm = false;
1886 pi->enable_nbps_policy = true; 1887 pi->enable_nbps_policy = true;
1887 pi->enable_sclk_ds = true; 1888 pi->enable_sclk_ds = true;
1888 pi->enable_gfx_power_gating = true; 1889 pi->enable_gfx_power_gating = true;