diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_tv.c | 11 |
2 files changed, 9 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 05b1894fa13d..377cc588f5e9 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -876,7 +876,7 @@ | |||
876 | */ | 876 | */ |
877 | # define TV_ENC_C0_FIX (1 << 10) | 877 | # define TV_ENC_C0_FIX (1 << 10) |
878 | /** Bits that must be preserved by software */ | 878 | /** Bits that must be preserved by software */ |
879 | # define TV_CTL_SAVE ((3 << 8) | (3 << 6)) | 879 | # define TV_CTL_SAVE ((1 << 11) | (3 << 9) | (7 << 6) | 0xf) |
880 | # define TV_FUSE_STATE_MASK (3 << 4) | 880 | # define TV_FUSE_STATE_MASK (3 << 4) |
881 | /** Read-only state that reports all features enabled */ | 881 | /** Read-only state that reports all features enabled */ |
882 | # define TV_FUSE_STATE_ENABLED (0 << 4) | 882 | # define TV_FUSE_STATE_ENABLED (0 << 4) |
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index 08c4034c44c3..7021798f98e9 100644 --- a/drivers/gpu/drm/i915/intel_tv.c +++ b/drivers/gpu/drm/i915/intel_tv.c | |||
@@ -1135,7 +1135,8 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
1135 | if (!tv_mode) | 1135 | if (!tv_mode) |
1136 | return; /* can't happen (mode_prepare prevents this) */ | 1136 | return; /* can't happen (mode_prepare prevents this) */ |
1137 | 1137 | ||
1138 | tv_ctl = 0; | 1138 | tv_ctl = I915_READ(TV_CTL); |
1139 | tv_ctl &= TV_CTL_SAVE; | ||
1139 | 1140 | ||
1140 | switch (tv_priv->type) { | 1141 | switch (tv_priv->type) { |
1141 | default: | 1142 | default: |
@@ -1215,7 +1216,6 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
1215 | /* dda1 implies valid video levels */ | 1216 | /* dda1 implies valid video levels */ |
1216 | if (tv_mode->dda1_inc) { | 1217 | if (tv_mode->dda1_inc) { |
1217 | scctl1 |= TV_SC_DDA1_EN; | 1218 | scctl1 |= TV_SC_DDA1_EN; |
1218 | scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT; | ||
1219 | } | 1219 | } |
1220 | 1220 | ||
1221 | if (tv_mode->dda2_inc) | 1221 | if (tv_mode->dda2_inc) |
@@ -1225,6 +1225,7 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
1225 | scctl1 |= TV_SC_DDA3_EN; | 1225 | scctl1 |= TV_SC_DDA3_EN; |
1226 | 1226 | ||
1227 | scctl1 |= tv_mode->sc_reset; | 1227 | scctl1 |= tv_mode->sc_reset; |
1228 | scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT; | ||
1228 | scctl1 |= tv_mode->dda1_inc << TV_SCDDA1_INC_SHIFT; | 1229 | scctl1 |= tv_mode->dda1_inc << TV_SCDDA1_INC_SHIFT; |
1229 | 1230 | ||
1230 | scctl2 = tv_mode->dda2_size << TV_SCDDA2_SIZE_SHIFT | | 1231 | scctl2 = tv_mode->dda2_size << TV_SCDDA2_SIZE_SHIFT | |
@@ -1266,7 +1267,11 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
1266 | color_conversion->av); | 1267 | color_conversion->av); |
1267 | } | 1268 | } |
1268 | 1269 | ||
1269 | I915_WRITE(TV_CLR_KNOBS, 0x00606000); | 1270 | if (IS_I965G(dev)) |
1271 | I915_WRITE(TV_CLR_KNOBS, 0x00404000); | ||
1272 | else | ||
1273 | I915_WRITE(TV_CLR_KNOBS, 0x00606000); | ||
1274 | |||
1270 | if (video_levels) | 1275 | if (video_levels) |
1271 | I915_WRITE(TV_CLR_LEVEL, | 1276 | I915_WRITE(TV_CLR_LEVEL, |
1272 | ((video_levels->black << TV_BLACK_LEVEL_SHIFT) | | 1277 | ((video_levels->black << TV_BLACK_LEVEL_SHIFT) | |