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-rw-r--r--drivers/gpu/drm/i915/i915_drv.h14
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 74011235f2cc..da7c0072ad4c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -597,16 +597,18 @@ extern void opregion_enable_asle(struct drm_device *dev);
597 * MI_STORE_DATA_IMM. 597 * MI_STORE_DATA_IMM.
598 * 598 *
599 * The following dwords have a reserved meaning: 599 * The following dwords have a reserved meaning:
600 * 0: ISR copy, updated when an ISR bit not set in the HWSTAM changes. 600 * 0x00: ISR copy, updated when an ISR bit not set in the HWSTAM changes.
601 * 4: ring 0 head pointer 601 * 0x04: ring 0 head pointer
602 * 5: ring 1 head pointer (915-class) 602 * 0x05: ring 1 head pointer (915-class)
603 * 6: ring 2 head pointer (915-class) 603 * 0x06: ring 2 head pointer (915-class)
604 * 0x10-0x1b: Context status DWords (GM45)
605 * 0x1f: Last written status offset. (GM45)
604 * 606 *
605 * The area from dword 0x10 to 0x3ff is available for driver usage. 607 * The area from dword 0x20 to 0x3ff is available for driver usage.
606 */ 608 */
607#define READ_HWSP(dev_priv, reg) (((volatile u32*)(dev_priv->hw_status_page))[reg]) 609#define READ_HWSP(dev_priv, reg) (((volatile u32*)(dev_priv->hw_status_page))[reg])
608#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, 5) 610#define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, 5)
609#define I915_GEM_HWS_INDEX 0x10 611#define I915_GEM_HWS_INDEX 0x20
610 612
611extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); 613extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
612 614