diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_bios.c | 51 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_connector.c | 34 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_crtc.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_drv.c | 29 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_mem.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_state.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv04_cursor.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_cursor.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_sor.c | 7 |
9 files changed, 97 insertions, 34 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c index 745ff3788e9d..9ba2deaadcc7 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bios.c +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c | |||
@@ -2827,7 +2827,10 @@ init_gpio(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) | |||
2827 | 2827 | ||
2828 | BIOSLOG(bios, "0x%04X: Entry: 0x%08X\n", offset, gpio->entry); | 2828 | BIOSLOG(bios, "0x%04X: Entry: 0x%08X\n", offset, gpio->entry); |
2829 | 2829 | ||
2830 | nv50_gpio_set(bios->dev, gpio->tag, gpio->state_default); | 2830 | BIOSLOG(bios, "0x%04X: set gpio 0x%02x, state %d\n", |
2831 | offset, gpio->tag, gpio->state_default); | ||
2832 | if (bios->execute) | ||
2833 | nv50_gpio_set(bios->dev, gpio->tag, gpio->state_default); | ||
2831 | 2834 | ||
2832 | /* The NVIDIA binary driver doesn't appear to actually do | 2835 | /* The NVIDIA binary driver doesn't appear to actually do |
2833 | * any of this, my VBIOS does however. | 2836 | * any of this, my VBIOS does however. |
@@ -5553,12 +5556,6 @@ parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb, | |||
5553 | entry->bus = (conn >> 16) & 0xf; | 5556 | entry->bus = (conn >> 16) & 0xf; |
5554 | entry->location = (conn >> 20) & 0x3; | 5557 | entry->location = (conn >> 20) & 0x3; |
5555 | entry->or = (conn >> 24) & 0xf; | 5558 | entry->or = (conn >> 24) & 0xf; |
5556 | /* | ||
5557 | * Normal entries consist of a single bit, but dual link has the | ||
5558 | * next most significant bit set too | ||
5559 | */ | ||
5560 | entry->duallink_possible = | ||
5561 | ((1 << (ffs(entry->or) - 1)) * 3 == entry->or); | ||
5562 | 5559 | ||
5563 | switch (entry->type) { | 5560 | switch (entry->type) { |
5564 | case OUTPUT_ANALOG: | 5561 | case OUTPUT_ANALOG: |
@@ -5642,6 +5639,16 @@ parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb, | |||
5642 | break; | 5639 | break; |
5643 | } | 5640 | } |
5644 | 5641 | ||
5642 | if (dcb->version < 0x40) { | ||
5643 | /* Normal entries consist of a single bit, but dual link has | ||
5644 | * the next most significant bit set too | ||
5645 | */ | ||
5646 | entry->duallink_possible = | ||
5647 | ((1 << (ffs(entry->or) - 1)) * 3 == entry->or); | ||
5648 | } else { | ||
5649 | entry->duallink_possible = (entry->sorconf.link == 3); | ||
5650 | } | ||
5651 | |||
5645 | /* unsure what DCB version introduces this, 3.0? */ | 5652 | /* unsure what DCB version introduces this, 3.0? */ |
5646 | if (conf & 0x100000) | 5653 | if (conf & 0x100000) |
5647 | entry->i2c_upper_default = true; | 5654 | entry->i2c_upper_default = true; |
@@ -6225,6 +6232,30 @@ nouveau_bios_i2c_devices_takedown(struct drm_device *dev) | |||
6225 | nouveau_i2c_fini(dev, entry); | 6232 | nouveau_i2c_fini(dev, entry); |
6226 | } | 6233 | } |
6227 | 6234 | ||
6235 | static bool | ||
6236 | nouveau_bios_posted(struct drm_device *dev) | ||
6237 | { | ||
6238 | struct drm_nouveau_private *dev_priv = dev->dev_private; | ||
6239 | bool was_locked; | ||
6240 | unsigned htotal; | ||
6241 | |||
6242 | if (dev_priv->chipset >= NV_50) { | ||
6243 | if (NVReadVgaCrtc(dev, 0, 0x00) == 0 && | ||
6244 | NVReadVgaCrtc(dev, 0, 0x1a) == 0) | ||
6245 | return false; | ||
6246 | return true; | ||
6247 | } | ||
6248 | |||
6249 | was_locked = NVLockVgaCrtcs(dev, false); | ||
6250 | htotal = NVReadVgaCrtc(dev, 0, 0x06); | ||
6251 | htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8; | ||
6252 | htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4; | ||
6253 | htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10; | ||
6254 | htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11; | ||
6255 | NVLockVgaCrtcs(dev, was_locked); | ||
6256 | return (htotal != 0); | ||
6257 | } | ||
6258 | |||
6228 | int | 6259 | int |
6229 | nouveau_bios_init(struct drm_device *dev) | 6260 | nouveau_bios_init(struct drm_device *dev) |
6230 | { | 6261 | { |
@@ -6259,11 +6290,9 @@ nouveau_bios_init(struct drm_device *dev) | |||
6259 | bios->execute = false; | 6290 | bios->execute = false; |
6260 | 6291 | ||
6261 | /* ... unless card isn't POSTed already */ | 6292 | /* ... unless card isn't POSTed already */ |
6262 | if (dev_priv->card_type >= NV_10 && | 6293 | if (!nouveau_bios_posted(dev)) { |
6263 | NVReadVgaCrtc(dev, 0, 0x00) == 0 && | ||
6264 | NVReadVgaCrtc(dev, 0, 0x1a) == 0) { | ||
6265 | NV_INFO(dev, "Adaptor not initialised\n"); | 6294 | NV_INFO(dev, "Adaptor not initialised\n"); |
6266 | if (dev_priv->card_type < NV_50) { | 6295 | if (dev_priv->card_type < NV_40) { |
6267 | NV_ERROR(dev, "Unable to POST this chipset\n"); | 6296 | NV_ERROR(dev, "Unable to POST this chipset\n"); |
6268 | return -ENODEV; | 6297 | return -ENODEV; |
6269 | } | 6298 | } |
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index 266b0ff441af..149ed224c3cb 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c | |||
@@ -432,24 +432,27 @@ nouveau_connector_set_property(struct drm_connector *connector, | |||
432 | } | 432 | } |
433 | 433 | ||
434 | static struct drm_display_mode * | 434 | static struct drm_display_mode * |
435 | nouveau_connector_native_mode(struct nouveau_connector *connector) | 435 | nouveau_connector_native_mode(struct drm_connector *connector) |
436 | { | 436 | { |
437 | struct drm_device *dev = connector->base.dev; | 437 | struct drm_connector_helper_funcs *helper = connector->helper_private; |
438 | struct nouveau_connector *nv_connector = nouveau_connector(connector); | ||
439 | struct drm_device *dev = connector->dev; | ||
438 | struct drm_display_mode *mode, *largest = NULL; | 440 | struct drm_display_mode *mode, *largest = NULL; |
439 | int high_w = 0, high_h = 0, high_v = 0; | 441 | int high_w = 0, high_h = 0, high_v = 0; |
440 | 442 | ||
441 | /* Use preferred mode if there is one.. */ | 443 | list_for_each_entry(mode, &nv_connector->base.probed_modes, head) { |
442 | list_for_each_entry(mode, &connector->base.probed_modes, head) { | 444 | if (helper->mode_valid(connector, mode) != MODE_OK) |
445 | continue; | ||
446 | |||
447 | /* Use preferred mode if there is one.. */ | ||
443 | if (mode->type & DRM_MODE_TYPE_PREFERRED) { | 448 | if (mode->type & DRM_MODE_TYPE_PREFERRED) { |
444 | NV_DEBUG_KMS(dev, "native mode from preferred\n"); | 449 | NV_DEBUG_KMS(dev, "native mode from preferred\n"); |
445 | return drm_mode_duplicate(dev, mode); | 450 | return drm_mode_duplicate(dev, mode); |
446 | } | 451 | } |
447 | } | ||
448 | 452 | ||
449 | /* Otherwise, take the resolution with the largest width, then height, | 453 | /* Otherwise, take the resolution with the largest width, then |
450 | * then vertical refresh | 454 | * height, then vertical refresh |
451 | */ | 455 | */ |
452 | list_for_each_entry(mode, &connector->base.probed_modes, head) { | ||
453 | if (mode->hdisplay < high_w) | 456 | if (mode->hdisplay < high_w) |
454 | continue; | 457 | continue; |
455 | 458 | ||
@@ -553,7 +556,7 @@ nouveau_connector_get_modes(struct drm_connector *connector) | |||
553 | */ | 556 | */ |
554 | if (!nv_connector->native_mode) | 557 | if (!nv_connector->native_mode) |
555 | nv_connector->native_mode = | 558 | nv_connector->native_mode = |
556 | nouveau_connector_native_mode(nv_connector); | 559 | nouveau_connector_native_mode(connector); |
557 | if (ret == 0 && nv_connector->native_mode) { | 560 | if (ret == 0 && nv_connector->native_mode) { |
558 | struct drm_display_mode *mode; | 561 | struct drm_display_mode *mode; |
559 | 562 | ||
@@ -584,9 +587,9 @@ nouveau_connector_mode_valid(struct drm_connector *connector, | |||
584 | 587 | ||
585 | switch (nv_encoder->dcb->type) { | 588 | switch (nv_encoder->dcb->type) { |
586 | case OUTPUT_LVDS: | 589 | case OUTPUT_LVDS: |
587 | BUG_ON(!nv_connector->native_mode); | 590 | if (nv_connector->native_mode && |
588 | if (mode->hdisplay > nv_connector->native_mode->hdisplay || | 591 | (mode->hdisplay > nv_connector->native_mode->hdisplay || |
589 | mode->vdisplay > nv_connector->native_mode->vdisplay) | 592 | mode->vdisplay > nv_connector->native_mode->vdisplay)) |
590 | return MODE_PANEL; | 593 | return MODE_PANEL; |
591 | 594 | ||
592 | min_clock = 0; | 595 | min_clock = 0; |
@@ -594,8 +597,7 @@ nouveau_connector_mode_valid(struct drm_connector *connector, | |||
594 | break; | 597 | break; |
595 | case OUTPUT_TMDS: | 598 | case OUTPUT_TMDS: |
596 | if ((dev_priv->card_type >= NV_50 && !nouveau_duallink) || | 599 | if ((dev_priv->card_type >= NV_50 && !nouveau_duallink) || |
597 | (dev_priv->card_type < NV_50 && | 600 | !nv_encoder->dcb->duallink_possible) |
598 | !nv_encoder->dcb->duallink_possible)) | ||
599 | max_clock = 165000; | 601 | max_clock = 165000; |
600 | else | 602 | else |
601 | max_clock = 330000; | 603 | max_clock = 330000; |
@@ -729,7 +731,7 @@ nouveau_connector_create_lvds(struct drm_device *dev, | |||
729 | if (ret == 0) | 731 | if (ret == 0) |
730 | goto out; | 732 | goto out; |
731 | nv_connector->detected_encoder = nv_encoder; | 733 | nv_connector->detected_encoder = nv_encoder; |
732 | nv_connector->native_mode = nouveau_connector_native_mode(nv_connector); | 734 | nv_connector->native_mode = nouveau_connector_native_mode(connector); |
733 | list_for_each_entry_safe(mode, temp, &connector->probed_modes, head) | 735 | list_for_each_entry_safe(mode, temp, &connector->probed_modes, head) |
734 | drm_mode_remove(connector, mode); | 736 | drm_mode_remove(connector, mode); |
735 | 737 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_crtc.h b/drivers/gpu/drm/nouveau/nouveau_crtc.h index 49fa7b2d257e..cb1ce2a09162 100644 --- a/drivers/gpu/drm/nouveau/nouveau_crtc.h +++ b/drivers/gpu/drm/nouveau/nouveau_crtc.h | |||
@@ -40,6 +40,8 @@ struct nouveau_crtc { | |||
40 | int sharpness; | 40 | int sharpness; |
41 | int last_dpms; | 41 | int last_dpms; |
42 | 42 | ||
43 | int cursor_saved_x, cursor_saved_y; | ||
44 | |||
43 | struct { | 45 | struct { |
44 | int cpp; | 46 | int cpp; |
45 | bool blanked; | 47 | bool blanked; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.c b/drivers/gpu/drm/nouveau/nouveau_drv.c index c6079e36669d..273770432298 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.c +++ b/drivers/gpu/drm/nouveau/nouveau_drv.c | |||
@@ -175,6 +175,13 @@ nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state) | |||
175 | nouveau_bo_unpin(nouveau_fb->nvbo); | 175 | nouveau_bo_unpin(nouveau_fb->nvbo); |
176 | } | 176 | } |
177 | 177 | ||
178 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | ||
179 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | ||
180 | |||
181 | nouveau_bo_unmap(nv_crtc->cursor.nvbo); | ||
182 | nouveau_bo_unpin(nv_crtc->cursor.nvbo); | ||
183 | } | ||
184 | |||
178 | NV_INFO(dev, "Evicting buffers...\n"); | 185 | NV_INFO(dev, "Evicting buffers...\n"); |
179 | ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM); | 186 | ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM); |
180 | 187 | ||
@@ -314,12 +321,34 @@ nouveau_pci_resume(struct pci_dev *pdev) | |||
314 | nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM); | 321 | nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM); |
315 | } | 322 | } |
316 | 323 | ||
324 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | ||
325 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | ||
326 | int ret; | ||
327 | |||
328 | ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM); | ||
329 | if (!ret) | ||
330 | ret = nouveau_bo_map(nv_crtc->cursor.nvbo); | ||
331 | if (ret) | ||
332 | NV_ERROR(dev, "Could not pin/map cursor.\n"); | ||
333 | } | ||
334 | |||
317 | if (dev_priv->card_type < NV_50) { | 335 | if (dev_priv->card_type < NV_50) { |
318 | nv04_display_restore(dev); | 336 | nv04_display_restore(dev); |
319 | NVLockVgaCrtcs(dev, false); | 337 | NVLockVgaCrtcs(dev, false); |
320 | } else | 338 | } else |
321 | nv50_display_init(dev); | 339 | nv50_display_init(dev); |
322 | 340 | ||
341 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | ||
342 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | ||
343 | |||
344 | nv_crtc->cursor.set_offset(nv_crtc, | ||
345 | nv_crtc->cursor.nvbo->bo.offset - | ||
346 | dev_priv->vm_vram_base); | ||
347 | |||
348 | nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x, | ||
349 | nv_crtc->cursor_saved_y); | ||
350 | } | ||
351 | |||
323 | /* Force CLUT to get re-loaded during modeset */ | 352 | /* Force CLUT to get re-loaded during modeset */ |
324 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | 353 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
325 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | 354 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c index 775a7017af64..c1fd42b0dad1 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mem.c +++ b/drivers/gpu/drm/nouveau/nouveau_mem.c | |||
@@ -540,7 +540,8 @@ nouveau_mem_detect(struct drm_device *dev) | |||
540 | dev_priv->vram_size = nv_rd32(dev, NV04_FIFO_DATA); | 540 | dev_priv->vram_size = nv_rd32(dev, NV04_FIFO_DATA); |
541 | dev_priv->vram_size &= NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK; | 541 | dev_priv->vram_size &= NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK; |
542 | if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac) | 542 | if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac) |
543 | dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10) << 12; | 543 | dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10); |
544 | dev_priv->vram_sys_base <<= 12; | ||
544 | } | 545 | } |
545 | 546 | ||
546 | NV_INFO(dev, "Detected %dMiB VRAM\n", (int)(dev_priv->vram_size >> 20)); | 547 | NV_INFO(dev, "Detected %dMiB VRAM\n", (int)(dev_priv->vram_size >> 20)); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c index 5c468a4fef9a..147e59c40151 100644 --- a/drivers/gpu/drm/nouveau/nouveau_state.c +++ b/drivers/gpu/drm/nouveau/nouveau_state.c | |||
@@ -916,6 +916,9 @@ int nouveau_ioctl_getparam(struct drm_device *dev, void *data, | |||
916 | case NOUVEAU_GETPARAM_VM_VRAM_BASE: | 916 | case NOUVEAU_GETPARAM_VM_VRAM_BASE: |
917 | getparam->value = dev_priv->vm_vram_base; | 917 | getparam->value = dev_priv->vm_vram_base; |
918 | break; | 918 | break; |
919 | case NOUVEAU_GETPARAM_PTIMER_TIME: | ||
920 | getparam->value = dev_priv->engine.timer.read(dev); | ||
921 | break; | ||
919 | case NOUVEAU_GETPARAM_GRAPH_UNITS: | 922 | case NOUVEAU_GETPARAM_GRAPH_UNITS: |
920 | /* NV40 and NV50 versions are quite different, but register | 923 | /* NV40 and NV50 versions are quite different, but register |
921 | * address is the same. User is supposed to know the card | 924 | * address is the same. User is supposed to know the card |
diff --git a/drivers/gpu/drm/nouveau/nv04_cursor.c b/drivers/gpu/drm/nouveau/nv04_cursor.c index 89a91b9d8b25..aaf3de3bc816 100644 --- a/drivers/gpu/drm/nouveau/nv04_cursor.c +++ b/drivers/gpu/drm/nouveau/nv04_cursor.c | |||
@@ -20,6 +20,7 @@ nv04_cursor_hide(struct nouveau_crtc *nv_crtc, bool update) | |||
20 | static void | 20 | static void |
21 | nv04_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y) | 21 | nv04_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y) |
22 | { | 22 | { |
23 | nv_crtc->cursor_saved_x = x; nv_crtc->cursor_saved_y = y; | ||
23 | NVWriteRAMDAC(nv_crtc->base.dev, nv_crtc->index, | 24 | NVWriteRAMDAC(nv_crtc->base.dev, nv_crtc->index, |
24 | NV_PRAMDAC_CU_START_POS, | 25 | NV_PRAMDAC_CU_START_POS, |
25 | XLATE(y, 0, NV_PRAMDAC_CU_START_POS_Y) | | 26 | XLATE(y, 0, NV_PRAMDAC_CU_START_POS_Y) | |
diff --git a/drivers/gpu/drm/nouveau/nv50_cursor.c b/drivers/gpu/drm/nouveau/nv50_cursor.c index 753e723adb3a..03ad7ab14f09 100644 --- a/drivers/gpu/drm/nouveau/nv50_cursor.c +++ b/drivers/gpu/drm/nouveau/nv50_cursor.c | |||
@@ -107,6 +107,7 @@ nv50_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y) | |||
107 | { | 107 | { |
108 | struct drm_device *dev = nv_crtc->base.dev; | 108 | struct drm_device *dev = nv_crtc->base.dev; |
109 | 109 | ||
110 | nv_crtc->cursor_saved_x = x; nv_crtc->cursor_saved_y = y; | ||
110 | nv_wr32(dev, NV50_PDISPLAY_CURSOR_USER_POS(nv_crtc->index), | 111 | nv_wr32(dev, NV50_PDISPLAY_CURSOR_USER_POS(nv_crtc->index), |
111 | ((y & 0xFFFF) << 16) | (x & 0xFFFF)); | 112 | ((y & 0xFFFF) << 16) | (x & 0xFFFF)); |
112 | /* Needed to make the cursor move. */ | 113 | /* Needed to make the cursor move. */ |
diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c index b11eaf9c5c7c..812778db76ac 100644 --- a/drivers/gpu/drm/nouveau/nv50_sor.c +++ b/drivers/gpu/drm/nouveau/nv50_sor.c | |||
@@ -274,7 +274,6 @@ static const struct drm_encoder_funcs nv50_sor_encoder_funcs = { | |||
274 | int | 274 | int |
275 | nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry) | 275 | nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry) |
276 | { | 276 | { |
277 | struct drm_nouveau_private *dev_priv = dev->dev_private; | ||
278 | struct nouveau_encoder *nv_encoder = NULL; | 277 | struct nouveau_encoder *nv_encoder = NULL; |
279 | struct drm_encoder *encoder; | 278 | struct drm_encoder *encoder; |
280 | bool dum; | 279 | bool dum; |
@@ -324,11 +323,7 @@ nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry) | |||
324 | int or = nv_encoder->or, link = !(entry->dpconf.sor.link & 1); | 323 | int or = nv_encoder->or, link = !(entry->dpconf.sor.link & 1); |
325 | uint32_t tmp; | 324 | uint32_t tmp; |
326 | 325 | ||
327 | if (dev_priv->chipset < 0x90 || | 326 | tmp = nv_rd32(dev, 0x61c700 + (or * 0x800)); |
328 | dev_priv->chipset == 0x92 || dev_priv->chipset == 0xa0) | ||
329 | tmp = nv_rd32(dev, NV50_PDISPLAY_SOR_MODE_CTRL_C(or)); | ||
330 | else | ||
331 | tmp = nv_rd32(dev, NV90_PDISPLAY_SOR_MODE_CTRL_C(or)); | ||
332 | 327 | ||
333 | switch ((tmp & 0x00000f00) >> 8) { | 328 | switch ((tmp & 0x00000f00) >> 8) { |
334 | case 8: | 329 | case 8: |