2 files changed, 7 insertions, 0 deletions

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d11a9ea5884d..c913ca5c3b39 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4906,6 +4906,9 @@
 #define GEN7_UCGCTL4                            0x940c
 #define  GEN7_L3BANK2X_CLOCK_GATE_DISABLE       (1<<25)
 
+#define GEN8_UCGCTL6                            0x9430
+#define   GEN8_SDEUNIT_CLOCK_GATE_DISABLE       (1<<14)
+
 #define GEN6_RPNSWREQ                           0xA008
 #define   GEN6_TURBO_DISABLE                    (1<<31)
 #define   GEN6_FREQUENCY(x)                     ((x)<<25)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 739eabc814e9..5819f5c92554 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4870,6 +4870,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
 
         I915_WRITE(GEN6_RC_SLEEP_PSMI_CONTROL,
                    _MASKED_BIT_ENABLE(GEN8_RC_SEMA_IDLE_MSG_DISABLE));
+
+        /* WaDisableSDEUnitClockGating:bdw */
+        I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
+                   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
 }
 
 static void haswell_init_clock_gating(struct drm_device *dev)