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-rw-r--r--drivers/gpu/drm/i915/i915_drv.h2
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c28
-rw-r--r--drivers/gpu/drm/i915/intel_display.c6
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h2
4 files changed, 18 insertions, 20 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index eb3f1f756e81..42d3e901619d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1133,7 +1133,7 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
1133int i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, 1133int i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj,
1134 int write); 1134 int write);
1135int i915_gem_object_set_to_display_plane(struct drm_i915_gem_object *obj, 1135int i915_gem_object_set_to_display_plane(struct drm_i915_gem_object *obj,
1136 bool pipelined); 1136 struct intel_ring_buffer *pipelined);
1137int i915_gem_attach_phys_object(struct drm_device *dev, 1137int i915_gem_attach_phys_object(struct drm_device *dev,
1138 struct drm_i915_gem_object *obj, 1138 struct drm_i915_gem_object *obj,
1139 int id, 1139 int id,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 7d6ce34789ca..465e07abf5d0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -42,11 +42,11 @@ struct change_domains {
42}; 42};
43 43
44static int i915_gem_object_flush_gpu_write_domain(struct drm_i915_gem_object *obj, 44static int i915_gem_object_flush_gpu_write_domain(struct drm_i915_gem_object *obj,
45 bool pipelined); 45 struct intel_ring_buffer *pipelined);
46static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj); 46static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj);
47static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj); 47static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj);
48static int i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, 48static int i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj,
49 int write); 49 bool write);
50static int i915_gem_object_set_cpu_read_domain_range(struct drm_i915_gem_object *obj, 50static int i915_gem_object_set_cpu_read_domain_range(struct drm_i915_gem_object *obj,
51 uint64_t offset, 51 uint64_t offset,
52 uint64_t size); 52 uint64_t size);
@@ -1274,12 +1274,10 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
1274 mutex_lock(&dev->struct_mutex); 1274 mutex_lock(&dev->struct_mutex);
1275 BUG_ON(obj->pin_count && !obj->pin_mappable); 1275 BUG_ON(obj->pin_count && !obj->pin_mappable);
1276 1276
1277 if (obj->gtt_space) { 1277 if (!obj->map_and_fenceable) {
1278 if (!obj->map_and_fenceable) { 1278 ret = i915_gem_object_unbind(obj);
1279 ret = i915_gem_object_unbind(obj); 1279 if (ret)
1280 if (ret) 1280 goto unlock;
1281 goto unlock;
1282 }
1283 } 1281 }
1284 1282
1285 if (!obj->gtt_space) { 1283 if (!obj->gtt_space) {
@@ -2637,7 +2635,7 @@ i915_gem_object_put_fence_reg(struct drm_i915_gem_object *obj,
2637 if (reg->gpu) { 2635 if (reg->gpu) {
2638 int ret; 2636 int ret;
2639 2637
2640 ret = i915_gem_object_flush_gpu_write_domain(obj, true); 2638 ret = i915_gem_object_flush_gpu_write_domain(obj, NULL);
2641 if (ret) 2639 if (ret)
2642 return ret; 2640 return ret;
2643 2641
@@ -2817,7 +2815,7 @@ i915_gem_clflush_object(struct drm_i915_gem_object *obj)
2817/** Flushes any GPU write domain for the object if it's dirty. */ 2815/** Flushes any GPU write domain for the object if it's dirty. */
2818static int 2816static int
2819i915_gem_object_flush_gpu_write_domain(struct drm_i915_gem_object *obj, 2817i915_gem_object_flush_gpu_write_domain(struct drm_i915_gem_object *obj,
2820 bool pipelined) 2818 struct intel_ring_buffer *pipelined)
2821{ 2819{
2822 struct drm_device *dev = obj->base.dev; 2820 struct drm_device *dev = obj->base.dev;
2823 2821
@@ -2828,7 +2826,7 @@ i915_gem_object_flush_gpu_write_domain(struct drm_i915_gem_object *obj,
2828 i915_gem_flush_ring(dev, obj->ring, 0, obj->base.write_domain); 2826 i915_gem_flush_ring(dev, obj->ring, 0, obj->base.write_domain);
2829 BUG_ON(obj->base.write_domain); 2827 BUG_ON(obj->base.write_domain);
2830 2828
2831 if (pipelined) 2829 if (pipelined && pipelined == obj->ring)
2832 return 0; 2830 return 0;
2833 2831
2834 return i915_gem_object_wait_rendering(obj, true); 2832 return i915_gem_object_wait_rendering(obj, true);
@@ -2892,7 +2890,7 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, int write)
2892 if (obj->gtt_space == NULL) 2890 if (obj->gtt_space == NULL)
2893 return -EINVAL; 2891 return -EINVAL;
2894 2892
2895 ret = i915_gem_object_flush_gpu_write_domain(obj, false); 2893 ret = i915_gem_object_flush_gpu_write_domain(obj, NULL);
2896 if (ret != 0) 2894 if (ret != 0)
2897 return ret; 2895 return ret;
2898 2896
@@ -2931,7 +2929,7 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, int write)
2931 */ 2929 */
2932int 2930int
2933i915_gem_object_set_to_display_plane(struct drm_i915_gem_object *obj, 2931i915_gem_object_set_to_display_plane(struct drm_i915_gem_object *obj,
2934 bool pipelined) 2932 struct intel_ring_buffer *pipelined)
2935{ 2933{
2936 uint32_t old_read_domains; 2934 uint32_t old_read_domains;
2937 int ret; 2935 int ret;
@@ -2940,7 +2938,7 @@ i915_gem_object_set_to_display_plane(struct drm_i915_gem_object *obj,
2940 if (obj->gtt_space == NULL) 2938 if (obj->gtt_space == NULL)
2941 return -EINVAL; 2939 return -EINVAL;
2942 2940
2943 ret = i915_gem_object_flush_gpu_write_domain(obj, true); 2941 ret = i915_gem_object_flush_gpu_write_domain(obj, pipelined);
2944 if (ret) 2942 if (ret)
2945 return ret; 2943 return ret;
2946 2944
@@ -2984,7 +2982,7 @@ i915_gem_object_flush_gpu(struct drm_i915_gem_object *obj,
2984 * flushes to occur. 2982 * flushes to occur.
2985 */ 2983 */
2986static int 2984static int
2987i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, int write) 2985i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write)
2988{ 2986{
2989 uint32_t old_write_domain, old_read_domains; 2987 uint32_t old_write_domain, old_read_domains;
2990 int ret; 2988 int ret;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ae7d4f55ce07..c2c94a26f92e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1434,7 +1434,7 @@ out_disable:
1434int 1434int
1435intel_pin_and_fence_fb_obj(struct drm_device *dev, 1435intel_pin_and_fence_fb_obj(struct drm_device *dev,
1436 struct drm_i915_gem_object *obj, 1436 struct drm_i915_gem_object *obj,
1437 bool pipelined) 1437 struct intel_ring_buffer *pipelined)
1438{ 1438{
1439 u32 alignment; 1439 u32 alignment;
1440 int ret; 1440 int ret;
@@ -1594,7 +1594,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
1594 mutex_lock(&dev->struct_mutex); 1594 mutex_lock(&dev->struct_mutex);
1595 ret = intel_pin_and_fence_fb_obj(dev, 1595 ret = intel_pin_and_fence_fb_obj(dev,
1596 to_intel_framebuffer(crtc->fb)->obj, 1596 to_intel_framebuffer(crtc->fb)->obj,
1597 false); 1597 NULL);
1598 if (ret != 0) { 1598 if (ret != 0) {
1599 mutex_unlock(&dev->struct_mutex); 1599 mutex_unlock(&dev->struct_mutex);
1600 return ret; 1600 return ret;
@@ -5092,7 +5092,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
5092 obj = intel_fb->obj; 5092 obj = intel_fb->obj;
5093 5093
5094 mutex_lock(&dev->struct_mutex); 5094 mutex_lock(&dev->struct_mutex);
5095 ret = intel_pin_and_fence_fb_obj(dev, obj, true); 5095 ret = intel_pin_and_fence_fb_obj(dev, obj, &dev_priv->render_ring);
5096 if (ret) 5096 if (ret)
5097 goto cleanup_work; 5097 goto cleanup_work;
5098 5098
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 5a4f14e36d6c..5154e315300d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -301,7 +301,7 @@ extern void intel_init_emon(struct drm_device *dev);
301 301
302extern int intel_pin_and_fence_fb_obj(struct drm_device *dev, 302extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
303 struct drm_i915_gem_object *obj, 303 struct drm_i915_gem_object *obj,
304 bool pipelined); 304 struct intel_ring_buffer *pipelined);
305 305
306extern int intel_framebuffer_init(struct drm_device *dev, 306extern int intel_framebuffer_init(struct drm_device *dev,
307 struct intel_framebuffer *ifb, 307 struct intel_framebuffer *ifb,