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-rw-r--r--drivers/gpu/drm/i915/i915_gem.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f3758f9fc979..30ea4b6b0219 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2511,16 +2511,6 @@ i915_gem_clflush_object(struct drm_gem_object *obj)
2511 if (obj_priv->pages == NULL) 2511 if (obj_priv->pages == NULL)
2512 return; 2512 return;
2513 2513
2514 /* XXX: The 865 in particular appears to be weird in how it handles
2515 * cache flushing. We haven't figured it out, but the
2516 * clflush+agp_chipset_flush doesn't appear to successfully get the
2517 * data visible to the PGU, while wbinvd + agp_chipset_flush does.
2518 */
2519 if (IS_I865G(obj->dev)) {
2520 wbinvd();
2521 return;
2522 }
2523
2524 drm_clflush_pages(obj_priv->pages, obj->size / PAGE_SIZE); 2514 drm_clflush_pages(obj_priv->pages, obj->size / PAGE_SIZE);
2525} 2515}
2526 2516