3 files changed, 14 insertions, 3 deletions

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 80ed75117b6d..8f63cd5de4b4 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -141,7 +141,7 @@ void i915_kernel_lost_context(struct drm_device * dev)
 
         ring->head = I915_READ_HEAD(ring) & HEAD_ADDR;
         ring->tail = I915_READ_TAIL(ring) & TAIL_ADDR;
-        ring->space = ring->head - (ring->tail + 8);
+        ring->space = ring->head - (ring->tail + I915_RING_FREE_SPACE);
         if (ring->space < 0)
                 ring->space += ring->size;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index bc7cf7c63108..2346b920bd86 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -45,7 +45,7 @@ struct pipe_control {
 
 static inline int ring_space(struct intel_ring_buffer *ring)
 {
-        int space = (ring->head & HEAD_ADDR) - (ring->tail + 8);
+        int space = (ring->head & HEAD_ADDR) - (ring->tail + I915_RING_FREE_SPACE);
         if (space < 0)
                 space += ring->size;
         return space;
@@ -1227,7 +1227,7 @@ static int intel_ring_wait_request(struct intel_ring_buffer *ring, int n)
                 if (request->tail == -1)
                         continue;
 
-                space = request->tail - (ring->tail + 8);
+                space = request->tail - (ring->tail + I915_RING_FREE_SPACE);
                 if (space < 0)
                         space += ring->size;
                 if (space >= n) {
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index d4b7416fa1b0..526182ed0c6d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -1,6 +1,17 @@
 #ifndef _INTEL_RINGBUFFER_H_
 #define _INTEL_RINGBUFFER_H_
 
+/*
+ * Gen2 BSpec "1. Programming Environment" / 1.4.4.6 "Ring Buffer Use"
+ * Gen3 BSpec "vol1c Memory Interface Functions" / 2.3.4.5 "Ring Buffer Use"
+ * Gen4+ BSpec "vol1c Memory Interface and Command Stream" / 5.3.4.5 "Ring Buffer Use"
+ *
+ * "If the Ring Buffer Head Pointer and the Tail Pointer are on the same
+ * cacheline, the Head Pointer must not be greater than the Tail
+ * Pointer."
+ */
+#define I915_RING_FREE_SPACE 64
+
 struct  intel_hw_status_page {
         u32             *page_addr;
         unsigned int    gfx_addr;