32 files changed, 378 insertions, 176 deletions

diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
index 3e257a50bf56..61e1ef90d4e5 100644
--- a/drivers/gpu/drm/drm_bufs.c
+++ b/drivers/gpu/drm/drm_bufs.c
@@ -46,10 +46,11 @@ static struct drm_map_list *drm_find_matching_map(struct drm_device *dev,
         list_for_each_entry(entry, &dev->maplist, head) {
                 /*
                  * Because the kernel-userspace ABI is fixed at a 32-bit offset
-                 * while PCI resources may live above that, we ignore the map
-                 * offset for maps of type _DRM_FRAMEBUFFER or _DRM_REGISTERS.
-                 * It is assumed that each driver will have only one resource of
-                 * each type.
+                 * while PCI resources may live above that, we only compare the
+                 * lower 32 bits of the map offset for maps of type
+                 * _DRM_FRAMEBUFFER or _DRM_REGISTERS.
+                 * It is assumed that if a driver have more than one resource
+                 * of each type, the lower 32 bits are different.
                  */
                 if (!entry->map ||
                     map->type != entry->map->type ||
@@ -59,9 +60,12 @@ static struct drm_map_list *drm_find_matching_map(struct drm_device *dev,
                 case _DRM_SHM:
                         if (map->flags != _DRM_CONTAINS_LOCK)
                                 break;
+                        return entry;
                 case _DRM_REGISTERS:
                 case _DRM_FRAME_BUFFER:
-                        return entry;
+                        if ((entry->map->offset & 0xffffffff) ==
+                            (map->offset & 0xffffffff))
+                                return entry;
                 default: /* Make gcc happy */
                         ;
                 }
@@ -183,9 +187,6 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset,
                         return -EINVAL;
                 }
 #endif
-#ifdef __alpha__
-                map->offset += dev->hose->mem_space->start;
-#endif
                 /* Some drivers preinitialize some maps, without the X Server
                  * needing to be aware of it.  Therefore, we just return success
                  * when the server tries to create a duplicate map.
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 872747c5a544..21058e6ad2b8 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1113,7 +1113,7 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
         if (card_res->count_fbs >= fb_count) {
                 copied = 0;
                 fb_id = (uint32_t __user *)(unsigned long)card_res->fb_id_ptr;
-                list_for_each_entry(fb, &file_priv->fbs, head) {
+                list_for_each_entry(fb, &file_priv->fbs, filp_head) {
                         if (put_user(fb->base.id, fb_id + copied)) {
                                 ret = -EFAULT;
                                 goto out;
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 0a9357c66ff8..09292193dafe 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -184,9 +184,9 @@ drm_edid_block_valid(u8 *raw_edid)
 
 bad:
         if (raw_edid) {
-                DRM_ERROR("Raw EDID:\n");
+                printk(KERN_ERR "Raw EDID:\n");
                 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
-                printk("\n");
+                printk(KERN_ERR "\n");
         }
         return 0;
 }
@@ -258,6 +258,17 @@ drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
         return ret == 2 ? 0 : -1;
 }
 
+static bool drm_edid_is_zero(u8 *in_edid, int length)
+{
+        int i;
+        u32 *raw_edid = (u32 *)in_edid;
+
+        for (i = 0; i < length / 4; i++)
+                if (*(raw_edid + i) != 0)
+                        return false;
+        return true;
+}
+
 static u8 *
 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
 {
@@ -273,6 +284,10 @@ drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
                         goto out;
                 if (drm_edid_block_valid(block))
                         break;
+                if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
+                        connector->null_edid_counter++;
+                        goto carp;
+                }
         }
         if (i == 4)
                 goto carp;
diff --git a/drivers/gpu/drm/drm_ioc32.c b/drivers/gpu/drm/drm_ioc32.c
index d61d185cf040..4a058c7af6c0 100644
--- a/drivers/gpu/drm/drm_ioc32.c
+++ b/drivers/gpu/drm/drm_ioc32.c
@@ -28,6 +28,7 @@
  * IN THE SOFTWARE.
  */
 #include <linux/compat.h>
+#include <linux/ratelimit.h>
 
 #include "drmP.h"
 #include "drm_core.h"
@@ -253,10 +254,10 @@ static int compat_drm_addmap(struct file *file, unsigned int cmd,
                 return -EFAULT;
 
         m32.handle = (unsigned long)handle;
-        if (m32.handle != (unsigned long)handle && printk_ratelimit())
-                printk(KERN_ERR "compat_drm_addmap truncated handle"
-                       " %p for type %d offset %x\n",
-                       handle, m32.type, m32.offset);
+        if (m32.handle != (unsigned long)handle)
+                printk_ratelimited(KERN_ERR "compat_drm_addmap truncated handle"
+                                   " %p for type %d offset %x\n",
+                                   handle, m32.type, m32.offset);
 
         if (copy_to_user(argp, &m32, sizeof(m32)))
                 return -EFAULT;
diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
index e1aee4f6a7c6..b6a19cb07caf 100644
--- a/drivers/gpu/drm/drm_pci.c
+++ b/drivers/gpu/drm/drm_pci.c
@@ -251,7 +251,7 @@ err:
 }
 
 
-int drm_pci_irq_by_busid(struct drm_device *dev, struct drm_irq_busid *p)
+static int drm_pci_irq_by_busid(struct drm_device *dev, struct drm_irq_busid *p)
 {
         if ((p->busnum >> 8) != drm_get_pci_domain(dev) ||
             (p->busnum & 0xff) != dev->pdev->bus->number ||
@@ -292,6 +292,7 @@ static struct drm_bus drm_pci_bus = {
         .get_name = drm_pci_get_name,
         .set_busid = drm_pci_set_busid,
         .set_unique = drm_pci_set_unique,
+        .irq_by_busid = drm_pci_irq_by_busid,
         .agp_init = drm_pci_agp_init,
 };
 
diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c
index 2c3fcbdfd8ff..5db96d45fc71 100644
--- a/drivers/gpu/drm/drm_vm.c
+++ b/drivers/gpu/drm/drm_vm.c
@@ -526,7 +526,7 @@ static int drm_mmap_dma(struct file *filp, struct vm_area_struct *vma)
 static resource_size_t drm_core_get_reg_ofs(struct drm_device *dev)
 {
 #ifdef __alpha__
-        return dev->hose->dense_mem_base - dev->hose->mem_space->start;
+        return dev->hose->dense_mem_base;
 #else
         return 0;
 #endif
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 12d32579b951..94c84d744100 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -465,8 +465,10 @@ i915_gem_shmem_pread_slow(struct drm_device *dev,
 
                 page = read_cache_page_gfp(mapping, offset >> PAGE_SHIFT,
                                            GFP_HIGHUSER | __GFP_RECLAIMABLE);
-                if (IS_ERR(page))
-                        return PTR_ERR(page);
+                if (IS_ERR(page)) {
+                        ret = PTR_ERR(page);
+                        goto out;
+                }
 
                 if (do_bit17_swizzling) {
                         slow_shmem_bit17_copy(page,
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b9fafe3b045b..9e34a1abeb61 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1740,6 +1740,16 @@ void ironlake_irq_preinstall(struct drm_device *dev)
                 INIT_WORK(&dev_priv->rps_work, gen6_pm_rps_work);
 
         I915_WRITE(HWSTAM, 0xeffe);
+        if (IS_GEN6(dev)) {
+                /* Workaround stalls observed on Sandy Bridge GPUs by
+                 * making the blitter command streamer generate a
+                 * write to the Hardware Status Page for
+                 * MI_USER_INTERRUPT.  This appears to serialize the
+                 * previous seqno write out before the interrupt
+                 * happens.
+                 */
+                I915_WRITE(GEN6_BLITTER_HWSTAM, ~GEN6_BLITTER_USER_INTERRUPT);
+        }
 
         /* XXX hotplug from PCH */
 
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index d3b903bce7c5..d98cee60b602 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -401,8 +401,7 @@ int intel_setup_gmbus(struct drm_device *dev)
                 bus->reg0 = i | GMBUS_RATE_100KHZ;
 
                 /* XXX force bit banging until GMBUS is fully debugged */
-                if (IS_GEN2(dev))
-                        bus->force_bit = intel_gpio_create(dev_priv, i);
+                bus->force_bit = intel_gpio_create(dev_priv, i);
         }
 
         intel_i2c_reset(dev_priv->dev);
diff --git a/drivers/gpu/drm/mga/mga_drv.h b/drivers/gpu/drm/mga/mga_drv.h
index 1084fa4d261b..54558a01969a 100644
--- a/drivers/gpu/drm/mga/mga_drv.h
+++ b/drivers/gpu/drm/mga/mga_drv.h
@@ -195,29 +195,10 @@ extern long mga_compat_ioctl(struct file *filp, unsigned int cmd,
 
 #define mga_flush_write_combine()       DRM_WRITEMEMORYBARRIER()
 
-#if defined(__linux__) && defined(__alpha__)
-#define MGA_BASE(reg)           ((unsigned long)(dev_priv->mmio->handle))
-#define MGA_ADDR(reg)           (MGA_BASE(reg) + reg)
-
-#define MGA_DEREF(reg)          (*(volatile u32 *)MGA_ADDR(reg))
-#define MGA_DEREF8(reg)         (*(volatile u8 *)MGA_ADDR(reg))
-
-#define MGA_READ(reg)           (_MGA_READ((u32 *)MGA_ADDR(reg)))
-#define MGA_READ8(reg)          (_MGA_READ((u8 *)MGA_ADDR(reg)))
-#define MGA_WRITE(reg, val)     do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF(reg) = val; } while (0)
-#define MGA_WRITE8(reg, val)    do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8(reg) = val; } while (0)
-
-static inline u32 _MGA_READ(u32 *addr)
-{
-        DRM_MEMORYBARRIER();
-        return *(volatile u32 *)addr;
-}
-#else
 #define MGA_READ8(reg)          DRM_READ8(dev_priv->mmio, (reg))
 #define MGA_READ(reg)           DRM_READ32(dev_priv->mmio, (reg))
 #define MGA_WRITE8(reg, val)    DRM_WRITE8(dev_priv->mmio, (reg), (val))
 #define MGA_WRITE(reg, val)     DRM_WRITE32(dev_priv->mmio, (reg), (val))
-#endif
 
 #define DWGREG0         0x1c00
 #define DWGREG0_END     0x1dff
diff --git a/drivers/gpu/drm/nouveau/nouveau_acpi.c b/drivers/gpu/drm/nouveau/nouveau_acpi.c
index f0d459bb46e4..525744d593c1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_acpi.c
+++ b/drivers/gpu/drm/nouveau/nouveau_acpi.c
@@ -262,7 +262,6 @@ static bool nouveau_dsm_detect(void)
                 vga_count++;
 
                 retval = nouveau_dsm_pci_probe(pdev);
-                printk("ret val is %d\n", retval);
                 if (retval & NOUVEAU_DSM_HAS_MUX)
                         has_dsm |= 1;
                 if (retval & NOUVEAU_DSM_HAS_OPT)
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index 4b9f4493c9f9..7347075ca5b8 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -339,11 +339,12 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
         int ret;
 
         if (dev_priv->chipset < 0x84) {
-                ret = RING_SPACE(chan, 3);
+                ret = RING_SPACE(chan, 4);
                 if (ret)
                         return ret;
 
-                BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_OFFSET, 2);
+                BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 3);
+                OUT_RING  (chan, NvSema);
                 OUT_RING  (chan, sema->mem->start);
                 OUT_RING  (chan, 1);
         } else
@@ -351,10 +352,12 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
                 struct nouveau_vma *vma = &dev_priv->fence.bo->vma;
                 u64 offset = vma->offset + sema->mem->start;
 
-                ret = RING_SPACE(chan, 5);
+                ret = RING_SPACE(chan, 7);
                 if (ret)
                         return ret;
 
+                BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
+                OUT_RING  (chan, chan->vram_handle);
                 BEGIN_RING(chan, NvSubSw, 0x0010, 4);
                 OUT_RING  (chan, upper_32_bits(offset));
                 OUT_RING  (chan, lower_32_bits(offset));
@@ -394,11 +397,12 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
         int ret;
 
         if (dev_priv->chipset < 0x84) {
-                ret = RING_SPACE(chan, 4);
+                ret = RING_SPACE(chan, 5);
                 if (ret)
                         return ret;
 
-                BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_OFFSET, 1);
+                BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 2);
+                OUT_RING  (chan, NvSema);
                 OUT_RING  (chan, sema->mem->start);
                 BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_RELEASE, 1);
                 OUT_RING  (chan, 1);
@@ -407,10 +411,12 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema)
                 struct nouveau_vma *vma = &dev_priv->fence.bo->vma;
                 u64 offset = vma->offset + sema->mem->start;
 
-                ret = RING_SPACE(chan, 5);
+                ret = RING_SPACE(chan, 7);
                 if (ret)
                         return ret;
 
+                BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
+                OUT_RING  (chan, chan->vram_handle);
                 BEGIN_RING(chan, NvSubSw, 0x0010, 4);
                 OUT_RING  (chan, upper_32_bits(offset));
                 OUT_RING  (chan, lower_32_bits(offset));
@@ -504,22 +510,22 @@ nouveau_fence_channel_init(struct nouveau_channel *chan)
         struct nouveau_gpuobj *obj = NULL;
         int ret;
 
-        if (dev_priv->card_type >= NV_C0)
-                goto out_initialised;
+        if (dev_priv->card_type < NV_C0) {
+                /* Create an NV_SW object for various sync purposes */
+                ret = nouveau_gpuobj_gr_new(chan, NvSw, NV_SW);
+                if (ret)
+                        return ret;
 
-        /* Create an NV_SW object for various sync purposes */
-        ret = nouveau_gpuobj_gr_new(chan, NvSw, NV_SW);
-        if (ret)
-                return ret;
+                ret = RING_SPACE(chan, 2);
+                if (ret)
+                        return ret;
 
-        /* we leave subchannel empty for nvc0 */
-        ret = RING_SPACE(chan, 2);
-        if (ret)
-                return ret;
-        BEGIN_RING(chan, NvSubSw, 0, 1);
-        OUT_RING(chan, NvSw);
+                BEGIN_RING(chan, NvSubSw, 0, 1);
+                OUT_RING  (chan, NvSw);
+                FIRE_RING (chan);
+        }
 
-        /* Create a DMA object for the shared cross-channel sync area. */
+        /* Setup area of memory shared between all channels for x-chan sync */
         if (USE_SEMA(dev) && dev_priv->chipset < 0x84) {
                 struct ttm_mem_reg *mem = &dev_priv->fence.bo->bo.mem;
 
@@ -534,23 +540,8 @@ nouveau_fence_channel_init(struct nouveau_channel *chan)
                 nouveau_gpuobj_ref(NULL, &obj);
                 if (ret)
                         return ret;
-
-                ret = RING_SPACE(chan, 2);
-                if (ret)
-                        return ret;
-                BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
-                OUT_RING(chan, NvSema);
-        } else {
-                ret = RING_SPACE(chan, 2);
-                if (ret)
-                        return ret;
-                BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 1);
-                OUT_RING  (chan, chan->vram_handle); /* whole VM */
         }
 
-        FIRE_RING(chan);
-
-out_initialised:
         INIT_LIST_HEAD(&chan->fence.pending);
         spin_lock_init(&chan->fence.lock);
         atomic_set(&chan->fence.last_sequence_irq, 0);
diff --git a/drivers/gpu/drm/nouveau/nouveau_perf.c b/drivers/gpu/drm/nouveau/nouveau_perf.c
index 922fb6b664ed..ef9dec0e6f8b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_perf.c
+++ b/drivers/gpu/drm/nouveau/nouveau_perf.c
@@ -182,6 +182,11 @@ nouveau_perf_init(struct drm_device *dev)
                 entries   = perf[2];
         }
 
+        if (entries > NOUVEAU_PM_MAX_LEVEL) {
+                NV_DEBUG(dev, "perf table has too many entries - buggy vbios?\n");
+                entries = NOUVEAU_PM_MAX_LEVEL;
+        }
+
         entry = perf + headerlen;
         for (i = 0; i < entries; i++) {
                 struct nouveau_pm_level *perflvl = &pm->perflvl[pm->nr_perflvl];
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 80218887e0a0..144f79a350ae 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -881,8 +881,8 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
 
 #ifdef __BIG_ENDIAN
         /* Put the card in BE mode if it's not */
-        if (nv_rd32(dev, NV03_PMC_BOOT_1))
-                nv_wr32(dev, NV03_PMC_BOOT_1, 0x00000001);
+        if (nv_rd32(dev, NV03_PMC_BOOT_1) != 0x01000001)
+                nv_wr32(dev, NV03_PMC_BOOT_1, 0x01000001);
 
         DRM_MEMORYBARRIER();
 #endif
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 74a3f6872701..08da478ba544 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -409,7 +409,7 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,
         struct nouveau_channel *evo = dispc->sync;
         int ret;
 
-        ret = RING_SPACE(evo, 24);
+        ret = RING_SPACE(evo, chan ? 25 : 27);
         if (unlikely(ret))
                 return ret;
 
@@ -458,8 +458,19 @@ nv50_display_flip_next(struct drm_crtc *crtc, struct drm_framebuffer *fb,
         /* queue the flip on the crtc's "display sync" channel */
         BEGIN_RING(evo, 0, 0x0100, 1);
         OUT_RING  (evo, 0xfffe0000);
-        BEGIN_RING(evo, 0, 0x0084, 5);
-        OUT_RING  (evo, chan ? 0x00000100 : 0x00000010);
+        if (chan) {
+                BEGIN_RING(evo, 0, 0x0084, 1);
+                OUT_RING  (evo, 0x00000100);
+        } else {
+                BEGIN_RING(evo, 0, 0x0084, 1);
+                OUT_RING  (evo, 0x00000010);
+                /* allows gamma somehow, PDISP will bitch at you if
+                 * you don't wait for vblank before changing this..
+                 */
+                BEGIN_RING(evo, 0, 0x00e0, 1);
+                OUT_RING  (evo, 0x40000000);
+        }
+        BEGIN_RING(evo, 0, 0x0088, 4);
         OUT_RING  (evo, dispc->sem.offset);
         OUT_RING  (evo, 0xf00d0000 | dispc->sem.value);
         OUT_RING  (evo, 0x74b1e000);
diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h
index 49611e2365d9..1b50ad8919d5 100644
--- a/drivers/gpu/drm/radeon/atombios.h
+++ b/drivers/gpu/drm/radeon/atombios.h
@@ -1200,6 +1200,7 @@ typedef struct _EXTERNAL_ENCODER_CONTROL_PARAMETERS_V3
 #define EXTERNAL_ENCODER_ACTION_V3_ENCODER_BLANKING_OFF   0x10
 #define EXTERNAL_ENCODER_ACTION_V3_ENCODER_BLANKING       0x11
 #define EXTERNAL_ENCODER_ACTION_V3_DACLOAD_DETECTION      0x12
+#define EXTERNAL_ENCODER_ACTION_V3_DDC_SETUP              0x14
 
 // ucConfig
 #define EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_MASK                              0x03
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 84a69e7fa11e..9541995e4b21 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -671,6 +671,13 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
                                                                 DISPPLL_CONFIG_DUAL_LINK;
                                         }
                                 }
+                                if (radeon_encoder_is_dp_bridge(encoder)) {
+                                        struct drm_encoder *ext_encoder = radeon_atom_get_external_encoder(encoder);
+                                        struct radeon_encoder *ext_radeon_encoder = to_radeon_encoder(ext_encoder);
+                                        args.v3.sInput.ucExtTransmitterID = ext_radeon_encoder->encoder_id;
+                                } else
+                                        args.v3.sInput.ucExtTransmitterID = 0;
+
                                 atom_execute_table(rdev->mode_info.atom_context,
                                                    index, (uint32_t *)&args);
                                 adjusted_clock = le32_to_cpu(args.v3.sOutput.ulDispPllFreq) * 10;
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 98ea597bc76d..445af7981637 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -88,7 +88,8 @@ u32 evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base)
 /* get temperature in millidegrees */
 int evergreen_get_temp(struct radeon_device *rdev)
 {
-        u32 temp, toffset, actual_temp = 0;
+        u32 temp, toffset;
+        int actual_temp = 0;
 
         if (rdev->family == CHIP_JUNIPER) {
                 toffset = (RREG32(CG_THERMAL_CTRL) & TOFFSET_MASK) >>
@@ -139,11 +140,17 @@ void evergreen_pm_misc(struct radeon_device *rdev)
         struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage;
 
         if (voltage->type == VOLTAGE_SW) {
+                /* 0xff01 is a flag rather then an actual voltage */
+                if (voltage->voltage == 0xff01)
+                        return;
                 if (voltage->voltage && (voltage->voltage != rdev->pm.current_vddc)) {
                         radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC);
                         rdev->pm.current_vddc = voltage->voltage;
                         DRM_DEBUG("Setting: vddc: %d\n", voltage->voltage);
                 }
+                /* 0xff01 is a flag rather then an actual voltage */
+                if (voltage->vddci == 0xff01)
+                        return;
                 if (voltage->vddci && (voltage->vddci != rdev->pm.current_vddci)) {
                         radeon_atom_set_voltage(rdev, voltage->vddci, SET_VOLTAGE_TYPE_ASIC_VDDCI);
                         rdev->pm.current_vddci = voltage->vddci;
@@ -2694,28 +2701,25 @@ static inline u32 evergreen_get_ih_wptr(struct radeon_device *rdev)
 
 int evergreen_irq_process(struct radeon_device *rdev)
 {
-        u32 wptr = evergreen_get_ih_wptr(rdev);
-        u32 rptr = rdev->ih.rptr;
+        u32 wptr;
+        u32 rptr;
         u32 src_id, src_data;
         u32 ring_index;
         unsigned long flags;
         bool queue_hotplug = false;
 
-        DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
-        if (!rdev->ih.enabled)
+        if (!rdev->ih.enabled || rdev->shutdown)
                 return IRQ_NONE;
 
-        spin_lock_irqsave(&rdev->ih.lock, flags);
+        wptr = evergreen_get_ih_wptr(rdev);
+        rptr = rdev->ih.rptr;
+        DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
 
+        spin_lock_irqsave(&rdev->ih.lock, flags);
         if (rptr == wptr) {
                 spin_unlock_irqrestore(&rdev->ih.lock, flags);
                 return IRQ_NONE;
         }
-        if (rdev->shutdown) {
-                spin_unlock_irqrestore(&rdev->ih.lock, flags);
-                return IRQ_NONE;
-        }
-
 restart_ih:
         /* display interrupts */
         evergreen_irq_ack(rdev);
@@ -2944,7 +2948,7 @@ restart_ih:
                         radeon_fence_process(rdev);
                         break;
                 case 233: /* GUI IDLE */
-                        DRM_DEBUG("IH: CP EOP\n");
+                        DRM_DEBUG("IH: GUI idle\n");
                         rdev->pm.gui_idle = true;
                         wake_up(&rdev->irq.idle_queue);
                         break;
diff --git a/drivers/gpu/drm/radeon/r100_track.h b/drivers/gpu/drm/radeon/r100_track.h
index 2fef9de7f363..686f9dc5d4bd 100644
--- a/drivers/gpu/drm/radeon/r100_track.h
+++ b/drivers/gpu/drm/radeon/r100_track.h
@@ -63,7 +63,7 @@ struct r100_cs_track {
         unsigned                        num_arrays;
         unsigned                        max_indx;
         unsigned                        color_channel_mask;
-        struct r100_cs_track_array      arrays[11];
+        struct r100_cs_track_array      arrays[16];
         struct r100_cs_track_cb         cb[R300_MAX_CB];
         struct r100_cs_track_cb         zb;
         struct r100_cs_track_cb         aa;
@@ -146,6 +146,12 @@ static inline int r100_packet3_load_vbpntr(struct radeon_cs_parser *p,
         ib = p->ib->ptr;
         track = (struct r100_cs_track *)p->track;
         c = radeon_get_ib_value(p, idx++) & 0x1F;
+        if (c > 16) {
+            DRM_ERROR("Only 16 vertex buffers are allowed %d\n",
+                      pkt->opcode);
+            r100_cs_dump_packet(p, pkt);
+            return -EINVAL;
+        }
         track->num_arrays = c;
         for (i = 0; i < (c - 1); i+=2, idx+=3) {
                 r = r100_cs_packet_next_reloc(p, &reloc);
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index d74d4d71437f..f79d2ccb6755 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -590,6 +590,9 @@ void r600_pm_misc(struct radeon_device *rdev)
         struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage;
 
         if ((voltage->type == VOLTAGE_SW) && voltage->voltage) {
+                /* 0xff01 is a flag rather then an actual voltage */
+                if (voltage->voltage == 0xff01)
+                        return;
                 if (voltage->voltage != rdev->pm.current_vddc) {
                         radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC);
                         rdev->pm.current_vddc = voltage->voltage;
@@ -3294,27 +3297,26 @@ static inline u32 r600_get_ih_wptr(struct radeon_device *rdev)
 
 int r600_irq_process(struct radeon_device *rdev)
 {
-        u32 wptr = r600_get_ih_wptr(rdev);
-        u32 rptr = rdev->ih.rptr;
+        u32 wptr;
+        u32 rptr;
         u32 src_id, src_data;
         u32 ring_index;
         unsigned long flags;
         bool queue_hotplug = false;
 
-        DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
-        if (!rdev->ih.enabled)
+        if (!rdev->ih.enabled || rdev->shutdown)
                 return IRQ_NONE;
 
+        wptr = r600_get_ih_wptr(rdev);
+        rptr = rdev->ih.rptr;
+        DRM_DEBUG("r600_irq_process start: rptr %d, wptr %d\n", rptr, wptr);
+
         spin_lock_irqsave(&rdev->ih.lock, flags);
 
         if (rptr == wptr) {
                 spin_unlock_irqrestore(&rdev->ih.lock, flags);
                 return IRQ_NONE;
         }
-        if (rdev->shutdown) {
-                spin_unlock_irqrestore(&rdev->ih.lock, flags);
-                return IRQ_NONE;
-        }
 
 restart_ih:
         /* display interrupts */
@@ -3444,7 +3446,7 @@ restart_ih:
                         radeon_fence_process(rdev);
                         break;
                 case 233: /* GUI IDLE */
-                        DRM_DEBUG("IH: CP EOP\n");
+                        DRM_DEBUG("IH: GUI idle\n");
                         rdev->pm.gui_idle = true;
                         wake_up(&rdev->irq.idle_queue);
                         break;
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index ba643b576054..27f45579e64b 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -165,6 +165,7 @@ struct radeon_clock {
         uint32_t default_sclk;
         uint32_t default_dispclk;
         uint32_t dp_extclk;
+        uint32_t max_pixel_clock;
 };
 
 /*
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 9bd162fc9b0c..b2449629537d 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -938,6 +938,13 @@ static struct radeon_asic cayman_asic = {
 int radeon_asic_init(struct radeon_device *rdev)
 {
         radeon_register_accessor_init(rdev);
+
+        /* set the number of crtcs */
+        if (rdev->flags & RADEON_SINGLE_CRTC)
+                rdev->num_crtc = 1;
+        else
+                rdev->num_crtc = 2;
+
         switch (rdev->family) {
         case CHIP_R100:
         case CHIP_RV100:
@@ -1017,6 +1024,11 @@ int radeon_asic_init(struct radeon_device *rdev)
         case CHIP_JUNIPER:
         case CHIP_CYPRESS:
         case CHIP_HEMLOCK:
+                /* set num crtcs */
+                if (rdev->family == CHIP_CEDAR)
+                        rdev->num_crtc = 4;
+                else
+                        rdev->num_crtc = 6;
                 rdev->asic = &evergreen_asic;
                 break;
         case CHIP_PALM:
@@ -1027,10 +1039,17 @@ int radeon_asic_init(struct radeon_device *rdev)
         case CHIP_BARTS:
         case CHIP_TURKS:
         case CHIP_CAICOS:
+                /* set num crtcs */
+                if (rdev->family == CHIP_CAICOS)
+                        rdev->num_crtc = 4;
+                else
+                        rdev->num_crtc = 6;
                 rdev->asic = &btc_asic;
                 break;
         case CHIP_CAYMAN:
                 rdev->asic = &cayman_asic;
+                /* set num crtcs */
+                rdev->num_crtc = 6;
                 break;
         default:
                 /* FIXME: not supported yet */
@@ -1042,18 +1061,6 @@ int radeon_asic_init(struct radeon_device *rdev)
                 rdev->asic->set_memory_clock = NULL;
         }
 
-        /* set the number of crtcs */
-        if (rdev->flags & RADEON_SINGLE_CRTC)
-                rdev->num_crtc = 1;
-        else {
-                if (ASIC_IS_DCE41(rdev))
-                        rdev->num_crtc = 2;
-                else if (ASIC_IS_DCE4(rdev))
-                        rdev->num_crtc = 6;
-                else
-                        rdev->num_crtc = 2;
-        }
-
         return 0;
 }
 
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 90dfb2b8cf03..1e725d9f767f 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -1246,6 +1246,10 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
                 }
                 *dcpll = *p1pll;
 
+                rdev->clock.max_pixel_clock = le16_to_cpu(firmware_info->info.usMaxPixelClock);
+                if (rdev->clock.max_pixel_clock == 0)
+                        rdev->clock.max_pixel_clock = 40000;
+
                 return true;
         }
 
@@ -2603,6 +2607,10 @@ void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 v
         if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
                 return;
 
+        /* 0xff01 is a flag rather then an actual voltage */
+        if (voltage_level == 0xff01)
+                return;
+
         switch (crev) {
         case 1:
                 args.v1.ucVoltageType = voltage_type;
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c
index 5249af8931e6..2d48e7a1474b 100644
--- a/drivers/gpu/drm/radeon/radeon_clocks.c
+++ b/drivers/gpu/drm/radeon/radeon_clocks.c
@@ -117,7 +117,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
         p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff;
         if (p1pll->reference_div < 2)
                 p1pll->reference_div = 12;
-        p2pll->reference_div = p1pll->reference_div;    
+        p2pll->reference_div = p1pll->reference_div;
 
         /* These aren't in the device-tree */
         if (rdev->family >= CHIP_R420) {
@@ -139,6 +139,8 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
                 p2pll->pll_out_min = 12500;
                 p2pll->pll_out_max = 35000;
         }
+        /* not sure what the max should be in all cases */
+        rdev->clock.max_pixel_clock = 35000;
 
         spll->reference_freq = mpll->reference_freq = p1pll->reference_freq;
         spll->reference_div = mpll->reference_div =
@@ -151,7 +153,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
         else
                 rdev->clock.default_sclk =
                         radeon_legacy_get_engine_clock(rdev);
-                        
+
         val = of_get_property(dp, "ATY,MCLK", NULL);
         if (val && *val)
                 rdev->clock.default_mclk = (*val) / 10;
@@ -160,7 +162,7 @@ static bool __devinit radeon_read_clocks_OF(struct drm_device *dev)
                         radeon_legacy_get_memory_clock(rdev);
 
         DRM_INFO("Using device-tree clock info\n");
-        
+
         return true;
 }
 #else
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index 5b991f7c6e2a..e4594676a07c 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -866,6 +866,11 @@ bool radeon_combios_get_clock_info(struct drm_device *dev)
                 rdev->clock.default_sclk = sclk;
                 rdev->clock.default_mclk = mclk;
 
+                if (RBIOS32(pll_info + 0x16))
+                        rdev->clock.max_pixel_clock = RBIOS32(pll_info + 0x16);
+                else
+                        rdev->clock.max_pixel_clock = 35000; /* might need something asic specific */
+
                 return true;
         }
         return false;
@@ -1548,10 +1553,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
                            (rdev->pdev->subsystem_device == 0x4a48)) {
                         /* Mac X800 */
                         rdev->mode_info.connector_table = CT_MAC_X800;
-                } else if ((rdev->pdev->device == 0x4150) &&
+                } else if ((of_machine_is_compatible("PowerMac7,2") ||
+                            of_machine_is_compatible("PowerMac7,3")) &&
+                           (rdev->pdev->device == 0x4150) &&
                            (rdev->pdev->subsystem_vendor == 0x1002) &&
                            (rdev->pdev->subsystem_device == 0x4150)) {
-                        /* Mac G5 9600 */
+                        /* Mac G5 tower 9600 */
                         rdev->mode_info.connector_table = CT_MAC_G5_9600;
                 } else
 #endif /* CONFIG_PPC_PMAC */
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index ee1dccb3fec9..cbfca3a24fdf 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -44,6 +44,8 @@ extern void
 radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder,
                              struct drm_connector *drm_connector);
 
+bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector);
+
 void radeon_connector_hotplug(struct drm_connector *connector)
 {
         struct drm_device *dev = connector->dev;
@@ -626,8 +628,14 @@ static int radeon_vga_get_modes(struct drm_connector *connector)
 static int radeon_vga_mode_valid(struct drm_connector *connector,
                                   struct drm_display_mode *mode)
 {
+        struct drm_device *dev = connector->dev;
+        struct radeon_device *rdev = dev->dev_private;
+
         /* XXX check mode bandwidth */
-        /* XXX verify against max DAC output frequency */
+
+        if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
+                return MODE_CLOCK_HIGH;
+
         return MODE_OK;
 }
 
@@ -830,6 +838,13 @@ radeon_dvi_detect(struct drm_connector *connector, bool force)
                 if (!radeon_connector->edid) {
                         DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
                                         drm_get_connector_name(connector));
+                        /* rs690 seems to have a problem with connectors not existing and always
+                         * return a block of 0's. If we see this just stop polling on this output */
+                        if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) {
+                                ret = connector_status_disconnected;
+                                DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector));
+                                radeon_connector->ddc_bus = NULL;
+                        }
                 } else {
                         radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
 
@@ -1015,6 +1030,11 @@ static int radeon_dvi_mode_valid(struct drm_connector *connector,
                 } else
                         return MODE_CLOCK_HIGH;
         }
+
+        /* check against the max pixel clock */
+        if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
+                return MODE_CLOCK_HIGH;
+
         return MODE_OK;
 }
 
@@ -1052,10 +1072,11 @@ static int radeon_dp_get_modes(struct drm_connector *connector)
 {
         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
         struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
+        struct drm_encoder *encoder = radeon_best_single_encoder(connector);
         int ret;
 
-        if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
-                struct drm_encoder *encoder;
+        if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
+            (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
                 struct drm_display_mode *mode;
 
                 if (!radeon_dig_connector->edp_on)
@@ -1067,7 +1088,6 @@ static int radeon_dp_get_modes(struct drm_connector *connector)
                                                      ATOM_TRANSMITTER_ACTION_POWER_OFF);
 
                 if (ret > 0) {
-                        encoder = radeon_best_single_encoder(connector);
                         if (encoder) {
                                 radeon_fixup_lvds_native_mode(encoder, connector);
                                 /* add scaled modes */
@@ -1091,8 +1111,14 @@ static int radeon_dp_get_modes(struct drm_connector *connector)
                         /* add scaled modes */
                         radeon_add_common_modes(encoder, connector);
                 }
-        } else
+        } else {
+                /* need to setup ddc on the bridge */
+                if (radeon_connector_encoder_is_dp_bridge(connector)) {
+                        if (encoder)
+                                radeon_atom_ext_encoder_setup_ddc(encoder);
+                }
                 ret = radeon_ddc_get_modes(radeon_connector);
+        }
 
         return ret;
 }
@@ -1176,14 +1202,15 @@ radeon_dp_detect(struct drm_connector *connector, bool force)
         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
         enum drm_connector_status ret = connector_status_disconnected;
         struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
+        struct drm_encoder *encoder = radeon_best_single_encoder(connector);
 
         if (radeon_connector->edid) {
                 kfree(radeon_connector->edid);
                 radeon_connector->edid = NULL;
         }
 
-        if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
-                struct drm_encoder *encoder = radeon_best_single_encoder(connector);
+        if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
+            (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
                 if (encoder) {
                         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
                         struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
@@ -1203,6 +1230,11 @@ radeon_dp_detect(struct drm_connector *connector, bool force)
                         atombios_set_edp_panel_power(connector,
                                                      ATOM_TRANSMITTER_ACTION_POWER_OFF);
         } else {
+                /* need to setup ddc on the bridge */
+                if (radeon_connector_encoder_is_dp_bridge(connector)) {
+                        if (encoder)
+                                radeon_atom_ext_encoder_setup_ddc(encoder);
+                }
                 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
                 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
                         ret = connector_status_connected;
@@ -1217,6 +1249,16 @@ radeon_dp_detect(struct drm_connector *connector, bool force)
                                         ret = connector_status_connected;
                         }
                 }
+
+                if ((ret == connector_status_disconnected) &&
+                    radeon_connector->dac_load_detect) {
+                        struct drm_encoder *encoder = radeon_best_single_encoder(connector);
+                        struct drm_encoder_helper_funcs *encoder_funcs;
+                        if (encoder) {
+                                encoder_funcs = encoder->helper_private;
+                                ret = encoder_funcs->detect(encoder, connector);
+                        }
+                }
         }
 
         radeon_connector_update_scratch_regs(connector, ret);
@@ -1231,7 +1273,8 @@ static int radeon_dp_mode_valid(struct drm_connector *connector,
 
         /* XXX check mode bandwidth */
 
-        if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
+        if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
+            (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
                 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
 
                 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
@@ -1241,7 +1284,7 @@ static int radeon_dp_mode_valid(struct drm_connector *connector,
                         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
                         struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
 
-                /* AVIVO hardware supports downscaling modes larger than the panel
+                        /* AVIVO hardware supports downscaling modes larger than the panel
                          * to the panel size, but I'm not sure this is desirable.
                          */
                         if ((mode->hdisplay > native_mode->hdisplay) ||
@@ -1390,6 +1433,10 @@ radeon_add_atom_connector(struct drm_device *dev,
                 default:
                         connector->interlace_allowed = true;
                         connector->doublescan_allowed = true;
+                        radeon_connector->dac_load_detect = true;
+                        drm_connector_attach_property(&radeon_connector->base,
+                                                      rdev->mode_info.load_detect_property,
+                                                      1);
                         break;
                 case DRM_MODE_CONNECTOR_DVII:
                 case DRM_MODE_CONNECTOR_DVID:
@@ -1411,6 +1458,12 @@ radeon_add_atom_connector(struct drm_device *dev,
                                 connector->doublescan_allowed = true;
                         else
                                 connector->doublescan_allowed = false;
+                        if (connector_type == DRM_MODE_CONNECTOR_DVII) {
+                                radeon_connector->dac_load_detect = true;
+                                drm_connector_attach_property(&radeon_connector->base,
+                                                              rdev->mode_info.load_detect_property,
+                                                              1);
+                        }
                         break;
                 case DRM_MODE_CONNECTOR_LVDS:
                 case DRM_MODE_CONNECTOR_eDP:
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index e680501c78ea..7cfaa7e2f3b5 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -215,6 +215,8 @@ int radeon_wb_init(struct radeon_device *rdev)
                 return r;
         }
 
+        /* clear wb memory */
+        memset((char *)rdev->wb.wb, 0, RADEON_GPU_PAGE_SIZE);
         /* disable event_write fences */
         rdev->wb.use_event = false;
         /* disabled via module param */
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index 03f124d626c2..b293487e5aa3 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -367,7 +367,8 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder,
         }
 
         if (ASIC_IS_DCE3(rdev) &&
-            (radeon_encoder->active_device & (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT))) {
+            ((radeon_encoder->active_device & (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) ||
+             radeon_encoder_is_dp_bridge(encoder))) {
                 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
                 radeon_dp_set_link_config(connector, mode);
         }
@@ -660,21 +661,16 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
         if (radeon_encoder_is_dp_bridge(encoder))
                 return ATOM_ENCODER_MODE_DP;
 
+        /* DVO is always DVO */
+        if (radeon_encoder->encoder_id == ATOM_ENCODER_MODE_DVO)
+                return ATOM_ENCODER_MODE_DVO;
+
         connector = radeon_get_connector_for_encoder(encoder);
-        if (!connector) {
-                switch (radeon_encoder->encoder_id) {
-                case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
-                case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
-                case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
-                case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
-                case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
-                        return ATOM_ENCODER_MODE_DVI;
-                case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
-                case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2:
-                default:
-                        return ATOM_ENCODER_MODE_CRT;
-                }
-        }
+        /* if we don't have an active device yet, just use one of
+         * the connectors tied to the encoder.
+         */
+        if (!connector)
+                connector = radeon_get_connector_for_encoder_init(encoder);
         radeon_connector = to_radeon_connector(connector);
 
         switch (connector->connector_type) {
@@ -1094,9 +1090,10 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
                         break;
                 }
 
-                if (is_dp)
+                if (is_dp) {
                         args.v2.acConfig.fCoherentMode = 1;
-                else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) {
+                        args.v2.acConfig.fDPConnector = 1;
+                } else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) {
                         if (dig->coherent_mode)
                                 args.v2.acConfig.fCoherentMode = 1;
                         if (radeon_encoder->pixel_clock > 165000)
@@ -1435,7 +1432,11 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
         if (is_dig) {
                 switch (mode) {
                 case DRM_MODE_DPMS_ON:
-                        atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0);
+                        /* some early dce3.2 boards have a bug in their transmitter control table */
+                        if ((rdev->family == CHIP_RV710) || (rdev->family == CHIP_RV730))
+                                atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
+                        else
+                                atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0);
                         if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) {
                                 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
 
@@ -1526,26 +1527,29 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
         }
 
         if (ext_encoder) {
-                int action;
-
                 switch (mode) {
                 case DRM_MODE_DPMS_ON:
                 default:
-                        if (ASIC_IS_DCE41(rdev))
-                                action = EXTERNAL_ENCODER_ACTION_V3_ENABLE_OUTPUT;
-                        else
-                                action = ATOM_ENABLE;
+                        if (ASIC_IS_DCE41(rdev)) {
+                                atombios_external_encoder_setup(encoder, ext_encoder,
+                                                                EXTERNAL_ENCODER_ACTION_V3_ENABLE_OUTPUT);
+                                atombios_external_encoder_setup(encoder, ext_encoder,
+                                                                EXTERNAL_ENCODER_ACTION_V3_ENCODER_BLANKING_OFF);
+                        } else
+                                atombios_external_encoder_setup(encoder, ext_encoder, ATOM_ENABLE);
                         break;
                 case DRM_MODE_DPMS_STANDBY:
                 case DRM_MODE_DPMS_SUSPEND:
                 case DRM_MODE_DPMS_OFF:
-                        if (ASIC_IS_DCE41(rdev))
-                                action = EXTERNAL_ENCODER_ACTION_V3_DISABLE_OUTPUT;
-                        else
-                                action = ATOM_DISABLE;
+                        if (ASIC_IS_DCE41(rdev)) {
+                                atombios_external_encoder_setup(encoder, ext_encoder,
+                                                                EXTERNAL_ENCODER_ACTION_V3_ENCODER_BLANKING);
+                                atombios_external_encoder_setup(encoder, ext_encoder,
+                                                                EXTERNAL_ENCODER_ACTION_V3_DISABLE_OUTPUT);
+                        } else
+                                atombios_external_encoder_setup(encoder, ext_encoder, ATOM_DISABLE);
                         break;
                 }
-                atombios_external_encoder_setup(encoder, ext_encoder, action);
         }
 
         radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false);
@@ -2004,6 +2008,65 @@ radeon_atom_dac_detect(struct drm_encoder *encoder, struct drm_connector *connec
         return connector_status_disconnected;
 }
 
+static enum drm_connector_status
+radeon_atom_dig_detect(struct drm_encoder *encoder, struct drm_connector *connector)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+        struct drm_encoder *ext_encoder = radeon_atom_get_external_encoder(encoder);
+        u32 bios_0_scratch;
+
+        if (!ASIC_IS_DCE4(rdev))
+                return connector_status_unknown;
+
+        if (!ext_encoder)
+                return connector_status_unknown;
+
+        if ((radeon_connector->devices & ATOM_DEVICE_CRT_SUPPORT) == 0)
+                return connector_status_unknown;
+
+        /* load detect on the dp bridge */
+        atombios_external_encoder_setup(encoder, ext_encoder,
+                                        EXTERNAL_ENCODER_ACTION_V3_DACLOAD_DETECTION);
+
+        bios_0_scratch = RREG32(R600_BIOS_0_SCRATCH);
+
+        DRM_DEBUG_KMS("Bios 0 scratch %x %08x\n", bios_0_scratch, radeon_encoder->devices);
+        if (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT) {
+                if (bios_0_scratch & ATOM_S0_CRT1_MASK)
+                        return connector_status_connected;
+        }
+        if (radeon_connector->devices & ATOM_DEVICE_CRT2_SUPPORT) {
+                if (bios_0_scratch & ATOM_S0_CRT2_MASK)
+                        return connector_status_connected;
+        }
+        if (radeon_connector->devices & ATOM_DEVICE_CV_SUPPORT) {
+                if (bios_0_scratch & (ATOM_S0_CV_MASK|ATOM_S0_CV_MASK_A))
+                        return connector_status_connected;
+        }
+        if (radeon_connector->devices & ATOM_DEVICE_TV1_SUPPORT) {
+                if (bios_0_scratch & (ATOM_S0_TV1_COMPOSITE | ATOM_S0_TV1_COMPOSITE_A))
+                        return connector_status_connected; /* CTV */
+                else if (bios_0_scratch & (ATOM_S0_TV1_SVIDEO | ATOM_S0_TV1_SVIDEO_A))
+                        return connector_status_connected; /* STV */
+        }
+        return connector_status_disconnected;
+}
+
+void
+radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder)
+{
+        struct drm_encoder *ext_encoder = radeon_atom_get_external_encoder(encoder);
+
+        if (ext_encoder)
+                /* ddc_setup on the dp bridge */
+                atombios_external_encoder_setup(encoder, ext_encoder,
+                                                EXTERNAL_ENCODER_ACTION_V3_DDC_SETUP);
+
+}
+
 static void radeon_atom_encoder_prepare(struct drm_encoder *encoder)
 {
         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
@@ -2167,7 +2230,7 @@ static const struct drm_encoder_helper_funcs radeon_atom_dig_helper_funcs = {
         .mode_set = radeon_atom_encoder_mode_set,
         .commit = radeon_atom_encoder_commit,
         .disable = radeon_atom_encoder_disable,
-        /* no detect for TMDS/LVDS yet */
+        .detect = radeon_atom_dig_detect,
 };
 
 static const struct drm_encoder_helper_funcs radeon_atom_dac_helper_funcs = {
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c
index 1f8229436570..021d2b6b556f 100644
--- a/drivers/gpu/drm/radeon/radeon_fence.c
+++ b/drivers/gpu/drm/radeon/radeon_fence.c
@@ -40,6 +40,35 @@
 #include "radeon.h"
 #include "radeon_trace.h"
 
+static void radeon_fence_write(struct radeon_device *rdev, u32 seq)
+{
+        if (rdev->wb.enabled) {
+                u32 scratch_index;
+                if (rdev->wb.use_event)
+                        scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
+                else
+                        scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
+                rdev->wb.wb[scratch_index/4] = cpu_to_le32(seq);;
+        } else
+                WREG32(rdev->fence_drv.scratch_reg, seq);
+}
+
+static u32 radeon_fence_read(struct radeon_device *rdev)
+{
+        u32 seq;
+
+        if (rdev->wb.enabled) {
+                u32 scratch_index;
+                if (rdev->wb.use_event)
+                        scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
+                else
+                        scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
+                seq = le32_to_cpu(rdev->wb.wb[scratch_index/4]);
+        } else
+                seq = RREG32(rdev->fence_drv.scratch_reg);
+        return seq;
+}
+
 int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
 {
         unsigned long irq_flags;
@@ -50,12 +79,12 @@ int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
                 return 0;
         }
         fence->seq = atomic_add_return(1, &rdev->fence_drv.seq);
-        if (!rdev->cp.ready) {
+        if (!rdev->cp.ready)
                 /* FIXME: cp is not running assume everythings is done right
                  * away
                  */
-                WREG32(rdev->fence_drv.scratch_reg, fence->seq);
-        } else
+                radeon_fence_write(rdev, fence->seq);
+        else
                 radeon_fence_ring_emit(rdev, fence);
 
         trace_radeon_fence_emit(rdev->ddev, fence->seq);
@@ -73,15 +102,7 @@ static bool radeon_fence_poll_locked(struct radeon_device *rdev)
         bool wake = false;
         unsigned long cjiffies;
 
-        if (rdev->wb.enabled) {
-                u32 scratch_index;
-                if (rdev->wb.use_event)
-                        scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
-                else
-                        scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base;
-                seq = le32_to_cpu(rdev->wb.wb[scratch_index/4]);
-        } else
-                seq = RREG32(rdev->fence_drv.scratch_reg);
+        seq = radeon_fence_read(rdev);
         if (seq != rdev->fence_drv.last_seq) {
                 rdev->fence_drv.last_seq = seq;
                 rdev->fence_drv.last_jiffies = jiffies;
@@ -251,7 +272,7 @@ retry:
                         r = radeon_gpu_reset(rdev);
                         if (r)
                                 return r;
-                        WREG32(rdev->fence_drv.scratch_reg, fence->seq);
+                        radeon_fence_write(rdev, fence->seq);
                         rdev->gpu_lockup = false;
                 }
                 timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
@@ -351,7 +372,7 @@ int radeon_fence_driver_init(struct radeon_device *rdev)
                 write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags);
                 return r;
         }
-        WREG32(rdev->fence_drv.scratch_reg, 0);
+        radeon_fence_write(rdev, 0);
         atomic_set(&rdev->fence_drv.seq, 0);
         INIT_LIST_HEAD(&rdev->fence_drv.created);
         INIT_LIST_HEAD(&rdev->fence_drv.emited);
@@ -391,7 +412,7 @@ static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
         struct radeon_fence *fence;
 
         seq_printf(m, "Last signaled fence 0x%08X\n",
-                   RREG32(rdev->fence_drv.scratch_reg));
+                   radeon_fence_read(rdev));
         if (!list_empty(&rdev->fence_drv.emited)) {
                    fence = list_entry(rdev->fence_drv.emited.prev,
                                       struct radeon_fence, list);
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 977a341266b6..6df4e3cec0c2 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -483,6 +483,8 @@ extern void radeon_atom_encoder_init(struct radeon_device *rdev);
 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
                                            int action, uint8_t lane_num,
                                            uint8_t lane_set);
+extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
+extern struct drm_encoder *radeon_atom_get_external_encoder(struct drm_encoder *encoder);
 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
                                 u8 write_byte, u8 *read_byte);
 
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index ef8a5babe9f7..6f508ffd1035 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -105,6 +105,9 @@ void rv770_pm_misc(struct radeon_device *rdev)
         struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage;
 
         if ((voltage->type == VOLTAGE_SW) && voltage->voltage) {
+                /* 0xff01 is a flag rather then an actual voltage */
+                if (voltage->voltage == 0xff01)
+                        return;
                 if (voltage->voltage != rdev->pm.current_vddc) {
                         radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC);
                         rdev->pm.current_vddc = voltage->voltage;
diff --git a/drivers/gpu/drm/savage/savage_bci.c b/drivers/gpu/drm/savage/savage_bci.c
index bf5f83ea14fe..cb1ee4e0050a 100644
--- a/drivers/gpu/drm/savage/savage_bci.c
+++ b/drivers/gpu/drm/savage/savage_bci.c
@@ -647,9 +647,6 @@ int savage_driver_firstopen(struct drm_device *dev)
         ret = drm_addmap(dev, aperture_base, SAVAGE_APERTURE_SIZE,
                          _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING,
                          &dev_priv->aperture);
-        if (ret)
-                return ret;
-
         return ret;
 }