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-rw-r--r--drivers/gpu/drm/nouveau/nouveau_mem.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 47e5ad9cfda2..9689d4147686 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -320,7 +320,8 @@ nouveau_mem_detect(struct drm_device *dev)
320 if (dev_priv->card_type < NV_50) { 320 if (dev_priv->card_type < NV_50) {
321 dev_priv->vram_size = nv_rd32(dev, NV04_PFB_FIFO_DATA); 321 dev_priv->vram_size = nv_rd32(dev, NV04_PFB_FIFO_DATA);
322 dev_priv->vram_size &= NV10_PFB_FIFO_DATA_RAM_AMOUNT_MB_MASK; 322 dev_priv->vram_size &= NV10_PFB_FIFO_DATA_RAM_AMOUNT_MB_MASK;
323 } else { 323 } else
324 if (dev_priv->card_type < NV_C0) {
324 dev_priv->vram_size = nv_rd32(dev, NV04_PFB_FIFO_DATA); 325 dev_priv->vram_size = nv_rd32(dev, NV04_PFB_FIFO_DATA);
325 dev_priv->vram_size |= (dev_priv->vram_size & 0xff) << 32; 326 dev_priv->vram_size |= (dev_priv->vram_size & 0xff) << 32;
326 dev_priv->vram_size &= 0xffffffff00ll; 327 dev_priv->vram_size &= 0xffffffff00ll;
@@ -328,6 +329,9 @@ nouveau_mem_detect(struct drm_device *dev)
328 dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10); 329 dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10);
329 dev_priv->vram_sys_base <<= 12; 330 dev_priv->vram_sys_base <<= 12;
330 } 331 }
332 } else {
333 dev_priv->vram_size = nv_rd32(dev, 0x10f20c) << 20;
334 dev_priv->vram_size *= nv_rd32(dev, 0x121c74);
331 } 335 }
332 336
333 NV_INFO(dev, "Detected %dMiB VRAM\n", (int)(dev_priv->vram_size >> 20)); 337 NV_INFO(dev, "Detected %dMiB VRAM\n", (int)(dev_priv->vram_size >> 20));