diff options
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_pm.c | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 19fb3652c7bd..63f679a04b25 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -33,6 +33,14 @@ | |||
33 | #define RADEON_WAIT_VBLANK_TIMEOUT 200 | 33 | #define RADEON_WAIT_VBLANK_TIMEOUT 200 |
34 | #define RADEON_WAIT_IDLE_TIMEOUT 200 | 34 | #define RADEON_WAIT_IDLE_TIMEOUT 200 |
35 | 35 | ||
36 | static const char *radeon_pm_state_type_name[5] = { | ||
37 | "Default", | ||
38 | "Powersave", | ||
39 | "Battery", | ||
40 | "Balanced", | ||
41 | "Performance", | ||
42 | }; | ||
43 | |||
36 | static void radeon_dynpm_idle_work_handler(struct work_struct *work); | 44 | static void radeon_dynpm_idle_work_handler(struct work_struct *work); |
37 | static int radeon_debugfs_pm_init(struct radeon_device *rdev); | 45 | static int radeon_debugfs_pm_init(struct radeon_device *rdev); |
38 | static bool radeon_pm_in_vbl(struct radeon_device *rdev); | 46 | static bool radeon_pm_in_vbl(struct radeon_device *rdev); |
@@ -278,6 +286,42 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev) | |||
278 | mutex_unlock(&rdev->ddev->struct_mutex); | 286 | mutex_unlock(&rdev->ddev->struct_mutex); |
279 | } | 287 | } |
280 | 288 | ||
289 | static void radeon_pm_print_states(struct radeon_device *rdev) | ||
290 | { | ||
291 | int i, j; | ||
292 | struct radeon_power_state *power_state; | ||
293 | struct radeon_pm_clock_info *clock_info; | ||
294 | |||
295 | DRM_DEBUG("%d Power State(s)\n", rdev->pm.num_power_states); | ||
296 | for (i = 0; i < rdev->pm.num_power_states; i++) { | ||
297 | power_state = &rdev->pm.power_state[i]; | ||
298 | DRM_DEBUG("State %d: %s\n", i, | ||
299 | radeon_pm_state_type_name[power_state->type]); | ||
300 | if (i == rdev->pm.default_power_state_index) | ||
301 | DRM_DEBUG("\tDefault"); | ||
302 | if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP)) | ||
303 | DRM_DEBUG("\t%d PCIE Lanes\n", power_state->pcie_lanes); | ||
304 | if (power_state->flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY) | ||
305 | DRM_DEBUG("\tSingle display only\n"); | ||
306 | DRM_DEBUG("\t%d Clock Mode(s)\n", power_state->num_clock_modes); | ||
307 | for (j = 0; j < power_state->num_clock_modes; j++) { | ||
308 | clock_info = &(power_state->clock_info[j]); | ||
309 | if (rdev->flags & RADEON_IS_IGP) | ||
310 | DRM_DEBUG("\t\t%d e: %d%s\n", | ||
311 | j, | ||
312 | clock_info->sclk * 10, | ||
313 | clock_info->flags & RADEON_PM_MODE_NO_DISPLAY ? "\tNo display only" : ""); | ||
314 | else | ||
315 | DRM_DEBUG("\t\t%d e: %d\tm: %d\tv: %d%s\n", | ||
316 | j, | ||
317 | clock_info->sclk * 10, | ||
318 | clock_info->mclk * 10, | ||
319 | clock_info->voltage.voltage, | ||
320 | clock_info->flags & RADEON_PM_MODE_NO_DISPLAY ? "\tNo display only" : ""); | ||
321 | } | ||
322 | } | ||
323 | } | ||
324 | |||
281 | static ssize_t radeon_get_pm_profile(struct device *dev, | 325 | static ssize_t radeon_get_pm_profile(struct device *dev, |
282 | struct device_attribute *attr, | 326 | struct device_attribute *attr, |
283 | char *buf) | 327 | char *buf) |
@@ -410,6 +454,7 @@ int radeon_pm_init(struct radeon_device *rdev) | |||
410 | radeon_atombios_get_power_modes(rdev); | 454 | radeon_atombios_get_power_modes(rdev); |
411 | else | 455 | else |
412 | radeon_combios_get_power_modes(rdev); | 456 | radeon_combios_get_power_modes(rdev); |
457 | radeon_pm_print_states(rdev); | ||
413 | radeon_pm_init_profile(rdev); | 458 | radeon_pm_init_profile(rdev); |
414 | } | 459 | } |
415 | 460 | ||