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-rw-r--r--drivers/gpu/drm/radeon/cik.c15
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.c6
2 files changed, 8 insertions, 13 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index b7859fe3df80..1f088800295d 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -3974,13 +3974,6 @@ static int cik_cp_resume(struct radeon_device *rdev)
3974{ 3974{
3975 int r; 3975 int r;
3976 3976
3977 /* Reset all cp blocks */
3978 WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP);
3979 RREG32(GRBM_SOFT_RESET);
3980 mdelay(15);
3981 WREG32(GRBM_SOFT_RESET, 0);
3982 RREG32(GRBM_SOFT_RESET);
3983
3984 r = cik_cp_load_microcode(rdev); 3977 r = cik_cp_load_microcode(rdev);
3985 if (r) 3978 if (r)
3986 return r; 3979 return r;
@@ -5060,9 +5053,9 @@ static void cik_enable_cgcg(struct radeon_device *rdev, bool enable)
5060 5053
5061 orig = data = RREG32(RLC_CGCG_CGLS_CTRL); 5054 orig = data = RREG32(RLC_CGCG_CGLS_CTRL);
5062 5055
5063 cik_enable_gui_idle_interrupt(rdev, enable);
5064
5065 if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_GFX_CGCG)) { 5056 if (enable && (rdev->cg_flags & RADEON_CG_SUPPORT_GFX_CGCG)) {
5057 cik_enable_gui_idle_interrupt(rdev, true);
5058
5066 tmp = cik_halt_rlc(rdev); 5059 tmp = cik_halt_rlc(rdev);
5067 5060
5068 cik_select_se_sh(rdev, 0xffffffff, 0xffffffff); 5061 cik_select_se_sh(rdev, 0xffffffff, 0xffffffff);
@@ -5075,6 +5068,8 @@ static void cik_enable_cgcg(struct radeon_device *rdev, bool enable)
5075 5068
5076 data |= CGCG_EN | CGLS_EN; 5069 data |= CGCG_EN | CGLS_EN;
5077 } else { 5070 } else {
5071 cik_enable_gui_idle_interrupt(rdev, false);
5072
5078 RREG32(CB_CGTT_SCLK_CTRL); 5073 RREG32(CB_CGTT_SCLK_CTRL);
5079 RREG32(CB_CGTT_SCLK_CTRL); 5074 RREG32(CB_CGTT_SCLK_CTRL);
5080 RREG32(CB_CGTT_SCLK_CTRL); 5075 RREG32(CB_CGTT_SCLK_CTRL);
@@ -5383,7 +5378,7 @@ void cik_update_cg(struct radeon_device *rdev,
5383static void cik_init_cg(struct radeon_device *rdev) 5378static void cik_init_cg(struct radeon_device *rdev)
5384{ 5379{
5385 5380
5386 cik_update_cg(rdev, RADEON_CG_BLOCK_GFX, false); /* XXX true */ 5381 cik_update_cg(rdev, RADEON_CG_BLOCK_GFX, true);
5387 5382
5388 if (rdev->has_uvd) 5383 if (rdev->has_uvd)
5389 si_init_uvd_internal_cg(rdev); 5384 si_init_uvd_internal_cg(rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 630853b96841..6152169d011f 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -2439,7 +2439,7 @@ int radeon_asic_init(struct radeon_device *rdev)
2439 rdev->num_crtc = 6; 2439 rdev->num_crtc = 6;
2440 rdev->has_uvd = true; 2440 rdev->has_uvd = true;
2441 rdev->cg_flags = 2441 rdev->cg_flags =
2442 RADEON_CG_SUPPORT_GFX_MGCG | 2442 /*RADEON_CG_SUPPORT_GFX_MGCG |*/
2443 RADEON_CG_SUPPORT_GFX_MGLS | 2443 RADEON_CG_SUPPORT_GFX_MGLS |
2444 /*RADEON_CG_SUPPORT_GFX_CGCG |*/ 2444 /*RADEON_CG_SUPPORT_GFX_CGCG |*/
2445 RADEON_CG_SUPPORT_GFX_CGLS | 2445 RADEON_CG_SUPPORT_GFX_CGLS |
@@ -2464,7 +2464,7 @@ int radeon_asic_init(struct radeon_device *rdev)
2464 if (rdev->family == CHIP_KAVERI) { 2464 if (rdev->family == CHIP_KAVERI) {
2465 rdev->num_crtc = 4; 2465 rdev->num_crtc = 4;
2466 rdev->cg_flags = 2466 rdev->cg_flags =
2467 RADEON_CG_SUPPORT_GFX_MGCG | 2467 /*RADEON_CG_SUPPORT_GFX_MGCG |*/
2468 RADEON_CG_SUPPORT_GFX_MGLS | 2468 RADEON_CG_SUPPORT_GFX_MGLS |
2469 /*RADEON_CG_SUPPORT_GFX_CGCG |*/ 2469 /*RADEON_CG_SUPPORT_GFX_CGCG |*/
2470 RADEON_CG_SUPPORT_GFX_CGLS | 2470 RADEON_CG_SUPPORT_GFX_CGLS |
@@ -2492,7 +2492,7 @@ int radeon_asic_init(struct radeon_device *rdev)
2492 } else { 2492 } else {
2493 rdev->num_crtc = 2; 2493 rdev->num_crtc = 2;
2494 rdev->cg_flags = 2494 rdev->cg_flags =
2495 RADEON_CG_SUPPORT_GFX_MGCG | 2495 /*RADEON_CG_SUPPORT_GFX_MGCG |*/
2496 RADEON_CG_SUPPORT_GFX_MGLS | 2496 RADEON_CG_SUPPORT_GFX_MGLS |
2497 /*RADEON_CG_SUPPORT_GFX_CGCG |*/ 2497 /*RADEON_CG_SUPPORT_GFX_CGCG |*/
2498 RADEON_CG_SUPPORT_GFX_CGLS | 2498 RADEON_CG_SUPPORT_GFX_CGLS |