diff options
Diffstat (limited to 'drivers/gpu/drm')
29 files changed, 171 insertions, 86 deletions
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c index 85071a1c4547..b0733153dfd2 100644 --- a/drivers/gpu/drm/drm_modes.c +++ b/drivers/gpu/drm/drm_modes.c | |||
@@ -1041,7 +1041,7 @@ void drm_mode_connector_list_update(struct drm_connector *connector) | |||
1041 | /* if equal delete the probed mode */ | 1041 | /* if equal delete the probed mode */ |
1042 | mode->status = pmode->status; | 1042 | mode->status = pmode->status; |
1043 | /* Merge type bits together */ | 1043 | /* Merge type bits together */ |
1044 | mode->type = pmode->type; | 1044 | mode->type |= pmode->type; |
1045 | list_del(&pmode->head); | 1045 | list_del(&pmode->head); |
1046 | drm_mode_destroy(connector->dev, pmode); | 1046 | drm_mode_destroy(connector->dev, pmode); |
1047 | break; | 1047 | break; |
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index c79dd2b1f70e..d3c3b5b15824 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c | |||
@@ -906,14 +906,12 @@ static void gen8_ggtt_insert_entries(struct i915_address_space *vm, | |||
906 | WARN_ON(readq(>t_entries[i-1]) | 906 | WARN_ON(readq(>t_entries[i-1]) |
907 | != gen8_pte_encode(addr, level, true)); | 907 | != gen8_pte_encode(addr, level, true)); |
908 | 908 | ||
909 | #if 0 /* TODO: Still needed on GEN8? */ | ||
910 | /* This next bit makes the above posting read even more important. We | 909 | /* This next bit makes the above posting read even more important. We |
911 | * want to flush the TLBs only after we're certain all the PTE updates | 910 | * want to flush the TLBs only after we're certain all the PTE updates |
912 | * have finished. | 911 | * have finished. |
913 | */ | 912 | */ |
914 | I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN); | 913 | I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN); |
915 | POSTING_READ(GFX_FLSH_CNTL_GEN6); | 914 | POSTING_READ(GFX_FLSH_CNTL_GEN6); |
916 | #endif | ||
917 | } | 915 | } |
918 | 916 | ||
919 | /* | 917 | /* |
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 5d1dedc02f15..f13d5edc39d5 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -2713,6 +2713,8 @@ static void gen8_irq_preinstall(struct drm_device *dev) | |||
2713 | #undef GEN8_IRQ_INIT_NDX | 2713 | #undef GEN8_IRQ_INIT_NDX |
2714 | 2714 | ||
2715 | POSTING_READ(GEN8_PCU_IIR); | 2715 | POSTING_READ(GEN8_PCU_IIR); |
2716 | |||
2717 | ibx_irq_preinstall(dev); | ||
2716 | } | 2718 | } |
2717 | 2719 | ||
2718 | static void ibx_hpd_irq_setup(struct drm_device *dev) | 2720 | static void ibx_hpd_irq_setup(struct drm_device *dev) |
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 526c8ded16b0..b69dc3e66c16 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c | |||
@@ -1057,12 +1057,18 @@ void intel_ddi_setup_hw_pll_state(struct drm_device *dev) | |||
1057 | enum pipe pipe; | 1057 | enum pipe pipe; |
1058 | struct intel_crtc *intel_crtc; | 1058 | struct intel_crtc *intel_crtc; |
1059 | 1059 | ||
1060 | dev_priv->ddi_plls.spll_refcount = 0; | ||
1061 | dev_priv->ddi_plls.wrpll1_refcount = 0; | ||
1062 | dev_priv->ddi_plls.wrpll2_refcount = 0; | ||
1063 | |||
1060 | for_each_pipe(pipe) { | 1064 | for_each_pipe(pipe) { |
1061 | intel_crtc = | 1065 | intel_crtc = |
1062 | to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); | 1066 | to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); |
1063 | 1067 | ||
1064 | if (!intel_crtc->active) | 1068 | if (!intel_crtc->active) { |
1069 | intel_crtc->ddi_pll_sel = PORT_CLK_SEL_NONE; | ||
1065 | continue; | 1070 | continue; |
1071 | } | ||
1066 | 1072 | ||
1067 | intel_crtc->ddi_pll_sel = intel_ddi_get_crtc_pll(dev_priv, | 1073 | intel_crtc->ddi_pll_sel = intel_ddi_get_crtc_pll(dev_priv, |
1068 | pipe); | 1074 | pipe); |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 54e82a80cf50..2bde35d34eb9 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -10541,11 +10541,20 @@ static struct intel_quirk intel_quirks[] = { | |||
10541 | /* Sony Vaio Y cannot use SSC on LVDS */ | 10541 | /* Sony Vaio Y cannot use SSC on LVDS */ |
10542 | { 0x0046, 0x104d, 0x9076, quirk_ssc_force_disable }, | 10542 | { 0x0046, 0x104d, 0x9076, quirk_ssc_force_disable }, |
10543 | 10543 | ||
10544 | /* | 10544 | /* Acer Aspire 5734Z must invert backlight brightness */ |
10545 | * All GM45 Acer (and its brands eMachines and Packard Bell) laptops | 10545 | { 0x2a42, 0x1025, 0x0459, quirk_invert_brightness }, |
10546 | * seem to use inverted backlight PWM. | 10546 | |
10547 | */ | 10547 | /* Acer/eMachines G725 */ |
10548 | { 0x2a42, 0x1025, PCI_ANY_ID, quirk_invert_brightness }, | 10548 | { 0x2a42, 0x1025, 0x0210, quirk_invert_brightness }, |
10549 | |||
10550 | /* Acer/eMachines e725 */ | ||
10551 | { 0x2a42, 0x1025, 0x0212, quirk_invert_brightness }, | ||
10552 | |||
10553 | /* Acer/Packard Bell NCL20 */ | ||
10554 | { 0x2a42, 0x1025, 0x034b, quirk_invert_brightness }, | ||
10555 | |||
10556 | /* Acer Aspire 4736Z */ | ||
10557 | { 0x2a42, 0x1025, 0x0260, quirk_invert_brightness }, | ||
10549 | 10558 | ||
10550 | /* Dell XPS13 HD Sandy Bridge */ | 10559 | /* Dell XPS13 HD Sandy Bridge */ |
10551 | { 0x0116, 0x1028, 0x052e, quirk_no_pcm_pwm_enable }, | 10560 | { 0x0116, 0x1028, 0x052e, quirk_no_pcm_pwm_enable }, |
@@ -11044,10 +11053,10 @@ void intel_modeset_gem_init(struct drm_device *dev) | |||
11044 | 11053 | ||
11045 | intel_setup_overlay(dev); | 11054 | intel_setup_overlay(dev); |
11046 | 11055 | ||
11047 | drm_modeset_lock_all(dev); | 11056 | mutex_lock(&dev->mode_config.mutex); |
11048 | drm_mode_config_reset(dev); | 11057 | drm_mode_config_reset(dev); |
11049 | intel_modeset_setup_hw_state(dev, false); | 11058 | intel_modeset_setup_hw_state(dev, false); |
11050 | drm_modeset_unlock_all(dev); | 11059 | mutex_unlock(&dev->mode_config.mutex); |
11051 | } | 11060 | } |
11052 | 11061 | ||
11053 | void intel_modeset_cleanup(struct drm_device *dev) | 11062 | void intel_modeset_cleanup(struct drm_device *dev) |
diff --git a/drivers/gpu/drm/nouveau/core/core/subdev.c b/drivers/gpu/drm/nouveau/core/core/subdev.c index 48f06378d3f9..2ea5568b6cf5 100644 --- a/drivers/gpu/drm/nouveau/core/core/subdev.c +++ b/drivers/gpu/drm/nouveau/core/core/subdev.c | |||
@@ -104,11 +104,8 @@ nouveau_subdev_create_(struct nouveau_object *parent, | |||
104 | 104 | ||
105 | if (parent) { | 105 | if (parent) { |
106 | struct nouveau_device *device = nv_device(parent); | 106 | struct nouveau_device *device = nv_device(parent); |
107 | int subidx = nv_hclass(subdev) & 0xff; | ||
108 | |||
109 | subdev->debug = nouveau_dbgopt(device->dbgopt, subname); | 107 | subdev->debug = nouveau_dbgopt(device->dbgopt, subname); |
110 | subdev->mmio = nv_subdev(device)->mmio; | 108 | subdev->mmio = nv_subdev(device)->mmio; |
111 | device->subdev[subidx] = *pobject; | ||
112 | } | 109 | } |
113 | 110 | ||
114 | return 0; | 111 | return 0; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/device/base.c b/drivers/gpu/drm/nouveau/core/engine/device/base.c index 9135b25a29d0..dd01c6c435d6 100644 --- a/drivers/gpu/drm/nouveau/core/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/core/engine/device/base.c | |||
@@ -268,6 +268,8 @@ nouveau_devobj_ctor(struct nouveau_object *parent, | |||
268 | if (ret) | 268 | if (ret) |
269 | return ret; | 269 | return ret; |
270 | 270 | ||
271 | device->subdev[i] = devobj->subdev[i]; | ||
272 | |||
271 | /* note: can't init *any* subdevs until devinit has been run | 273 | /* note: can't init *any* subdevs until devinit has been run |
272 | * due to not knowing exactly what the vbios init tables will | 274 | * due to not knowing exactly what the vbios init tables will |
273 | * mess with. devinit also can't be run until all of its | 275 | * mess with. devinit also can't be run until all of its |
diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/device/nvc0.c index 8d06eef2b9ee..dbc5e33de94f 100644 --- a/drivers/gpu/drm/nouveau/core/engine/device/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/engine/device/nvc0.c | |||
@@ -161,7 +161,7 @@ nvc0_identify(struct nouveau_device *device) | |||
161 | device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; | 161 | device->oclass[NVDEV_SUBDEV_THERM ] = &nva3_therm_oclass; |
162 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; | 162 | device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass; |
163 | device->oclass[NVDEV_SUBDEV_DEVINIT] = &nvc0_devinit_oclass; | 163 | device->oclass[NVDEV_SUBDEV_DEVINIT] = &nvc0_devinit_oclass; |
164 | device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; | 164 | device->oclass[NVDEV_SUBDEV_MC ] = nvc0_mc_oclass; |
165 | device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; | 165 | device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass; |
166 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; | 166 | device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; |
167 | device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass; | 167 | device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c index 434bb4b0fa2e..5c8a63dc506a 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c | |||
@@ -334,7 +334,7 @@ nvc0_graph_mthd(struct nvc0_graph_priv *priv, struct nvc0_graph_mthd *mthds) | |||
334 | while ((mthd = &mthds[i++]) && (init = mthd->init)) { | 334 | while ((mthd = &mthds[i++]) && (init = mthd->init)) { |
335 | u32 addr = 0x80000000 | mthd->oclass; | 335 | u32 addr = 0x80000000 | mthd->oclass; |
336 | for (data = 0; init->count; init++) { | 336 | for (data = 0; init->count; init++) { |
337 | if (data != init->data) { | 337 | if (init == mthd->init || data != init->data) { |
338 | nv_wr32(priv, 0x40448c, init->data); | 338 | nv_wr32(priv, 0x40448c, init->data); |
339 | data = init->data; | 339 | data = init->data; |
340 | } | 340 | } |
diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/fb.h b/drivers/gpu/drm/nouveau/core/include/subdev/fb.h index 8541aa382ff2..d89dbdf39b0d 100644 --- a/drivers/gpu/drm/nouveau/core/include/subdev/fb.h +++ b/drivers/gpu/drm/nouveau/core/include/subdev/fb.h | |||
@@ -75,6 +75,11 @@ struct nouveau_fb { | |||
75 | static inline struct nouveau_fb * | 75 | static inline struct nouveau_fb * |
76 | nouveau_fb(void *obj) | 76 | nouveau_fb(void *obj) |
77 | { | 77 | { |
78 | /* fbram uses this before device subdev pointer is valid */ | ||
79 | if (nv_iclass(obj, NV_SUBDEV_CLASS) && | ||
80 | nv_subidx(obj) == NVDEV_SUBDEV_FB) | ||
81 | return obj; | ||
82 | |||
78 | return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_FB]; | 83 | return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_FB]; |
79 | } | 84 | } |
80 | 85 | ||
diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/i2c.h b/drivers/gpu/drm/nouveau/core/include/subdev/i2c.h index 9fa5da723871..7f50a858b16f 100644 --- a/drivers/gpu/drm/nouveau/core/include/subdev/i2c.h +++ b/drivers/gpu/drm/nouveau/core/include/subdev/i2c.h | |||
@@ -73,7 +73,7 @@ struct nouveau_i2c { | |||
73 | int (*identify)(struct nouveau_i2c *, int index, | 73 | int (*identify)(struct nouveau_i2c *, int index, |
74 | const char *what, struct nouveau_i2c_board_info *, | 74 | const char *what, struct nouveau_i2c_board_info *, |
75 | bool (*match)(struct nouveau_i2c_port *, | 75 | bool (*match)(struct nouveau_i2c_port *, |
76 | struct i2c_board_info *)); | 76 | struct i2c_board_info *, void *), void *); |
77 | struct list_head ports; | 77 | struct list_head ports; |
78 | }; | 78 | }; |
79 | 79 | ||
diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/instmem.h b/drivers/gpu/drm/nouveau/core/include/subdev/instmem.h index ec7a54e91a08..4aca33887aaa 100644 --- a/drivers/gpu/drm/nouveau/core/include/subdev/instmem.h +++ b/drivers/gpu/drm/nouveau/core/include/subdev/instmem.h | |||
@@ -50,6 +50,13 @@ struct nouveau_instmem { | |||
50 | static inline struct nouveau_instmem * | 50 | static inline struct nouveau_instmem * |
51 | nouveau_instmem(void *obj) | 51 | nouveau_instmem(void *obj) |
52 | { | 52 | { |
53 | /* nv04/nv40 impls need to create objects in their constructor, | ||
54 | * which is before the subdev pointer is valid | ||
55 | */ | ||
56 | if (nv_iclass(obj, NV_SUBDEV_CLASS) && | ||
57 | nv_subidx(obj) == NVDEV_SUBDEV_INSTMEM) | ||
58 | return obj; | ||
59 | |||
53 | return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_INSTMEM]; | 60 | return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_INSTMEM]; |
54 | } | 61 | } |
55 | 62 | ||
diff --git a/drivers/gpu/drm/nouveau/core/subdev/bios/init.c b/drivers/gpu/drm/nouveau/core/subdev/bios/init.c index 420908cb82b6..df1b1b423093 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/bios/init.c +++ b/drivers/gpu/drm/nouveau/core/subdev/bios/init.c | |||
@@ -365,13 +365,13 @@ static u16 | |||
365 | init_script(struct nouveau_bios *bios, int index) | 365 | init_script(struct nouveau_bios *bios, int index) |
366 | { | 366 | { |
367 | struct nvbios_init init = { .bios = bios }; | 367 | struct nvbios_init init = { .bios = bios }; |
368 | u16 data; | 368 | u16 bmp_ver = bmp_version(bios), data; |
369 | 369 | ||
370 | if (bmp_version(bios) && bmp_version(bios) < 0x0510) { | 370 | if (bmp_ver && bmp_ver < 0x0510) { |
371 | if (index > 1) | 371 | if (index > 1 || bmp_ver < 0x0100) |
372 | return 0x0000; | 372 | return 0x0000; |
373 | 373 | ||
374 | data = bios->bmp_offset + (bios->version.major < 2 ? 14 : 18); | 374 | data = bios->bmp_offset + (bmp_ver < 0x0200 ? 14 : 18); |
375 | return nv_ro16(bios, data + (index * 2)); | 375 | return nv_ro16(bios, data + (index * 2)); |
376 | } | 376 | } |
377 | 377 | ||
@@ -1294,7 +1294,11 @@ init_jump(struct nvbios_init *init) | |||
1294 | u16 offset = nv_ro16(bios, init->offset + 1); | 1294 | u16 offset = nv_ro16(bios, init->offset + 1); |
1295 | 1295 | ||
1296 | trace("JUMP\t0x%04x\n", offset); | 1296 | trace("JUMP\t0x%04x\n", offset); |
1297 | init->offset = offset; | 1297 | |
1298 | if (init_exec(init)) | ||
1299 | init->offset = offset; | ||
1300 | else | ||
1301 | init->offset += 3; | ||
1298 | } | 1302 | } |
1299 | 1303 | ||
1300 | /** | 1304 | /** |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/i2c/base.c b/drivers/gpu/drm/nouveau/core/subdev/i2c/base.c index 041fd5edaebf..c33c03d2f4af 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/i2c/base.c +++ b/drivers/gpu/drm/nouveau/core/subdev/i2c/base.c | |||
@@ -197,7 +197,7 @@ static int | |||
197 | nouveau_i2c_identify(struct nouveau_i2c *i2c, int index, const char *what, | 197 | nouveau_i2c_identify(struct nouveau_i2c *i2c, int index, const char *what, |
198 | struct nouveau_i2c_board_info *info, | 198 | struct nouveau_i2c_board_info *info, |
199 | bool (*match)(struct nouveau_i2c_port *, | 199 | bool (*match)(struct nouveau_i2c_port *, |
200 | struct i2c_board_info *)) | 200 | struct i2c_board_info *, void *), void *data) |
201 | { | 201 | { |
202 | struct nouveau_i2c_port *port = nouveau_i2c_find(i2c, index); | 202 | struct nouveau_i2c_port *port = nouveau_i2c_find(i2c, index); |
203 | int i; | 203 | int i; |
@@ -221,7 +221,7 @@ nouveau_i2c_identify(struct nouveau_i2c *i2c, int index, const char *what, | |||
221 | } | 221 | } |
222 | 222 | ||
223 | if (nv_probe_i2c(port, info[i].dev.addr) && | 223 | if (nv_probe_i2c(port, info[i].dev.addr) && |
224 | (!match || match(port, &info[i].dev))) { | 224 | (!match || match(port, &info[i].dev, data))) { |
225 | nv_info(i2c, "detected %s: %s\n", what, | 225 | nv_info(i2c, "detected %s: %s\n", what, |
226 | info[i].dev.type); | 226 | info[i].dev.type); |
227 | return i; | 227 | return i; |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/mxm/nv50.c b/drivers/gpu/drm/nouveau/core/subdev/mxm/nv50.c index af129c2e8113..64f8b4702bf7 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/mxm/nv50.c +++ b/drivers/gpu/drm/nouveau/core/subdev/mxm/nv50.c | |||
@@ -100,7 +100,7 @@ mxm_match_dcb(struct nouveau_mxm *mxm, u8 *data, void *info) | |||
100 | static int | 100 | static int |
101 | mxm_dcb_sanitise_entry(struct nouveau_bios *bios, void *data, int idx, u16 pdcb) | 101 | mxm_dcb_sanitise_entry(struct nouveau_bios *bios, void *data, int idx, u16 pdcb) |
102 | { | 102 | { |
103 | struct nouveau_mxm *mxm = nouveau_mxm(bios); | 103 | struct nouveau_mxm *mxm = data; |
104 | struct context ctx = { .outp = (u32 *)(bios->data + pdcb) }; | 104 | struct context ctx = { .outp = (u32 *)(bios->data + pdcb) }; |
105 | u8 type, i2cidx, link, ver, len; | 105 | u8 type, i2cidx, link, ver, len; |
106 | u8 *conn; | 106 | u8 *conn; |
@@ -199,7 +199,7 @@ mxm_dcb_sanitise(struct nouveau_mxm *mxm) | |||
199 | return; | 199 | return; |
200 | } | 200 | } |
201 | 201 | ||
202 | dcb_outp_foreach(bios, NULL, mxm_dcb_sanitise_entry); | 202 | dcb_outp_foreach(bios, mxm, mxm_dcb_sanitise_entry); |
203 | mxms_foreach(mxm, 0x01, mxm_show_unmatched, NULL); | 203 | mxms_foreach(mxm, 0x01, mxm_show_unmatched, NULL); |
204 | } | 204 | } |
205 | 205 | ||
diff --git a/drivers/gpu/drm/nouveau/core/subdev/therm/ic.c b/drivers/gpu/drm/nouveau/core/subdev/therm/ic.c index e44ed7b93c6d..7610fc5f8fa2 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/therm/ic.c +++ b/drivers/gpu/drm/nouveau/core/subdev/therm/ic.c | |||
@@ -29,9 +29,9 @@ | |||
29 | 29 | ||
30 | static bool | 30 | static bool |
31 | probe_monitoring_device(struct nouveau_i2c_port *i2c, | 31 | probe_monitoring_device(struct nouveau_i2c_port *i2c, |
32 | struct i2c_board_info *info) | 32 | struct i2c_board_info *info, void *data) |
33 | { | 33 | { |
34 | struct nouveau_therm_priv *priv = (void *)nouveau_therm(i2c); | 34 | struct nouveau_therm_priv *priv = data; |
35 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; | 35 | struct nvbios_therm_sensor *sensor = &priv->bios_sensor; |
36 | struct i2c_client *client; | 36 | struct i2c_client *client; |
37 | 37 | ||
@@ -96,7 +96,7 @@ nouveau_therm_ic_ctor(struct nouveau_therm *therm) | |||
96 | }; | 96 | }; |
97 | 97 | ||
98 | i2c->identify(i2c, NV_I2C_DEFAULT(0), "monitoring device", | 98 | i2c->identify(i2c, NV_I2C_DEFAULT(0), "monitoring device", |
99 | board, probe_monitoring_device); | 99 | board, probe_monitoring_device, therm); |
100 | if (priv->ic) | 100 | if (priv->ic) |
101 | return; | 101 | return; |
102 | } | 102 | } |
@@ -108,7 +108,7 @@ nouveau_therm_ic_ctor(struct nouveau_therm *therm) | |||
108 | }; | 108 | }; |
109 | 109 | ||
110 | i2c->identify(i2c, NV_I2C_DEFAULT(0), "monitoring device", | 110 | i2c->identify(i2c, NV_I2C_DEFAULT(0), "monitoring device", |
111 | board, probe_monitoring_device); | 111 | board, probe_monitoring_device, therm); |
112 | if (priv->ic) | 112 | if (priv->ic) |
113 | return; | 113 | return; |
114 | } | 114 | } |
@@ -117,5 +117,5 @@ nouveau_therm_ic_ctor(struct nouveau_therm *therm) | |||
117 | device. Let's try our static list. | 117 | device. Let's try our static list. |
118 | */ | 118 | */ |
119 | i2c->identify(i2c, NV_I2C_DEFAULT(0), "monitoring device", | 119 | i2c->identify(i2c, NV_I2C_DEFAULT(0), "monitoring device", |
120 | nv_board_infos, probe_monitoring_device); | 120 | nv_board_infos, probe_monitoring_device, therm); |
121 | } | 121 | } |
diff --git a/drivers/gpu/drm/nouveau/dispnv04/dfp.c b/drivers/gpu/drm/nouveau/dispnv04/dfp.c index 936a71c59080..7fdc51e2a571 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/dfp.c +++ b/drivers/gpu/drm/nouveau/dispnv04/dfp.c | |||
@@ -643,7 +643,7 @@ static void nv04_tmds_slave_init(struct drm_encoder *encoder) | |||
643 | get_tmds_slave(encoder)) | 643 | get_tmds_slave(encoder)) |
644 | return; | 644 | return; |
645 | 645 | ||
646 | type = i2c->identify(i2c, 2, "TMDS transmitter", info, NULL); | 646 | type = i2c->identify(i2c, 2, "TMDS transmitter", info, NULL, NULL); |
647 | if (type < 0) | 647 | if (type < 0) |
648 | return; | 648 | return; |
649 | 649 | ||
diff --git a/drivers/gpu/drm/nouveau/dispnv04/tvnv04.c b/drivers/gpu/drm/nouveau/dispnv04/tvnv04.c index cc4b208ce546..244822df8ffc 100644 --- a/drivers/gpu/drm/nouveau/dispnv04/tvnv04.c +++ b/drivers/gpu/drm/nouveau/dispnv04/tvnv04.c | |||
@@ -59,7 +59,7 @@ int nv04_tv_identify(struct drm_device *dev, int i2c_index) | |||
59 | struct nouveau_i2c *i2c = nouveau_i2c(drm->device); | 59 | struct nouveau_i2c *i2c = nouveau_i2c(drm->device); |
60 | 60 | ||
61 | return i2c->identify(i2c, i2c_index, "TV encoder", | 61 | return i2c->identify(i2c, i2c_index, "TV encoder", |
62 | nv04_tv_encoder_info, NULL); | 62 | nv04_tv_encoder_info, NULL, NULL); |
63 | } | 63 | } |
64 | 64 | ||
65 | 65 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/nouveau/nouveau_abi16.c index 6828d81ed7b9..900fae01793e 100644 --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c | |||
@@ -447,6 +447,8 @@ nouveau_abi16_ioctl_notifierobj_alloc(ABI16_IOCTL_ARGS) | |||
447 | if (ret) | 447 | if (ret) |
448 | goto done; | 448 | goto done; |
449 | 449 | ||
450 | info->offset = ntfy->node->offset; | ||
451 | |||
450 | done: | 452 | done: |
451 | if (ret) | 453 | if (ret) |
452 | nouveau_abi16_ntfy_fini(chan, ntfy); | 454 | nouveau_abi16_ntfy_fini(chan, ntfy); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_acpi.c b/drivers/gpu/drm/nouveau/nouveau_acpi.c index 95c740454049..ba0183fb84f3 100644 --- a/drivers/gpu/drm/nouveau/nouveau_acpi.c +++ b/drivers/gpu/drm/nouveau/nouveau_acpi.c | |||
@@ -51,6 +51,7 @@ static struct nouveau_dsm_priv { | |||
51 | bool dsm_detected; | 51 | bool dsm_detected; |
52 | bool optimus_detected; | 52 | bool optimus_detected; |
53 | acpi_handle dhandle; | 53 | acpi_handle dhandle; |
54 | acpi_handle other_handle; | ||
54 | acpi_handle rom_handle; | 55 | acpi_handle rom_handle; |
55 | } nouveau_dsm_priv; | 56 | } nouveau_dsm_priv; |
56 | 57 | ||
@@ -260,9 +261,10 @@ static int nouveau_dsm_pci_probe(struct pci_dev *pdev) | |||
260 | if (!dhandle) | 261 | if (!dhandle) |
261 | return false; | 262 | return false; |
262 | 263 | ||
263 | if (!acpi_has_method(dhandle, "_DSM")) | 264 | if (!acpi_has_method(dhandle, "_DSM")) { |
265 | nouveau_dsm_priv.other_handle = dhandle; | ||
264 | return false; | 266 | return false; |
265 | 267 | } | |
266 | if (nouveau_test_dsm(dhandle, nouveau_dsm, NOUVEAU_DSM_POWER)) | 268 | if (nouveau_test_dsm(dhandle, nouveau_dsm, NOUVEAU_DSM_POWER)) |
267 | retval |= NOUVEAU_DSM_HAS_MUX; | 269 | retval |= NOUVEAU_DSM_HAS_MUX; |
268 | 270 | ||
@@ -338,6 +340,16 @@ static bool nouveau_dsm_detect(void) | |||
338 | printk(KERN_INFO "VGA switcheroo: detected DSM switching method %s handle\n", | 340 | printk(KERN_INFO "VGA switcheroo: detected DSM switching method %s handle\n", |
339 | acpi_method_name); | 341 | acpi_method_name); |
340 | nouveau_dsm_priv.dsm_detected = true; | 342 | nouveau_dsm_priv.dsm_detected = true; |
343 | /* | ||
344 | * On some systems hotplug events are generated for the device | ||
345 | * being switched off when _DSM is executed. They cause ACPI | ||
346 | * hotplug to trigger and attempt to remove the device from | ||
347 | * the system, which causes it to break down. Prevent that from | ||
348 | * happening by setting the no_hotplug flag for the involved | ||
349 | * ACPI device objects. | ||
350 | */ | ||
351 | acpi_bus_no_hotplug(nouveau_dsm_priv.dhandle); | ||
352 | acpi_bus_no_hotplug(nouveau_dsm_priv.other_handle); | ||
341 | ret = true; | 353 | ret = true; |
342 | } | 354 | } |
343 | 355 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c index 29c3efdfc7dd..25ea82f8def3 100644 --- a/drivers/gpu/drm/nouveau/nouveau_display.c +++ b/drivers/gpu/drm/nouveau/nouveau_display.c | |||
@@ -610,7 +610,7 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, | |||
610 | ret = nouveau_fence_sync(fence, chan); | 610 | ret = nouveau_fence_sync(fence, chan); |
611 | nouveau_fence_unref(&fence); | 611 | nouveau_fence_unref(&fence); |
612 | if (ret) | 612 | if (ret) |
613 | return ret; | 613 | goto fail_free; |
614 | 614 | ||
615 | if (new_bo != old_bo) { | 615 | if (new_bo != old_bo) { |
616 | ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM); | 616 | ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM); |
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index b1970596a782..0b9621c9aeea 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -1143,31 +1143,53 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc, | |||
1143 | } | 1143 | } |
1144 | 1144 | ||
1145 | if (tiling_flags & RADEON_TILING_MACRO) { | 1145 | if (tiling_flags & RADEON_TILING_MACRO) { |
1146 | if (rdev->family >= CHIP_BONAIRE) | 1146 | evergreen_tiling_fields(tiling_flags, &bankw, &bankh, &mtaspect, &tile_split); |
1147 | tmp = rdev->config.cik.tile_config; | ||
1148 | else if (rdev->family >= CHIP_TAHITI) | ||
1149 | tmp = rdev->config.si.tile_config; | ||
1150 | else if (rdev->family >= CHIP_CAYMAN) | ||
1151 | tmp = rdev->config.cayman.tile_config; | ||
1152 | else | ||
1153 | tmp = rdev->config.evergreen.tile_config; | ||
1154 | 1147 | ||
1155 | switch ((tmp & 0xf0) >> 4) { | 1148 | /* Set NUM_BANKS. */ |
1156 | case 0: /* 4 banks */ | 1149 | if (rdev->family >= CHIP_BONAIRE) { |
1157 | fb_format |= EVERGREEN_GRPH_NUM_BANKS(EVERGREEN_ADDR_SURF_4_BANK); | 1150 | unsigned tileb, index, num_banks, tile_split_bytes; |
1158 | break; | 1151 | |
1159 | case 1: /* 8 banks */ | 1152 | /* Calculate the macrotile mode index. */ |
1160 | default: | 1153 | tile_split_bytes = 64 << tile_split; |
1161 | fb_format |= EVERGREEN_GRPH_NUM_BANKS(EVERGREEN_ADDR_SURF_8_BANK); | 1154 | tileb = 8 * 8 * target_fb->bits_per_pixel / 8; |
1162 | break; | 1155 | tileb = min(tile_split_bytes, tileb); |
1163 | case 2: /* 16 banks */ | 1156 | |
1164 | fb_format |= EVERGREEN_GRPH_NUM_BANKS(EVERGREEN_ADDR_SURF_16_BANK); | 1157 | for (index = 0; tileb > 64; index++) { |
1165 | break; | 1158 | tileb >>= 1; |
1159 | } | ||
1160 | |||
1161 | if (index >= 16) { | ||
1162 | DRM_ERROR("Wrong screen bpp (%u) or tile split (%u)\n", | ||
1163 | target_fb->bits_per_pixel, tile_split); | ||
1164 | return -EINVAL; | ||
1165 | } | ||
1166 | |||
1167 | num_banks = (rdev->config.cik.macrotile_mode_array[index] >> 6) & 0x3; | ||
1168 | fb_format |= EVERGREEN_GRPH_NUM_BANKS(num_banks); | ||
1169 | } else { | ||
1170 | /* SI and older. */ | ||
1171 | if (rdev->family >= CHIP_TAHITI) | ||
1172 | tmp = rdev->config.si.tile_config; | ||
1173 | else if (rdev->family >= CHIP_CAYMAN) | ||
1174 | tmp = rdev->config.cayman.tile_config; | ||
1175 | else | ||
1176 | tmp = rdev->config.evergreen.tile_config; | ||
1177 | |||
1178 | switch ((tmp & 0xf0) >> 4) { | ||
1179 | case 0: /* 4 banks */ | ||
1180 | fb_format |= EVERGREEN_GRPH_NUM_BANKS(EVERGREEN_ADDR_SURF_4_BANK); | ||
1181 | break; | ||
1182 | case 1: /* 8 banks */ | ||
1183 | default: | ||
1184 | fb_format |= EVERGREEN_GRPH_NUM_BANKS(EVERGREEN_ADDR_SURF_8_BANK); | ||
1185 | break; | ||
1186 | case 2: /* 16 banks */ | ||
1187 | fb_format |= EVERGREEN_GRPH_NUM_BANKS(EVERGREEN_ADDR_SURF_16_BANK); | ||
1188 | break; | ||
1189 | } | ||
1166 | } | 1190 | } |
1167 | 1191 | ||
1168 | fb_format |= EVERGREEN_GRPH_ARRAY_MODE(EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1); | 1192 | fb_format |= EVERGREEN_GRPH_ARRAY_MODE(EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1); |
1169 | |||
1170 | evergreen_tiling_fields(tiling_flags, &bankw, &bankh, &mtaspect, &tile_split); | ||
1171 | fb_format |= EVERGREEN_GRPH_TILE_SPLIT(tile_split); | 1193 | fb_format |= EVERGREEN_GRPH_TILE_SPLIT(tile_split); |
1172 | fb_format |= EVERGREEN_GRPH_BANK_WIDTH(bankw); | 1194 | fb_format |= EVERGREEN_GRPH_BANK_WIDTH(bankw); |
1173 | fb_format |= EVERGREEN_GRPH_BANK_HEIGHT(bankh); | 1195 | fb_format |= EVERGREEN_GRPH_BANK_HEIGHT(bankh); |
@@ -1180,19 +1202,12 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc, | |||
1180 | fb_format |= EVERGREEN_GRPH_ARRAY_MODE(EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1); | 1202 | fb_format |= EVERGREEN_GRPH_ARRAY_MODE(EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1); |
1181 | 1203 | ||
1182 | if (rdev->family >= CHIP_BONAIRE) { | 1204 | if (rdev->family >= CHIP_BONAIRE) { |
1183 | u32 num_pipe_configs = rdev->config.cik.max_tile_pipes; | 1205 | /* Read the pipe config from the 2D TILED SCANOUT mode. |
1184 | u32 num_rb = rdev->config.cik.max_backends_per_se; | 1206 | * It should be the same for the other modes too, but not all |
1185 | if (num_pipe_configs > 8) | 1207 | * modes set the pipe config field. */ |
1186 | num_pipe_configs = 8; | 1208 | u32 pipe_config = (rdev->config.cik.tile_mode_array[10] >> 6) & 0x1f; |
1187 | if (num_pipe_configs == 8) | 1209 | |
1188 | fb_format |= CIK_GRPH_PIPE_CONFIG(CIK_ADDR_SURF_P8_32x32_16x16); | 1210 | fb_format |= CIK_GRPH_PIPE_CONFIG(pipe_config); |
1189 | else if (num_pipe_configs == 4) { | ||
1190 | if (num_rb == 4) | ||
1191 | fb_format |= CIK_GRPH_PIPE_CONFIG(CIK_ADDR_SURF_P4_16x16); | ||
1192 | else if (num_rb < 4) | ||
1193 | fb_format |= CIK_GRPH_PIPE_CONFIG(CIK_ADDR_SURF_P4_8x16); | ||
1194 | } else if (num_pipe_configs == 2) | ||
1195 | fb_format |= CIK_GRPH_PIPE_CONFIG(CIK_ADDR_SURF_P2); | ||
1196 | } else if ((rdev->family == CHIP_TAHITI) || | 1211 | } else if ((rdev->family == CHIP_TAHITI) || |
1197 | (rdev->family == CHIP_PITCAIRN)) | 1212 | (rdev->family == CHIP_PITCAIRN)) |
1198 | fb_format |= SI_GRPH_PIPE_CONFIG(SI_ADDR_SURF_P8_32x32_8x16); | 1213 | fb_format |= SI_GRPH_PIPE_CONFIG(SI_ADDR_SURF_P8_32x32_8x16); |
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index b43a3a3c9067..e950fabd7f5e 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c | |||
@@ -3057,7 +3057,7 @@ static u32 cik_create_bitmask(u32 bit_width) | |||
3057 | * Returns the disabled RB bitmask. | 3057 | * Returns the disabled RB bitmask. |
3058 | */ | 3058 | */ |
3059 | static u32 cik_get_rb_disabled(struct radeon_device *rdev, | 3059 | static u32 cik_get_rb_disabled(struct radeon_device *rdev, |
3060 | u32 max_rb_num, u32 se_num, | 3060 | u32 max_rb_num_per_se, |
3061 | u32 sh_per_se) | 3061 | u32 sh_per_se) |
3062 | { | 3062 | { |
3063 | u32 data, mask; | 3063 | u32 data, mask; |
@@ -3071,7 +3071,7 @@ static u32 cik_get_rb_disabled(struct radeon_device *rdev, | |||
3071 | 3071 | ||
3072 | data >>= BACKEND_DISABLE_SHIFT; | 3072 | data >>= BACKEND_DISABLE_SHIFT; |
3073 | 3073 | ||
3074 | mask = cik_create_bitmask(max_rb_num / se_num / sh_per_se); | 3074 | mask = cik_create_bitmask(max_rb_num_per_se / sh_per_se); |
3075 | 3075 | ||
3076 | return data & mask; | 3076 | return data & mask; |
3077 | } | 3077 | } |
@@ -3088,7 +3088,7 @@ static u32 cik_get_rb_disabled(struct radeon_device *rdev, | |||
3088 | */ | 3088 | */ |
3089 | static void cik_setup_rb(struct radeon_device *rdev, | 3089 | static void cik_setup_rb(struct radeon_device *rdev, |
3090 | u32 se_num, u32 sh_per_se, | 3090 | u32 se_num, u32 sh_per_se, |
3091 | u32 max_rb_num) | 3091 | u32 max_rb_num_per_se) |
3092 | { | 3092 | { |
3093 | int i, j; | 3093 | int i, j; |
3094 | u32 data, mask; | 3094 | u32 data, mask; |
@@ -3098,7 +3098,7 @@ static void cik_setup_rb(struct radeon_device *rdev, | |||
3098 | for (i = 0; i < se_num; i++) { | 3098 | for (i = 0; i < se_num; i++) { |
3099 | for (j = 0; j < sh_per_se; j++) { | 3099 | for (j = 0; j < sh_per_se; j++) { |
3100 | cik_select_se_sh(rdev, i, j); | 3100 | cik_select_se_sh(rdev, i, j); |
3101 | data = cik_get_rb_disabled(rdev, max_rb_num, se_num, sh_per_se); | 3101 | data = cik_get_rb_disabled(rdev, max_rb_num_per_se, sh_per_se); |
3102 | if (rdev->family == CHIP_HAWAII) | 3102 | if (rdev->family == CHIP_HAWAII) |
3103 | disabled_rbs |= data << ((i * sh_per_se + j) * HAWAII_RB_BITMAP_WIDTH_PER_SH); | 3103 | disabled_rbs |= data << ((i * sh_per_se + j) * HAWAII_RB_BITMAP_WIDTH_PER_SH); |
3104 | else | 3104 | else |
@@ -3108,12 +3108,14 @@ static void cik_setup_rb(struct radeon_device *rdev, | |||
3108 | cik_select_se_sh(rdev, 0xffffffff, 0xffffffff); | 3108 | cik_select_se_sh(rdev, 0xffffffff, 0xffffffff); |
3109 | 3109 | ||
3110 | mask = 1; | 3110 | mask = 1; |
3111 | for (i = 0; i < max_rb_num; i++) { | 3111 | for (i = 0; i < max_rb_num_per_se * se_num; i++) { |
3112 | if (!(disabled_rbs & mask)) | 3112 | if (!(disabled_rbs & mask)) |
3113 | enabled_rbs |= mask; | 3113 | enabled_rbs |= mask; |
3114 | mask <<= 1; | 3114 | mask <<= 1; |
3115 | } | 3115 | } |
3116 | 3116 | ||
3117 | rdev->config.cik.backend_enable_mask = enabled_rbs; | ||
3118 | |||
3117 | for (i = 0; i < se_num; i++) { | 3119 | for (i = 0; i < se_num; i++) { |
3118 | cik_select_se_sh(rdev, i, 0xffffffff); | 3120 | cik_select_se_sh(rdev, i, 0xffffffff); |
3119 | data = 0; | 3121 | data = 0; |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index b1f990d0eaa1..45e1f447bc79 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -1940,7 +1940,7 @@ struct si_asic { | |||
1940 | unsigned sc_earlyz_tile_fifo_size; | 1940 | unsigned sc_earlyz_tile_fifo_size; |
1941 | 1941 | ||
1942 | unsigned num_tile_pipes; | 1942 | unsigned num_tile_pipes; |
1943 | unsigned num_backends_per_se; | 1943 | unsigned backend_enable_mask; |
1944 | unsigned backend_disable_mask_per_asic; | 1944 | unsigned backend_disable_mask_per_asic; |
1945 | unsigned backend_map; | 1945 | unsigned backend_map; |
1946 | unsigned num_texture_channel_caches; | 1946 | unsigned num_texture_channel_caches; |
@@ -1970,7 +1970,7 @@ struct cik_asic { | |||
1970 | unsigned sc_earlyz_tile_fifo_size; | 1970 | unsigned sc_earlyz_tile_fifo_size; |
1971 | 1971 | ||
1972 | unsigned num_tile_pipes; | 1972 | unsigned num_tile_pipes; |
1973 | unsigned num_backends_per_se; | 1973 | unsigned backend_enable_mask; |
1974 | unsigned backend_disable_mask_per_asic; | 1974 | unsigned backend_disable_mask_per_asic; |
1975 | unsigned backend_map; | 1975 | unsigned backend_map; |
1976 | unsigned num_texture_channel_caches; | 1976 | unsigned num_texture_channel_caches; |
diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c index 9d302eaeea15..485848f889f5 100644 --- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c +++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c | |||
@@ -33,6 +33,7 @@ static struct radeon_atpx_priv { | |||
33 | bool atpx_detected; | 33 | bool atpx_detected; |
34 | /* handle for device - and atpx */ | 34 | /* handle for device - and atpx */ |
35 | acpi_handle dhandle; | 35 | acpi_handle dhandle; |
36 | acpi_handle other_handle; | ||
36 | struct radeon_atpx atpx; | 37 | struct radeon_atpx atpx; |
37 | } radeon_atpx_priv; | 38 | } radeon_atpx_priv; |
38 | 39 | ||
@@ -451,9 +452,10 @@ static bool radeon_atpx_pci_probe_handle(struct pci_dev *pdev) | |||
451 | return false; | 452 | return false; |
452 | 453 | ||
453 | status = acpi_get_handle(dhandle, "ATPX", &atpx_handle); | 454 | status = acpi_get_handle(dhandle, "ATPX", &atpx_handle); |
454 | if (ACPI_FAILURE(status)) | 455 | if (ACPI_FAILURE(status)) { |
456 | radeon_atpx_priv.other_handle = dhandle; | ||
455 | return false; | 457 | return false; |
456 | 458 | } | |
457 | radeon_atpx_priv.dhandle = dhandle; | 459 | radeon_atpx_priv.dhandle = dhandle; |
458 | radeon_atpx_priv.atpx.handle = atpx_handle; | 460 | radeon_atpx_priv.atpx.handle = atpx_handle; |
459 | return true; | 461 | return true; |
@@ -530,6 +532,16 @@ static bool radeon_atpx_detect(void) | |||
530 | printk(KERN_INFO "VGA switcheroo: detected switching method %s handle\n", | 532 | printk(KERN_INFO "VGA switcheroo: detected switching method %s handle\n", |
531 | acpi_method_name); | 533 | acpi_method_name); |
532 | radeon_atpx_priv.atpx_detected = true; | 534 | radeon_atpx_priv.atpx_detected = true; |
535 | /* | ||
536 | * On some systems hotplug events are generated for the device | ||
537 | * being switched off when ATPX is executed. They cause ACPI | ||
538 | * hotplug to trigger and attempt to remove the device from | ||
539 | * the system, which causes it to break down. Prevent that from | ||
540 | * happening by setting the no_hotplug flag for the involved | ||
541 | * ACPI device objects. | ||
542 | */ | ||
543 | acpi_bus_no_hotplug(radeon_atpx_priv.dhandle); | ||
544 | acpi_bus_no_hotplug(radeon_atpx_priv.other_handle); | ||
533 | return true; | 545 | return true; |
534 | } | 546 | } |
535 | return false; | 547 | return false; |
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 1958b36ad0e5..db39ea36bf22 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c | |||
@@ -77,9 +77,10 @@ | |||
77 | * 2.33.0 - Add SI tiling mode array query | 77 | * 2.33.0 - Add SI tiling mode array query |
78 | * 2.34.0 - Add CIK tiling mode array query | 78 | * 2.34.0 - Add CIK tiling mode array query |
79 | * 2.35.0 - Add CIK macrotile mode array query | 79 | * 2.35.0 - Add CIK macrotile mode array query |
80 | * 2.36.0 - Fix CIK DCE tiling setup | ||
80 | */ | 81 | */ |
81 | #define KMS_DRIVER_MAJOR 2 | 82 | #define KMS_DRIVER_MAJOR 2 |
82 | #define KMS_DRIVER_MINOR 35 | 83 | #define KMS_DRIVER_MINOR 36 |
83 | #define KMS_DRIVER_PATCHLEVEL 0 | 84 | #define KMS_DRIVER_PATCHLEVEL 0 |
84 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); | 85 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); |
85 | int radeon_driver_unload_kms(struct drm_device *dev); | 86 | int radeon_driver_unload_kms(struct drm_device *dev); |
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 55d0b474bd37..21d593c0ecaf 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c | |||
@@ -461,6 +461,15 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
461 | case RADEON_INFO_SI_CP_DMA_COMPUTE: | 461 | case RADEON_INFO_SI_CP_DMA_COMPUTE: |
462 | *value = 1; | 462 | *value = 1; |
463 | break; | 463 | break; |
464 | case RADEON_INFO_SI_BACKEND_ENABLED_MASK: | ||
465 | if (rdev->family >= CHIP_BONAIRE) { | ||
466 | *value = rdev->config.cik.backend_enable_mask; | ||
467 | } else if (rdev->family >= CHIP_TAHITI) { | ||
468 | *value = rdev->config.si.backend_enable_mask; | ||
469 | } else { | ||
470 | DRM_DEBUG_KMS("BACKEND_ENABLED_MASK is si+ only!\n"); | ||
471 | } | ||
472 | break; | ||
464 | default: | 473 | default: |
465 | DRM_DEBUG_KMS("Invalid request %d\n", info->request); | 474 | DRM_DEBUG_KMS("Invalid request %d\n", info->request); |
466 | return -EINVAL; | 475 | return -EINVAL; |
diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c b/drivers/gpu/drm/radeon/radeon_uvd.c index 373d088bac66..b9c0529b4a2e 100644 --- a/drivers/gpu/drm/radeon/radeon_uvd.c +++ b/drivers/gpu/drm/radeon/radeon_uvd.c | |||
@@ -473,7 +473,7 @@ static int radeon_uvd_cs_reloc(struct radeon_cs_parser *p, | |||
473 | return -EINVAL; | 473 | return -EINVAL; |
474 | } | 474 | } |
475 | 475 | ||
476 | if ((start >> 28) != (end >> 28)) { | 476 | if ((start >> 28) != ((end - 1) >> 28)) { |
477 | DRM_ERROR("reloc %LX-%LX crossing 256MB boundary!\n", | 477 | DRM_ERROR("reloc %LX-%LX crossing 256MB boundary!\n", |
478 | start, end); | 478 | start, end); |
479 | return -EINVAL; | 479 | return -EINVAL; |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index a36736dab5e0..85e1edfaa3be 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -2811,7 +2811,7 @@ static void si_setup_spi(struct radeon_device *rdev, | |||
2811 | } | 2811 | } |
2812 | 2812 | ||
2813 | static u32 si_get_rb_disabled(struct radeon_device *rdev, | 2813 | static u32 si_get_rb_disabled(struct radeon_device *rdev, |
2814 | u32 max_rb_num, u32 se_num, | 2814 | u32 max_rb_num_per_se, |
2815 | u32 sh_per_se) | 2815 | u32 sh_per_se) |
2816 | { | 2816 | { |
2817 | u32 data, mask; | 2817 | u32 data, mask; |
@@ -2825,14 +2825,14 @@ static u32 si_get_rb_disabled(struct radeon_device *rdev, | |||
2825 | 2825 | ||
2826 | data >>= BACKEND_DISABLE_SHIFT; | 2826 | data >>= BACKEND_DISABLE_SHIFT; |
2827 | 2827 | ||
2828 | mask = si_create_bitmask(max_rb_num / se_num / sh_per_se); | 2828 | mask = si_create_bitmask(max_rb_num_per_se / sh_per_se); |
2829 | 2829 | ||
2830 | return data & mask; | 2830 | return data & mask; |
2831 | } | 2831 | } |
2832 | 2832 | ||
2833 | static void si_setup_rb(struct radeon_device *rdev, | 2833 | static void si_setup_rb(struct radeon_device *rdev, |
2834 | u32 se_num, u32 sh_per_se, | 2834 | u32 se_num, u32 sh_per_se, |
2835 | u32 max_rb_num) | 2835 | u32 max_rb_num_per_se) |
2836 | { | 2836 | { |
2837 | int i, j; | 2837 | int i, j; |
2838 | u32 data, mask; | 2838 | u32 data, mask; |
@@ -2842,19 +2842,21 @@ static void si_setup_rb(struct radeon_device *rdev, | |||
2842 | for (i = 0; i < se_num; i++) { | 2842 | for (i = 0; i < se_num; i++) { |
2843 | for (j = 0; j < sh_per_se; j++) { | 2843 | for (j = 0; j < sh_per_se; j++) { |
2844 | si_select_se_sh(rdev, i, j); | 2844 | si_select_se_sh(rdev, i, j); |
2845 | data = si_get_rb_disabled(rdev, max_rb_num, se_num, sh_per_se); | 2845 | data = si_get_rb_disabled(rdev, max_rb_num_per_se, sh_per_se); |
2846 | disabled_rbs |= data << ((i * sh_per_se + j) * TAHITI_RB_BITMAP_WIDTH_PER_SH); | 2846 | disabled_rbs |= data << ((i * sh_per_se + j) * TAHITI_RB_BITMAP_WIDTH_PER_SH); |
2847 | } | 2847 | } |
2848 | } | 2848 | } |
2849 | si_select_se_sh(rdev, 0xffffffff, 0xffffffff); | 2849 | si_select_se_sh(rdev, 0xffffffff, 0xffffffff); |
2850 | 2850 | ||
2851 | mask = 1; | 2851 | mask = 1; |
2852 | for (i = 0; i < max_rb_num; i++) { | 2852 | for (i = 0; i < max_rb_num_per_se * se_num; i++) { |
2853 | if (!(disabled_rbs & mask)) | 2853 | if (!(disabled_rbs & mask)) |
2854 | enabled_rbs |= mask; | 2854 | enabled_rbs |= mask; |
2855 | mask <<= 1; | 2855 | mask <<= 1; |
2856 | } | 2856 | } |
2857 | 2857 | ||
2858 | rdev->config.si.backend_enable_mask = enabled_rbs; | ||
2859 | |||
2858 | for (i = 0; i < se_num; i++) { | 2860 | for (i = 0; i < se_num; i++) { |
2859 | si_select_se_sh(rdev, i, 0xffffffff); | 2861 | si_select_se_sh(rdev, i, 0xffffffff); |
2860 | data = 0; | 2862 | data = 0; |