27 files changed, 353 insertions, 105 deletions

diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 994d23beeb1d..57cea01c4ffb 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1840,8 +1840,10 @@ int drm_mode_dirtyfb_ioctl(struct drm_device *dev,
 
                 ret = copy_from_user(clips, clips_ptr,
                                      num_clips * sizeof(*clips));
-                if (ret)
+                if (ret) {
+                        ret = -EFAULT;
                         goto out_err2;
+                }
         }
 
         if (fb->funcs->dirty) {
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index b3779d243aef..08c4c926e65f 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -264,7 +264,7 @@ bool drm_fb_helper_force_kernel_mode(void)
 int drm_fb_helper_panic(struct notifier_block *n, unsigned long ununsed,
                         void *panic_str)
 {
-        DRM_ERROR("panic occurred, switching back to text console\n");
+        printk(KERN_ERR "panic occurred, switching back to text console\n");
         return drm_fb_helper_force_kernel_mode();
         return 0;
 }
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index b2ebf02e4f8a..59a2bf8592ec 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1402,19 +1402,19 @@ static int i915_load_modeset_init(struct drm_device *dev,
         /* if we have > 1 VGA cards, then disable the radeon VGA resources */
         ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode);
         if (ret)
-                goto destroy_ringbuffer;
+                goto cleanup_ringbuffer;
 
         ret = vga_switcheroo_register_client(dev->pdev,
                                              i915_switcheroo_set_state,
                                              i915_switcheroo_can_switch);
         if (ret)
-                goto destroy_ringbuffer;
+                goto cleanup_vga_client;
 
         intel_modeset_init(dev);
 
         ret = drm_irq_install(dev);
         if (ret)
-                goto destroy_ringbuffer;
+                goto cleanup_vga_switcheroo;
 
         /* Always safe in the mode setting case. */
         /* FIXME: do pre/post-mode set stuff in core KMS code */
@@ -1426,11 +1426,20 @@ static int i915_load_modeset_init(struct drm_device *dev,
 
         I915_WRITE(INSTPM, (1 << 5) | (1 << 21));
 
-        intel_fbdev_init(dev);
+        ret = intel_fbdev_init(dev);
+        if (ret)
+                goto cleanup_irq;
+
         drm_kms_helper_poll_init(dev);
         return 0;
 
-destroy_ringbuffer:
+cleanup_irq:
+        drm_irq_uninstall(dev);
+cleanup_vga_switcheroo:
+        vga_switcheroo_unregister_client(dev->pdev);
+cleanup_vga_client:
+        vga_client_register(dev->pdev, NULL, NULL, NULL);
+cleanup_ringbuffer:
         mutex_lock(&dev->struct_mutex);
         i915_gem_cleanup_ringbuffer(dev);
         mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9ed8ecd95801..276583159847 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -278,6 +278,7 @@ typedef struct drm_i915_private {
         struct mem_block *agp_heap;
         unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds;
         int vblank_pipe;
+        int num_pipe;
 
         /* For hangcheck timer */
 #define DRM_I915_HANGCHECK_PERIOD 75 /* in jiffies */
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 88a1ab7c05ce..cc8131ff319f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3653,6 +3653,11 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
                         pipeconf &= ~PIPEACONF_DOUBLE_WIDE;
         }
 
+        dspcntr |= DISPLAY_PLANE_ENABLE;
+        pipeconf |= PIPEACONF_ENABLE;
+        dpll |= DPLL_VCO_ENABLE;
+
+
         /* Disable the panel fitter if it was on our pipe */
         if (!HAS_PCH_SPLIT(dev) && intel_panel_fitter_pipe(dev) == pipe)
                 I915_WRITE(PFIT_CONTROL, 0);
@@ -3973,6 +3978,13 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
                         DRM_ERROR("failed to pin cursor bo\n");
                         goto fail_locked;
                 }
+
+                ret = i915_gem_object_set_to_gtt_domain(bo, 0);
+                if (ret) {
+                        DRM_ERROR("failed to move cursor bo into the GTT\n");
+                        goto fail_unpin;
+                }
+
                 addr = obj_priv->gtt_offset;
         } else {
                 ret = i915_gem_attach_phys_object(dev, bo, (pipe == 0) ? I915_GEM_PHYS_CURSOR_0 : I915_GEM_PHYS_CURSOR_1);
@@ -4016,6 +4028,8 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
         intel_crtc->cursor_bo = bo;
 
         return 0;
+fail_unpin:
+        i915_gem_object_unpin(bo);
 fail_locked:
         mutex_unlock(&dev->struct_mutex);
 fail:
@@ -5461,7 +5475,6 @@ static void intel_init_display(struct drm_device *dev)
 void intel_modeset_init(struct drm_device *dev)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
-        int num_pipe;
         int i;
 
         drm_mode_config_init(dev);
@@ -5491,13 +5504,13 @@ void intel_modeset_init(struct drm_device *dev)
                 dev->mode_config.fb_base = pci_resource_start(dev->pdev, 0);
 
         if (IS_MOBILE(dev) || IS_I9XX(dev))
-                num_pipe = 2;
+                dev_priv->num_pipe = 2;
         else
-                num_pipe = 1;
+                dev_priv->num_pipe = 1;
         DRM_DEBUG_KMS("%d display pipe%s available.\n",
-                  num_pipe, num_pipe > 1 ? "s" : "");
+                      dev_priv->num_pipe, dev_priv->num_pipe > 1 ? "s" : "");
 
-        for (i = 0; i < num_pipe; i++) {
+        for (i = 0; i < dev_priv->num_pipe; i++) {
                 intel_crtc_init(dev, i);
         }
 
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index f8c76e64bb77..c3c505244e07 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -245,6 +245,7 @@ int intel_fbdev_init(struct drm_device *dev)
 {
         struct intel_fbdev *ifbdev;
         drm_i915_private_t *dev_priv = dev->dev_private;
+        int ret;
 
         ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL);
         if (!ifbdev)
@@ -253,8 +254,13 @@ int intel_fbdev_init(struct drm_device *dev)
         dev_priv->fbdev = ifbdev;
         ifbdev->helper.funcs = &intel_fb_helper_funcs;
 
-        drm_fb_helper_init(dev, &ifbdev->helper, 2,
-                           INTELFB_CONN_LIMIT);
+        ret = drm_fb_helper_init(dev, &ifbdev->helper,
+                                 dev_priv->num_pipe,
+                                 INTELFB_CONN_LIMIT);
+        if (ret) {
+                kfree(ifbdev);
+                return ret;
+        }
 
         drm_fb_helper_single_add_all_connectors(&ifbdev->helper);
         drm_fb_helper_initial_config(&ifbdev->helper, 32);
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
index 9ba2deaadcc7..fc924b649195 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
@@ -834,7 +834,7 @@ init_i2c_device_find(struct drm_device *dev, int i2c_index)
         if (i2c_index == 0x81)
                 i2c_index = (dcb->i2c_default_indices & 0xf0) >> 4;
 
-        if (i2c_index > DCB_MAX_NUM_I2C_ENTRIES) {
+        if (i2c_index >= DCB_MAX_NUM_I2C_ENTRIES) {
                 NV_ERROR(dev, "invalid i2c_index 0x%x\n", i2c_index);
                 return NULL;
         }
@@ -3920,7 +3920,8 @@ int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, b
 
 static uint8_t *
 bios_output_config_match(struct drm_device *dev, struct dcb_entry *dcbent,
-                         uint16_t record, int record_len, int record_nr)
+                         uint16_t record, int record_len, int record_nr,
+                         bool match_link)
 {
         struct drm_nouveau_private *dev_priv = dev->dev_private;
         struct nvbios *bios = &dev_priv->vbios;
@@ -3928,12 +3929,28 @@ bios_output_config_match(struct drm_device *dev, struct dcb_entry *dcbent,
         uint16_t table;
         int i, v;
 
+        switch (dcbent->type) {
+        case OUTPUT_TMDS:
+        case OUTPUT_LVDS:
+        case OUTPUT_DP:
+                break;
+        default:
+                match_link = false;
+                break;
+        }
+
         for (i = 0; i < record_nr; i++, record += record_len) {
                 table = ROM16(bios->data[record]);
                 if (!table)
                         continue;
                 entry = ROM32(bios->data[table]);
 
+                if (match_link) {
+                        v = (entry & 0x00c00000) >> 22;
+                        if (!(v & dcbent->sorconf.link))
+                                continue;
+                }
+
                 v = (entry & 0x000f0000) >> 16;
                 if (!(v & dcbent->or))
                         continue;
@@ -3975,7 +3992,7 @@ nouveau_bios_dp_table(struct drm_device *dev, struct dcb_entry *dcbent,
         *length = table[4];
         return bios_output_config_match(dev, dcbent,
                                         bios->display.dp_table_ptr + table[1],
-                                        table[2], table[3]);
+                                        table[2], table[3], table[0] >= 0x21);
 }
 
 int
@@ -4064,7 +4081,7 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent,
                         dcbent->type, dcbent->location, dcbent->or);
         otable = bios_output_config_match(dev, dcbent, table[1] +
                                           bios->display.script_table_ptr,
-                                          table[2], table[3]);
+                                          table[2], table[3], table[0] >= 0x21);
         if (!otable) {
                 NV_ERROR(dev, "Couldn't find matching output script table\n");
                 return 1;
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index fd4a2df715e9..c9a4a0d2a115 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -377,6 +377,7 @@ int nouveau_fbcon_init(struct drm_device *dev)
 {
         struct drm_nouveau_private *dev_priv = dev->dev_private;
         struct nouveau_fbdev *nfbdev;
+        int ret;
 
         nfbdev = kzalloc(sizeof(struct nouveau_fbdev), GFP_KERNEL);
         if (!nfbdev)
@@ -386,7 +387,12 @@ int nouveau_fbcon_init(struct drm_device *dev)
         dev_priv->nfbdev = nfbdev;
         nfbdev->helper.funcs = &nouveau_fbcon_helper_funcs;
 
-        drm_fb_helper_init(dev, &nfbdev->helper, 2, 4);
+        ret = drm_fb_helper_init(dev, &nfbdev->helper, 2, 4);
+        if (ret) {
+                kfree(nfbdev);
+                return ret;
+        }
+
         drm_fb_helper_single_add_all_connectors(&nfbdev->helper);
         drm_fb_helper_initial_config(&nfbdev->helper, 32);
         return 0;
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 147e59c40151..b02a231d6937 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -779,29 +779,24 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
                         return ret;
         }
 
-        /* map larger RAMIN aperture on NV40 cards */
-        dev_priv->ramin  = NULL;
+        /* Map PRAMIN BAR, or on older cards, the aperture withing BAR0 */
         if (dev_priv->card_type >= NV_40) {
                 int ramin_bar = 2;
                 if (pci_resource_len(dev->pdev, ramin_bar) == 0)
                         ramin_bar = 3;
 
                 dev_priv->ramin_size = pci_resource_len(dev->pdev, ramin_bar);
-                dev_priv->ramin = ioremap(
-                                pci_resource_start(dev->pdev, ramin_bar),
+                dev_priv->ramin =
+                        ioremap(pci_resource_start(dev->pdev, ramin_bar),
                                 dev_priv->ramin_size);
                 if (!dev_priv->ramin) {
-                        NV_ERROR(dev, "Failed to init RAMIN mapping, "
-                                      "limited instance memory available\n");
+                        NV_ERROR(dev, "Failed to PRAMIN BAR");
+                        return -ENOMEM;
                 }
-        }
-
-        /* On older cards (or if the above failed), create a map covering
-         * the BAR0 PRAMIN aperture */
-        if (!dev_priv->ramin) {
+        } else {
                 dev_priv->ramin_size = 1 * 1024 * 1024;
                 dev_priv->ramin = ioremap(mmio_start_offs + NV_RAMIN,
-                                                        dev_priv->ramin_size);
+                                          dev_priv->ramin_size);
                 if (!dev_priv->ramin) {
                         NV_ERROR(dev, "Failed to map BAR0 PRAMIN.\n");
                         return -ENOMEM;
diff --git a/drivers/gpu/drm/nouveau/nv50_fb.c b/drivers/gpu/drm/nouveau/nv50_fb.c
index a95e6941ba88..32611bd30e6d 100644
--- a/drivers/gpu/drm/nouveau/nv50_fb.c
+++ b/drivers/gpu/drm/nouveau/nv50_fb.c
@@ -6,10 +6,16 @@
 int
 nv50_fb_init(struct drm_device *dev)
 {
-        /* This is needed to get meaningful information from 100c90
-         * on traps. No idea what these values mean exactly. */
         struct drm_nouveau_private *dev_priv = dev->dev_private;
 
+        /* Not a clue what this is exactly.  Without pointing it at a
+         * scratch page, VRAM->GART blits with M2MF (as in DDX DFS)
+         * cause IOMMU "read from address 0" errors (rh#561267)
+         */
+        nv_wr32(dev, 0x100c08, dev_priv->gart_info.sg_dummy_bus >> 8);
+
+        /* This is needed to get meaningful information from 100c90
+         * on traps. No idea what these values mean exactly. */
         switch (dev_priv->chipset) {
         case 0x50:
                 nv_wr32(dev, 0x100c90, 0x0707ff);
diff --git a/drivers/gpu/drm/nouveau/nv50_gpio.c b/drivers/gpu/drm/nouveau/nv50_gpio.c
index c61782b314e7..bb47ad737267 100644
--- a/drivers/gpu/drm/nouveau/nv50_gpio.c
+++ b/drivers/gpu/drm/nouveau/nv50_gpio.c
@@ -31,7 +31,7 @@ nv50_gpio_location(struct dcb_gpio_entry *gpio, uint32_t *reg, uint32_t *shift)
 {
         const uint32_t nv50_gpio_reg[4] = { 0xe104, 0xe108, 0xe280, 0xe284 };
 
-        if (gpio->line > 32)
+        if (gpio->line >= 32)
                 return -EINVAL;
 
         *reg = nv50_gpio_reg[gpio->line >> 3];
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 0440c0939bdd..4b6623df3b96 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -41,12 +41,18 @@ void evergreen_fini(struct radeon_device *rdev);
 
 void evergreen_pm_misc(struct radeon_device *rdev)
 {
-        int requested_index = rdev->pm.requested_power_state_index;
-        struct radeon_power_state *ps = &rdev->pm.power_state[requested_index];
-        struct radeon_voltage *voltage = &ps->clock_info[0].voltage;
-
-        if ((voltage->type == VOLTAGE_SW) && voltage->voltage)
-                radeon_atom_set_voltage(rdev, voltage->voltage);
+        int req_ps_idx = rdev->pm.requested_power_state_index;
+        int req_cm_idx = rdev->pm.requested_clock_mode_index;
+        struct radeon_power_state *ps = &rdev->pm.power_state[req_ps_idx];
+        struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage;
+
+        if ((voltage->type == VOLTAGE_SW) && voltage->voltage) {
+                if (voltage->voltage != rdev->pm.current_vddc) {
+                        radeon_atom_set_voltage(rdev, voltage->voltage);
+                        rdev->pm.current_vddc = voltage->voltage;
+                        DRM_DEBUG("Setting: v: %d\n", voltage->voltage);
+                }
+        }
 }
 
 void evergreen_pm_prepare(struct radeon_device *rdev)
@@ -2153,7 +2159,7 @@ int evergreen_init(struct radeon_device *rdev)
         if (r)
                 return r;
 
-        rdev->accel_working = false;
+        rdev->accel_working = true;
         r = evergreen_startup(rdev);
         if (r) {
                 dev_err(rdev->dev, "disabling GPU acceleration\n");
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index cc004b05d63e..cf89aa2eb28c 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -162,6 +162,11 @@ void r100_pm_init_profile(struct radeon_device *rdev)
         rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 0;
         rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0;
         rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0;
+        /* mid sh */
+        rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 0;
+        rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 0;
+        rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0;
+        rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0;
         /* high sh */
         rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 0;
         rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
@@ -172,6 +177,11 @@ void r100_pm_init_profile(struct radeon_device *rdev)
         rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
         rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0;
         rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0;
+        /* mid mh */
+        rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 0;
+        rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
+        rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0;
+        rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0;
         /* high mh */
         rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0;
         rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index 4415a5ee5871..e6c89142bb4d 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -45,9 +45,14 @@ void r420_pm_init_profile(struct radeon_device *rdev)
         rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0;
         /* low sh */
         rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 0;
-        rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 1;
+        rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 0;
         rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0;
         rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0;
+        /* mid sh */
+        rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 0;
+        rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 1;
+        rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0;
+        rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0;
         /* high sh */
         rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 0;
         rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
@@ -58,6 +63,11 @@ void r420_pm_init_profile(struct radeon_device *rdev)
         rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
         rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0;
         rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0;
+        /* mid mh */
+        rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 0;
+        rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
+        rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0;
+        rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0;
         /* high mh */
         rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0;
         rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index e14f59748e65..0e91871f45be 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -291,6 +291,11 @@ void rs780_pm_init_profile(struct radeon_device *rdev)
                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 0;
                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0;
                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0;
+                /* mid sh */
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 0;
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 0;
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0;
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0;
                 /* high sh */
                 rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 0;
                 rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 1;
@@ -301,6 +306,11 @@ void rs780_pm_init_profile(struct radeon_device *rdev)
                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 0;
                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0;
                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0;
+                /* mid mh */
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 0;
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = 0;
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0;
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0;
                 /* high mh */
                 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 0;
                 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 1;
@@ -317,6 +327,11 @@ void rs780_pm_init_profile(struct radeon_device *rdev)
                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 1;
                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0;
                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0;
+                /* mid sh */
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 1;
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 1;
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0;
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0;
                 /* high sh */
                 rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 1;
                 rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 2;
@@ -327,6 +342,11 @@ void rs780_pm_init_profile(struct radeon_device *rdev)
                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 1;
                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0;
                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0;
+                /* mid mh */
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 1;
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = 1;
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0;
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0;
                 /* high mh */
                 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 1;
                 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 2;
@@ -343,6 +363,11 @@ void rs780_pm_init_profile(struct radeon_device *rdev)
                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 2;
                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0;
                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0;
+                /* mid sh */
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 2;
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 2;
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0;
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0;
                 /* high sh */
                 rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 2;
                 rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 3;
@@ -353,6 +378,11 @@ void rs780_pm_init_profile(struct radeon_device *rdev)
                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 0;
                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0;
                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0;
+                /* mid mh */
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 2;
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = 0;
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0;
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0;
                 /* high mh */
                 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 2;
                 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 3;
@@ -375,6 +405,11 @@ void r600_pm_init_profile(struct radeon_device *rdev)
                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0;
                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0;
+                /* mid sh */
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index;
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0;
+                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0;
                 /* high sh */
                 rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index;
                 rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
@@ -385,6 +420,11 @@ void r600_pm_init_profile(struct radeon_device *rdev)
                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0;
                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0;
+                /* mid mh */
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index;
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0;
+                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0;
                 /* high mh */
                 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index;
                 rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index;
@@ -401,7 +441,12 @@ void r600_pm_init_profile(struct radeon_device *rdev)
                         rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = 1;
                         rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = 1;
                         rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0;
-                        rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 1;
+                        rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0;
+                        /* mid sh */
+                        rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = 1;
+                        rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = 1;
+                        rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0;
+                        rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1;
                         /* high sh */
                         rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = 1;
                         rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = 1;
@@ -411,7 +456,12 @@ void r600_pm_init_profile(struct radeon_device *rdev)
                         rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = 2;
                         rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = 2;
                         rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0;
-                        rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 1;
+                        rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0;
+                        /* low mh */
+                        rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = 2;
+                        rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = 2;
+                        rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0;
+                        rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1;
                         /* high mh */
                         rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = 2;
                         rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = 2;
@@ -430,14 +480,30 @@ void r600_pm_init_profile(struct radeon_device *rdev)
                                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx =
                                         r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0);
                                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0;
-                                rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 1;
+                                rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0;
                         } else {
                                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx =
                                         r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);
                                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx =
                                         r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);
                                 rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0;
-                                rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 1;
+                                rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0;
+                        }
+                        /* mid sh */
+                        if (rdev->flags & RADEON_IS_MOBILITY) {
+                                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx =
+                                        r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0);
+                                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx =
+                                        r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0);
+                                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0;
+                                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1;
+                        } else {
+                                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx =
+                                        r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);
+                                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx =
+                                        r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0);
+                                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0;
+                                rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1;
                         }
                         /* high sh */
                         rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx =
@@ -453,14 +519,30 @@ void r600_pm_init_profile(struct radeon_device *rdev)
                                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx =
                                         r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1);
                                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0;
-                                rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 2;
+                                rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0;
                         } else {
                                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx =
                                         r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);
                                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx =
                                         r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);
                                 rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0;
-                                rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 1;
+                                rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0;
+                        }
+                        /* mid mh */
+                        if (rdev->flags & RADEON_IS_MOBILITY) {
+                                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx =
+                                        r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1);
+                                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx =
+                                        r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1);
+                                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0;
+                                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1;
+                        } else {
+                                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx =
+                                        r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);
+                                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx =
+                                        r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1);
+                                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0;
+                                rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1;
                         }
                         /* high mh */
                         rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx =
@@ -475,13 +557,18 @@ void r600_pm_init_profile(struct radeon_device *rdev)
 
 void r600_pm_misc(struct radeon_device *rdev)
 {
-        int requested_index = rdev->pm.requested_power_state_index;
-        struct radeon_power_state *ps = &rdev->pm.power_state[requested_index];
-        struct radeon_voltage *voltage = &ps->clock_info[0].voltage;
-
-        if ((voltage->type == VOLTAGE_SW) && voltage->voltage)
-                radeon_atom_set_voltage(rdev, voltage->voltage);
+        int req_ps_idx = rdev->pm.requested_power_state_index;
+        int req_cm_idx = rdev->pm.requested_clock_mode_index;
+        struct radeon_power_state *ps = &rdev->pm.power_state[req_ps_idx];
+        struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage;
 
+        if ((voltage->type == VOLTAGE_SW) && voltage->voltage) {
+                if (voltage->voltage != rdev->pm.current_vddc) {
+                        radeon_atom_set_voltage(rdev, voltage->voltage);
+                        rdev->pm.current_vddc = voltage->voltage;
+                        DRM_DEBUG("Setting: v: %d\n", voltage->voltage);
+                }
+        }
 }
 
 bool r600_gui_idle(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 5f96fe871b3f..8e1d44ca26ec 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -648,15 +648,18 @@ enum radeon_pm_profile_type {
         PM_PROFILE_DEFAULT,
         PM_PROFILE_AUTO,
         PM_PROFILE_LOW,
+        PM_PROFILE_MID,
         PM_PROFILE_HIGH,
 };
 
 #define PM_PROFILE_DEFAULT_IDX 0
 #define PM_PROFILE_LOW_SH_IDX  1
-#define PM_PROFILE_HIGH_SH_IDX 2
-#define PM_PROFILE_LOW_MH_IDX  3
-#define PM_PROFILE_HIGH_MH_IDX 4
-#define PM_PROFILE_MAX         5
+#define PM_PROFILE_MID_SH_IDX  2
+#define PM_PROFILE_HIGH_SH_IDX 3
+#define PM_PROFILE_LOW_MH_IDX  4
+#define PM_PROFILE_MID_MH_IDX  5
+#define PM_PROFILE_HIGH_MH_IDX 6
+#define PM_PROFILE_MAX         7
 
 struct radeon_pm_profile {
         int dpms_off_ps_idx;
@@ -745,6 +748,7 @@ struct radeon_pm {
         int                     default_power_state_index;
         u32                     current_sclk;
         u32                     current_mclk;
+        u32                     current_vddc;
         struct radeon_i2c_chan *i2c_bus;
         /* selected pm method */
         enum radeon_pm_method     pm_method;
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 4305cd55d0ac..99bd8a9c56b3 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -1833,10 +1833,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
                                                 /* skip invalid modes */
                                                 if (rdev->pm.power_state[state_index].clock_info[mode_index].sclk == 0)
                                                         continue;
-                                                rdev->pm.power_state[state_index].clock_info[mode_index].voltage.type =
-                                                        VOLTAGE_SW;
-                                                rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage =
-                                                        clock_info->usVDDC;
+                                                /* voltage works differently on IGPs */
                                                 mode_index++;
                                         } else if (ASIC_IS_DCE4(rdev)) {
                                                 struct _ATOM_PPLIB_EVERGREEN_CLOCK_INFO *clock_info =
@@ -1969,6 +1966,7 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
 
         rdev->pm.current_power_state_index = rdev->pm.default_power_state_index;
         rdev->pm.current_clock_mode_index = 0;
+        rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.voltage;
 }
 
 void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable)
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index 102c744eaf5a..1bee2f9e24a5 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -2026,6 +2026,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
                                         combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
                                 break;
                         default:
+                                ddc_i2c.valid = false;
                                 break;
                         }
 
@@ -2339,6 +2340,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
                         if (RBIOS8(tv_info + 6) == 'T') {
                                 if (radeon_apply_legacy_tv_quirks(dev)) {
                                         hpd.hpd = RADEON_HPD_NONE;
+                                        ddc_i2c.valid = false;
                                         radeon_add_legacy_encoder(dev,
                                                                   radeon_get_encoder_id
                                                                   (dev,
@@ -2455,7 +2457,7 @@ default_mode:
         rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk;
         rdev->pm.power_state[state_index].default_clock_mode = &rdev->pm.power_state[state_index].clock_info[0];
         if ((state_index > 0) &&
-            (rdev->pm.power_state[0].clock_info[0].voltage.type = VOLTAGE_GPIO))
+            (rdev->pm.power_state[0].clock_info[0].voltage.type == VOLTAGE_GPIO))
                 rdev->pm.power_state[state_index].clock_info[0].voltage =
                         rdev->pm.power_state[0].clock_info[0].voltage;
         else
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 1006549d1570..8154cdf796e4 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -284,8 +284,7 @@ static const char *connector_names[15] = {
         "eDP",
 };
 
-static const char *hpd_names[7] = {
-        "NONE",
+static const char *hpd_names[6] = {
         "HPD1",
         "HPD2",
         "HPD3",
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 902d1731a652..e166fe4d7c30 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -45,9 +45,10 @@
  * - 2.2.0 - add r6xx/r7xx const buffer support
  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
  * - 2.4.0 - add crtc id query
+ * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
  */
 #define KMS_DRIVER_MAJOR        2
-#define KMS_DRIVER_MINOR        4
+#define KMS_DRIVER_MINOR        5
 #define KMS_DRIVER_PATCHLEVEL   0
 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
 int radeon_driver_unload_kms(struct drm_device *dev);
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index e192acfbf0cd..dc1634bb0c11 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -363,6 +363,7 @@ int radeon_fbdev_init(struct radeon_device *rdev)
 {
         struct radeon_fbdev *rfbdev;
         int bpp_sel = 32;
+        int ret;
 
         /* select 8 bpp console on RN50 or 16MB cards */
         if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
@@ -376,9 +377,14 @@ int radeon_fbdev_init(struct radeon_device *rdev)
         rdev->mode_info.rfbdev = rfbdev;
         rfbdev->helper.funcs = &radeon_fb_helper_funcs;
 
-        drm_fb_helper_init(rdev->ddev, &rfbdev->helper,
-                           rdev->num_crtc,
-                           RADEONFB_CONN_LIMIT);
+        ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper,
+                                 rdev->num_crtc,
+                                 RADEONFB_CONN_LIMIT);
+        if (ret) {
+                kfree(rfbdev);
+                return ret;
+        }
+
         drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
         drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
         return 0;
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index 04068352ccd2..6a70c0dc7f92 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -118,7 +118,11 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
                 value = rdev->num_z_pipes;
                 break;
         case RADEON_INFO_ACCEL_WORKING:
-                value = rdev->accel_working;
+                /* xf86-video-ati 6.13.0 relies on this being false for evergreen */
+                if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK))
+                        value = false;
+                else
+                        value = rdev->accel_working;
                 break;
         case RADEON_INFO_CRTC_FROM_ID:
                 for (i = 0, found = 0; i < rdev->num_crtc; i++) {
@@ -134,6 +138,9 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
                         return -EINVAL;
                 }
                 break;
+        case RADEON_INFO_ACCEL_WORKING2:
+                value = rdev->accel_working;
+                break;
         default:
                 DRM_DEBUG("Invalid request %d\n", info->request);
                 return -EINVAL;
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
index 5a13b3eeef19..5b07b8848e09 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -1168,6 +1168,17 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder
         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
         struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv;
         bool color = true;
+        struct drm_crtc *crtc;
+
+        /* find out if crtc2 is in use or if this encoder is using it */
+        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+                struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
+                if ((radeon_crtc->crtc_id == 1) && crtc->enabled) {
+                        if (encoder->crtc != crtc) {
+                                return connector_status_disconnected;
+                        }
+                }
+        }
 
         if (connector->connector_type == DRM_MODE_CONNECTOR_SVIDEO ||
             connector->connector_type == DRM_MODE_CONNECTOR_Composite ||
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 02281269a881..63f679a04b25 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -33,6 +33,14 @@
 #define RADEON_WAIT_VBLANK_TIMEOUT 200
 #define RADEON_WAIT_IDLE_TIMEOUT 200
 
+static const char *radeon_pm_state_type_name[5] = {
+        "Default",
+        "Powersave",
+        "Battery",
+        "Balanced",
+        "Performance",
+};
+
 static void radeon_dynpm_idle_work_handler(struct work_struct *work);
 static int radeon_debugfs_pm_init(struct radeon_device *rdev);
 static bool radeon_pm_in_vbl(struct radeon_device *rdev);
@@ -84,9 +92,9 @@ static void radeon_pm_update_profile(struct radeon_device *rdev)
                                 rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX;
                 } else {
                         if (rdev->pm.active_crtc_count > 1)
-                                rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX;
+                                rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX;
                         else
-                                rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX;
+                                rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX;
                 }
                 break;
         case PM_PROFILE_LOW:
@@ -95,6 +103,12 @@ static void radeon_pm_update_profile(struct radeon_device *rdev)
                 else
                         rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX;
                 break;
+        case PM_PROFILE_MID:
+                if (rdev->pm.active_crtc_count > 1)
+                        rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX;
+                else
+                        rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX;
+                break;
         case PM_PROFILE_HIGH:
                 if (rdev->pm.active_crtc_count > 1)
                         rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX;
@@ -127,15 +141,6 @@ static void radeon_unmap_vram_bos(struct radeon_device *rdev)
                 if (bo->tbo.mem.mem_type == TTM_PL_VRAM)
                         ttm_bo_unmap_virtual(&bo->tbo);
         }
-
-        if (rdev->gart.table.vram.robj)
-                ttm_bo_unmap_virtual(&rdev->gart.table.vram.robj->tbo);
-
-        if (rdev->stollen_vga_memory)
-                ttm_bo_unmap_virtual(&rdev->stollen_vga_memory->tbo);
-
-        if (rdev->r600_blit.shader_obj)
-                ttm_bo_unmap_virtual(&rdev->r600_blit.shader_obj->tbo);
 }
 
 static void radeon_sync_with_vblank(struct radeon_device *rdev)
@@ -281,6 +286,42 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev)
         mutex_unlock(&rdev->ddev->struct_mutex);
 }
 
+static void radeon_pm_print_states(struct radeon_device *rdev)
+{
+        int i, j;
+        struct radeon_power_state *power_state;
+        struct radeon_pm_clock_info *clock_info;
+
+        DRM_DEBUG("%d Power State(s)\n", rdev->pm.num_power_states);
+        for (i = 0; i < rdev->pm.num_power_states; i++) {
+                power_state = &rdev->pm.power_state[i];
+                DRM_DEBUG("State %d: %s\n", i,
+                        radeon_pm_state_type_name[power_state->type]);
+                if (i == rdev->pm.default_power_state_index)
+                        DRM_DEBUG("\tDefault");
+                if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP))
+                        DRM_DEBUG("\t%d PCIE Lanes\n", power_state->pcie_lanes);
+                if (power_state->flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY)
+                        DRM_DEBUG("\tSingle display only\n");
+                DRM_DEBUG("\t%d Clock Mode(s)\n", power_state->num_clock_modes);
+                for (j = 0; j < power_state->num_clock_modes; j++) {
+                        clock_info = &(power_state->clock_info[j]);
+                        if (rdev->flags & RADEON_IS_IGP)
+                                DRM_DEBUG("\t\t%d e: %d%s\n",
+                                        j,
+                                        clock_info->sclk * 10,
+                                        clock_info->flags & RADEON_PM_MODE_NO_DISPLAY ? "\tNo display only" : "");
+                        else
+                                DRM_DEBUG("\t\t%d e: %d\tm: %d\tv: %d%s\n",
+                                        j,
+                                        clock_info->sclk * 10,
+                                        clock_info->mclk * 10,
+                                        clock_info->voltage.voltage,
+                                        clock_info->flags & RADEON_PM_MODE_NO_DISPLAY ? "\tNo display only" : "");
+                }
+        }
+}
+
 static ssize_t radeon_get_pm_profile(struct device *dev,
                                      struct device_attribute *attr,
                                      char *buf)
@@ -311,6 +352,8 @@ static ssize_t radeon_set_pm_profile(struct device *dev,
                         rdev->pm.profile = PM_PROFILE_AUTO;
                 else if (strncmp("low", buf, strlen("low")) == 0)
                         rdev->pm.profile = PM_PROFILE_LOW;
+                else if (strncmp("mid", buf, strlen("mid")) == 0)
+                        rdev->pm.profile = PM_PROFILE_MID;
                 else if (strncmp("high", buf, strlen("high")) == 0)
                         rdev->pm.profile = PM_PROFILE_HIGH;
                 else {
@@ -377,15 +420,19 @@ void radeon_pm_suspend(struct radeon_device *rdev)
 {
         mutex_lock(&rdev->pm.mutex);
         cancel_delayed_work(&rdev->pm.dynpm_idle_work);
-        rdev->pm.current_power_state_index = -1;
-        rdev->pm.current_clock_mode_index = -1;
-        rdev->pm.current_sclk = 0;
-        rdev->pm.current_mclk = 0;
         mutex_unlock(&rdev->pm.mutex);
 }
 
 void radeon_pm_resume(struct radeon_device *rdev)
 {
+        /* asic init will reset the default power state */
+        mutex_lock(&rdev->pm.mutex);
+        rdev->pm.current_power_state_index = rdev->pm.default_power_state_index;
+        rdev->pm.current_clock_mode_index = 0;
+        rdev->pm.current_sclk = rdev->clock.default_sclk;
+        rdev->pm.current_mclk = rdev->clock.default_mclk;
+        rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.voltage;
+        mutex_unlock(&rdev->pm.mutex);
         radeon_pm_compute_clocks(rdev);
 }
 
@@ -394,32 +441,24 @@ int radeon_pm_init(struct radeon_device *rdev)
         int ret;
         /* default to profile method */
         rdev->pm.pm_method = PM_METHOD_PROFILE;
+        rdev->pm.profile = PM_PROFILE_DEFAULT;
         rdev->pm.dynpm_state = DYNPM_STATE_DISABLED;
         rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE;
         rdev->pm.dynpm_can_upclock = true;
         rdev->pm.dynpm_can_downclock = true;
-        rdev->pm.current_sclk = 0;
-        rdev->pm.current_mclk = 0;
+        rdev->pm.current_sclk = rdev->clock.default_sclk;
+        rdev->pm.current_mclk = rdev->clock.default_mclk;
 
         if (rdev->bios) {
                 if (rdev->is_atom_bios)
                         radeon_atombios_get_power_modes(rdev);
                 else
                         radeon_combios_get_power_modes(rdev);
+                radeon_pm_print_states(rdev);
                 radeon_pm_init_profile(rdev);
-                rdev->pm.current_power_state_index = -1;
-                rdev->pm.current_clock_mode_index = -1;
         }
 
         if (rdev->pm.num_power_states > 1) {
-                if (rdev->pm.pm_method == PM_METHOD_PROFILE) {
-                        mutex_lock(&rdev->pm.mutex);
-                        rdev->pm.profile = PM_PROFILE_DEFAULT;
-                        radeon_pm_update_profile(rdev);
-                        radeon_pm_set_clocks(rdev);
-                        mutex_unlock(&rdev->pm.mutex);
-                }
-
                 /* where's the best place to put these? */
                 ret = device_create_file(rdev->dev, &dev_attr_power_profile);
                 if (ret)
@@ -705,6 +744,8 @@ static int radeon_debugfs_pm_info(struct seq_file *m, void *data)
         seq_printf(m, "default memory clock: %u0 kHz\n", rdev->clock.default_mclk);
         if (rdev->asic->get_memory_clock)
                 seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev));
+        if (rdev->pm.current_vddc)
+                seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc);
         if (rdev->asic->get_pcie_lanes)
                 seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev));
 
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 33952da65340..cec536c222c5 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -44,12 +44,18 @@ void rv770_fini(struct radeon_device *rdev);
 
 void rv770_pm_misc(struct radeon_device *rdev)
 {
-        int requested_index = rdev->pm.requested_power_state_index;
-        struct radeon_power_state *ps = &rdev->pm.power_state[requested_index];
-        struct radeon_voltage *voltage = &ps->clock_info[0].voltage;
-
-        if ((voltage->type == VOLTAGE_SW) && voltage->voltage)
-                radeon_atom_set_voltage(rdev, voltage->voltage);
+        int req_ps_idx = rdev->pm.requested_power_state_index;
+        int req_cm_idx = rdev->pm.requested_clock_mode_index;
+        struct radeon_power_state *ps = &rdev->pm.power_state[req_ps_idx];
+        struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage;
+
+        if ((voltage->type == VOLTAGE_SW) && voltage->voltage) {
+                if (voltage->voltage != rdev->pm.current_vddc) {
+                        radeon_atom_set_voltage(rdev, voltage->voltage);
+                        rdev->pm.current_vddc = voltage->voltage;
+                        DRM_DEBUG("Setting: v: %d\n", voltage->voltage);
+                }
+        }
 }
 
 /*
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
index bdd67cf83315..8e396850513c 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -644,6 +644,7 @@ int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
         ret = copy_from_user(cmd, user_cmd, arg->command_size);
 
         if (unlikely(ret != 0)) {
+                ret = -EFAULT;
                 DRM_ERROR("Failed copying commands.\n");
                 goto out_commit;
         }
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
index f8fbbc67a406..8612378b131e 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
@@ -597,8 +597,10 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
 
         ret = copy_from_user(srf->sizes, user_sizes,
                              srf->num_sizes * sizeof(*srf->sizes));
-        if (unlikely(ret != 0))
+        if (unlikely(ret != 0)) {
+                ret = -EFAULT;
                 goto out_err1;
+        }
 
         if (srf->scanout &&
             srf->num_sizes == 1 &&
@@ -697,9 +699,11 @@ int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
         if (user_sizes)
                 ret = copy_to_user(user_sizes, srf->sizes,
                                    srf->num_sizes * sizeof(*srf->sizes));
-        if (unlikely(ret != 0))
+        if (unlikely(ret != 0)) {
                 DRM_ERROR("copy_to_user failed %p %u\n",
                           user_sizes, srf->num_sizes);
+                ret = -EFAULT;
+        }
 out_bad_resource:
 out_no_reference:
         ttm_base_object_unref(&base);