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-rw-r--r--drivers/gpu/drm/i915/intel_dp.c24
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h2
2 files changed, 21 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1474f84fdbd0..42bdca47c5d6 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -37,6 +37,7 @@
37#include "i915_drm.h" 37#include "i915_drm.h"
38#include "i915_drv.h" 38#include "i915_drv.h"
39 39
40#define DP_RECEIVER_CAP_SIZE 0xf
40#define DP_LINK_STATUS_SIZE 6 41#define DP_LINK_STATUS_SIZE 6
41#define DP_LINK_CHECK_TIMEOUT (10 * 1000) 42#define DP_LINK_CHECK_TIMEOUT (10 * 1000)
42 43
@@ -1964,12 +1965,25 @@ static bool
1964intel_dp_get_dpcd(struct intel_dp *intel_dp) 1965intel_dp_get_dpcd(struct intel_dp *intel_dp)
1965{ 1966{
1966 if (intel_dp_aux_native_read_retry(intel_dp, 0x000, intel_dp->dpcd, 1967 if (intel_dp_aux_native_read_retry(intel_dp, 0x000, intel_dp->dpcd,
1967 sizeof(intel_dp->dpcd)) && 1968 sizeof(intel_dp->dpcd)) == 0)
1968 (intel_dp->dpcd[DP_DPCD_REV] != 0)) { 1969 return false; /* aux transfer failed */
1969 return true;
1970 }
1971 1970
1972 return false; 1971 if (intel_dp->dpcd[DP_DPCD_REV] == 0)
1972 return false; /* DPCD not present */
1973
1974 if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
1975 DP_DWN_STRM_PORT_PRESENT))
1976 return true; /* native DP sink */
1977
1978 if (intel_dp->dpcd[DP_DPCD_REV] == 0x10)
1979 return true; /* no per-port downstream info */
1980
1981 if (intel_dp_aux_native_read_retry(intel_dp, DP_DOWNSTREAM_PORT_0,
1982 intel_dp->downstream_ports,
1983 DP_MAX_DOWNSTREAM_PORTS) == 0)
1984 return false; /* downstream port status fetch failed */
1985
1986 return true;
1973} 1987}
1974 1988
1975static void 1989static void
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 351fd7179cd7..79f8ed66574e 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -332,6 +332,7 @@ struct intel_hdmi {
332}; 332};
333 333
334#define DP_RECEIVER_CAP_SIZE 0xf 334#define DP_RECEIVER_CAP_SIZE 0xf
335#define DP_MAX_DOWNSTREAM_PORTS 0x10
335#define DP_LINK_CONFIGURATION_SIZE 9 336#define DP_LINK_CONFIGURATION_SIZE 9
336 337
337struct intel_dp { 338struct intel_dp {
@@ -346,6 +347,7 @@ struct intel_dp {
346 uint8_t link_bw; 347 uint8_t link_bw;
347 uint8_t lane_count; 348 uint8_t lane_count;
348 uint8_t dpcd[DP_RECEIVER_CAP_SIZE]; 349 uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
350 uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
349 struct i2c_adapter adapter; 351 struct i2c_adapter adapter;
350 struct i2c_algo_dp_aux_data algo; 352 struct i2c_algo_dp_aux_data algo;
351 bool is_pch_edp; 353 bool is_pch_edp;