diff options
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 17 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_irq_kms.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_reg.h | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs600.c | 18 |
5 files changed, 49 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index ed5e983d21e9..b438b520ee7f 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -186,7 +186,7 @@ static inline uint32_t r100_irq_ack(struct radeon_device *rdev) | |||
186 | 186 | ||
187 | int r100_irq_process(struct radeon_device *rdev) | 187 | int r100_irq_process(struct radeon_device *rdev) |
188 | { | 188 | { |
189 | uint32_t status; | 189 | uint32_t status, msi_rearm; |
190 | 190 | ||
191 | status = r100_irq_ack(rdev); | 191 | status = r100_irq_ack(rdev); |
192 | if (!status) { | 192 | if (!status) { |
@@ -209,6 +209,21 @@ int r100_irq_process(struct radeon_device *rdev) | |||
209 | } | 209 | } |
210 | status = r100_irq_ack(rdev); | 210 | status = r100_irq_ack(rdev); |
211 | } | 211 | } |
212 | if (rdev->msi_enabled) { | ||
213 | switch (rdev->family) { | ||
214 | case CHIP_RS400: | ||
215 | case CHIP_RS480: | ||
216 | msi_rearm = RREG32(RADEON_AIC_CNTL) & ~RS400_MSI_REARM; | ||
217 | WREG32(RADEON_AIC_CNTL, msi_rearm); | ||
218 | WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM); | ||
219 | break; | ||
220 | default: | ||
221 | msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN; | ||
222 | WREG32(RADEON_MSI_REARM_EN, msi_rearm); | ||
223 | WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN); | ||
224 | break; | ||
225 | } | ||
226 | } | ||
212 | return IRQ_HANDLED; | 227 | return IRQ_HANDLED; |
213 | } | 228 | } |
214 | 229 | ||
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 8b60e36b20ba..ea3efd7ae85b 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -784,6 +784,7 @@ struct radeon_device { | |||
784 | const struct firmware *me_fw; /* all family ME firmware */ | 784 | const struct firmware *me_fw; /* all family ME firmware */ |
785 | const struct firmware *pfp_fw; /* r6/700 PFP firmware */ | 785 | const struct firmware *pfp_fw; /* r6/700 PFP firmware */ |
786 | struct r600_blit r600_blit; | 786 | struct r600_blit r600_blit; |
787 | int msi_enabled; /* msi enabled */ | ||
787 | }; | 788 | }; |
788 | 789 | ||
789 | int radeon_device_init(struct radeon_device *rdev, | 790 | int radeon_device_init(struct radeon_device *rdev, |
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c index 8e0a8759e428..a0fe6232dcb6 100644 --- a/drivers/gpu/drm/radeon/radeon_irq_kms.c +++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c | |||
@@ -92,6 +92,13 @@ int radeon_irq_kms_init(struct radeon_device *rdev) | |||
92 | if (r) { | 92 | if (r) { |
93 | return r; | 93 | return r; |
94 | } | 94 | } |
95 | /* enable msi */ | ||
96 | rdev->msi_enabled = 0; | ||
97 | if (rdev->family >= CHIP_RV380) { | ||
98 | int ret = pci_enable_msi(rdev->pdev); | ||
99 | if (!ret) | ||
100 | rdev->msi_enabled = 1; | ||
101 | } | ||
95 | drm_irq_install(rdev->ddev); | 102 | drm_irq_install(rdev->ddev); |
96 | rdev->irq.installed = true; | 103 | rdev->irq.installed = true; |
97 | DRM_INFO("radeon: irq initialized.\n"); | 104 | DRM_INFO("radeon: irq initialized.\n"); |
@@ -103,5 +110,7 @@ void radeon_irq_kms_fini(struct radeon_device *rdev) | |||
103 | if (rdev->irq.installed) { | 110 | if (rdev->irq.installed) { |
104 | rdev->irq.installed = false; | 111 | rdev->irq.installed = false; |
105 | drm_irq_uninstall(rdev->ddev); | 112 | drm_irq_uninstall(rdev->ddev); |
113 | if (rdev->msi_enabled) | ||
114 | pci_disable_msi(rdev->pdev); | ||
106 | } | 115 | } |
107 | } | 116 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h index bfa1ab9c93e1..29ab75903ec1 100644 --- a/drivers/gpu/drm/radeon/radeon_reg.h +++ b/drivers/gpu/drm/radeon/radeon_reg.h | |||
@@ -290,6 +290,8 @@ | |||
290 | #define RADEON_BUS_CNTL 0x0030 | 290 | #define RADEON_BUS_CNTL 0x0030 |
291 | # define RADEON_BUS_MASTER_DIS (1 << 6) | 291 | # define RADEON_BUS_MASTER_DIS (1 << 6) |
292 | # define RADEON_BUS_BIOS_DIS_ROM (1 << 12) | 292 | # define RADEON_BUS_BIOS_DIS_ROM (1 << 12) |
293 | # define RS600_BUS_MASTER_DIS (1 << 14) | ||
294 | # define RS600_MSI_REARM (1 << 20) /* rs600/rs690/rs740 */ | ||
293 | # define RADEON_BUS_RD_DISCARD_EN (1 << 24) | 295 | # define RADEON_BUS_RD_DISCARD_EN (1 << 24) |
294 | # define RADEON_BUS_RD_ABORT_EN (1 << 25) | 296 | # define RADEON_BUS_RD_ABORT_EN (1 << 25) |
295 | # define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28) | 297 | # define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28) |
@@ -297,6 +299,9 @@ | |||
297 | # define RADEON_BUS_READ_BURST (1 << 30) | 299 | # define RADEON_BUS_READ_BURST (1 << 30) |
298 | #define RADEON_BUS_CNTL1 0x0034 | 300 | #define RADEON_BUS_CNTL1 0x0034 |
299 | # define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4) | 301 | # define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4) |
302 | /* rv370/rv380, rv410, r423/r430/r480, r5xx */ | ||
303 | #define RADEON_MSI_REARM_EN 0x0160 | ||
304 | # define RV370_MSI_REARM_EN (1 << 0) | ||
300 | 305 | ||
301 | /* #define RADEON_PCIE_INDEX 0x0030 */ | 306 | /* #define RADEON_PCIE_INDEX 0x0030 */ |
302 | /* #define RADEON_PCIE_DATA 0x0034 */ | 307 | /* #define RADEON_PCIE_DATA 0x0034 */ |
@@ -3311,6 +3316,7 @@ | |||
3311 | #define RADEON_AIC_CNTL 0x01d0 | 3316 | #define RADEON_AIC_CNTL 0x01d0 |
3312 | # define RADEON_PCIGART_TRANSLATE_EN (1 << 0) | 3317 | # define RADEON_PCIGART_TRANSLATE_EN (1 << 0) |
3313 | # define RADEON_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1) | 3318 | # define RADEON_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1) |
3319 | # define RS400_MSI_REARM (1 << 3) /* rs400/rs480 */ | ||
3314 | #define RADEON_AIC_LO_ADDR 0x01dc | 3320 | #define RADEON_AIC_LO_ADDR 0x01dc |
3315 | #define RADEON_AIC_PT_BASE 0x01d8 | 3321 | #define RADEON_AIC_PT_BASE 0x01d8 |
3316 | #define RADEON_AIC_HI_ADDR 0x01e0 | 3322 | #define RADEON_AIC_HI_ADDR 0x01e0 |
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 10dfa78762da..942754c39be9 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -242,7 +242,7 @@ void rs600_irq_disable(struct radeon_device *rdev) | |||
242 | 242 | ||
243 | int rs600_irq_process(struct radeon_device *rdev) | 243 | int rs600_irq_process(struct radeon_device *rdev) |
244 | { | 244 | { |
245 | uint32_t status; | 245 | uint32_t status, msi_rearm; |
246 | uint32_t r500_disp_int; | 246 | uint32_t r500_disp_int; |
247 | 247 | ||
248 | status = rs600_irq_ack(rdev, &r500_disp_int); | 248 | status = rs600_irq_ack(rdev, &r500_disp_int); |
@@ -260,6 +260,22 @@ int rs600_irq_process(struct radeon_device *rdev) | |||
260 | drm_handle_vblank(rdev->ddev, 1); | 260 | drm_handle_vblank(rdev->ddev, 1); |
261 | status = rs600_irq_ack(rdev, &r500_disp_int); | 261 | status = rs600_irq_ack(rdev, &r500_disp_int); |
262 | } | 262 | } |
263 | if (rdev->msi_enabled) { | ||
264 | switch (rdev->family) { | ||
265 | case CHIP_RS600: | ||
266 | case CHIP_RS690: | ||
267 | case CHIP_RS740: | ||
268 | msi_rearm = RREG32(RADEON_BUS_CNTL) & ~RS600_MSI_REARM; | ||
269 | WREG32(RADEON_BUS_CNTL, msi_rearm); | ||
270 | WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM); | ||
271 | break; | ||
272 | default: | ||
273 | msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN; | ||
274 | WREG32(RADEON_MSI_REARM_EN, msi_rearm); | ||
275 | WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN); | ||
276 | break; | ||
277 | } | ||
278 | } | ||
263 | return IRQ_HANDLED; | 279 | return IRQ_HANDLED; |
264 | } | 280 | } |
265 | 281 | ||