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-rw-r--r--drivers/gpu/drm/radeon/r100.c8
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c6
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c6
-rw-r--r--drivers/gpu/drm/radeon/radeon_fb.c7
-rw-r--r--drivers/gpu/drm/radeon/radeon_irq_kms.c6
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_encoders.c5
6 files changed, 30 insertions, 8 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 7bea923b1b29..5fe12c02d2dd 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -2135,9 +2135,11 @@ void r100_bandwidth_update(struct radeon_device *rdev)
2135 mode1 = &rdev->mode_info.crtcs[0]->base.mode; 2135 mode1 = &rdev->mode_info.crtcs[0]->base.mode;
2136 pixel_bytes1 = rdev->mode_info.crtcs[0]->base.fb->bits_per_pixel / 8; 2136 pixel_bytes1 = rdev->mode_info.crtcs[0]->base.fb->bits_per_pixel / 8;
2137 } 2137 }
2138 if (rdev->mode_info.crtcs[1]->base.enabled) { 2138 if (!(rdev->flags & RADEON_SINGLE_CRTC)) {
2139 mode2 = &rdev->mode_info.crtcs[1]->base.mode; 2139 if (rdev->mode_info.crtcs[1]->base.enabled) {
2140 pixel_bytes2 = rdev->mode_info.crtcs[1]->base.fb->bits_per_pixel / 8; 2140 mode2 = &rdev->mode_info.crtcs[1]->base.mode;
2141 pixel_bytes2 = rdev->mode_info.crtcs[1]->base.fb->bits_per_pixel / 8;
2142 }
2141 } 2143 }
2142 2144
2143 min_mem_eff.full = rfixed_const_8(0); 2145 min_mem_eff.full = rfixed_const_8(0);
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 5d8141b13765..44cfcfdf1352 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -724,7 +724,11 @@ int radeon_modeset_init(struct radeon_device *rdev)
724 if (ret) { 724 if (ret) {
725 return ret; 725 return ret;
726 } 726 }
727 /* allocate crtcs - TODO single crtc */ 727
728 if (rdev->flags & RADEON_SINGLE_CRTC)
729 num_crtc = 1;
730
731 /* allocate crtcs */
728 for (i = 0; i < num_crtc; i++) { 732 for (i = 0; i < num_crtc; i++) {
729 radeon_crtc_init(rdev->ddev, i); 733 radeon_crtc_init(rdev->ddev, i);
730 } 734 }
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index 621646752cd2..a65ab1a0dad2 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -1345,6 +1345,7 @@ radeon_atombios_set_dig_info(struct radeon_encoder *radeon_encoder)
1345void 1345void
1346radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t supported_device) 1346radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t supported_device)
1347{ 1347{
1348 struct radeon_device *rdev = dev->dev_private;
1348 struct drm_encoder *encoder; 1349 struct drm_encoder *encoder;
1349 struct radeon_encoder *radeon_encoder; 1350 struct radeon_encoder *radeon_encoder;
1350 1351
@@ -1364,7 +1365,10 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su
1364 return; 1365 return;
1365 1366
1366 encoder = &radeon_encoder->base; 1367 encoder = &radeon_encoder->base;
1367 encoder->possible_crtcs = 0x3; 1368 if (rdev->flags & RADEON_SINGLE_CRTC)
1369 encoder->possible_crtcs = 0x1;
1370 else
1371 encoder->possible_crtcs = 0x3;
1368 encoder->possible_clones = 0; 1372 encoder->possible_clones = 0;
1369 1373
1370 radeon_encoder->enc_priv = NULL; 1374 radeon_encoder->enc_priv = NULL;
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index 1ba704eedefb..325e40b5e0b6 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -146,6 +146,7 @@ int radeonfb_create(struct drm_device *dev,
146 unsigned long tmp; 146 unsigned long tmp;
147 bool fb_tiled = false; /* useful for testing */ 147 bool fb_tiled = false; /* useful for testing */
148 u32 tiling_flags = 0; 148 u32 tiling_flags = 0;
149 int crtc_count;
149 150
150 mode_cmd.width = surface_width; 151 mode_cmd.width = surface_width;
151 mode_cmd.height = surface_height; 152 mode_cmd.height = surface_height;
@@ -217,7 +218,11 @@ int radeonfb_create(struct drm_device *dev,
217 rfbdev = info->par; 218 rfbdev = info->par;
218 rfbdev->helper.funcs = &radeon_fb_helper_funcs; 219 rfbdev->helper.funcs = &radeon_fb_helper_funcs;
219 rfbdev->helper.dev = dev; 220 rfbdev->helper.dev = dev;
220 ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, 2, 221 if (rdev->flags & RADEON_SINGLE_CRTC)
222 crtc_count = 1;
223 else
224 crtc_count = 2;
225 ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, crtc_count,
221 RADEONFB_CONN_LIMIT); 226 RADEONFB_CONN_LIMIT);
222 if (ret) 227 if (ret)
223 goto out_unref; 228 goto out_unref;
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
index 1841145a7c4f..8e0a8759e428 100644
--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
@@ -83,8 +83,12 @@ void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
83int radeon_irq_kms_init(struct radeon_device *rdev) 83int radeon_irq_kms_init(struct radeon_device *rdev)
84{ 84{
85 int r = 0; 85 int r = 0;
86 int num_crtc = 2;
86 87
87 r = drm_vblank_init(rdev->ddev, 2); 88 if (rdev->flags & RADEON_SINGLE_CRTC)
89 num_crtc = 1;
90
91 r = drm_vblank_init(rdev->ddev, num_crtc);
88 if (r) { 92 if (r) {
89 return r; 93 return r;
90 } 94 }
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
index b1547f700d73..0ebbd292b90c 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -1318,7 +1318,10 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t
1318 return; 1318 return;
1319 1319
1320 encoder = &radeon_encoder->base; 1320 encoder = &radeon_encoder->base;
1321 encoder->possible_crtcs = 0x3; 1321 if (rdev->flags & RADEON_SINGLE_CRTC)
1322 encoder->possible_crtcs = 0x1;
1323 else
1324 encoder->possible_crtcs = 0x3;
1322 encoder->possible_clones = 0; 1325 encoder->possible_clones = 0;
1323 1326
1324 radeon_encoder->enc_priv = NULL; 1327 radeon_encoder->enc_priv = NULL;