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-rw-r--r--drivers/gpu/drm/Kconfig7
-rw-r--r--drivers/gpu/drm/drm_crtc_helper.c19
-rw-r--r--drivers/gpu/drm/drm_drv.c3
-rw-r--r--drivers/gpu/drm/drm_stub.c26
-rw-r--r--drivers/gpu/drm/drm_sysfs.c3
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c21
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c2
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h26
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c200
-rw-r--r--drivers/gpu/drm/i915/i915_gem_debugfs.c93
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c112
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c2
-rw-r--r--drivers/gpu/drm/i915/i915_opregion.c15
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c24
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c2
-rw-r--r--drivers/gpu/drm/i915/intel_display.c42
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h4
-rw-r--r--drivers/gpu/drm/i915/intel_fb.c6
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c40
-rw-r--r--drivers/gpu/drm/i915/intel_i2c.c17
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c54
-rw-r--r--drivers/gpu/drm/i915/intel_modes.c6
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c22
-rw-r--r--drivers/gpu/drm/r128/r128_cce.c6
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.h3
-rw-r--r--drivers/gpu/drm/via/via_dma.c12
27 files changed, 650 insertions, 119 deletions
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 3a22eb9be378..4cd35d8fd799 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -71,6 +71,7 @@ config DRM_I915
71 select FB_CFB_COPYAREA 71 select FB_CFB_COPYAREA
72 select FB_CFB_IMAGEBLIT 72 select FB_CFB_IMAGEBLIT
73 select FB 73 select FB
74 select FRAMEBUFFER_CONSOLE if !EMBEDDED
74 tristate "i915 driver" 75 tristate "i915 driver"
75 help 76 help
76 Choose this option if you have a system that has Intel 830M, 845G, 77 Choose this option if you have a system that has Intel 830M, 845G,
@@ -83,6 +84,12 @@ config DRM_I915
83config DRM_I915_KMS 84config DRM_I915_KMS
84 bool "Enable modesetting on intel by default" 85 bool "Enable modesetting on intel by default"
85 depends on DRM_I915 86 depends on DRM_I915
87 # i915 KMS depends on ACPI_VIDEO when ACPI is enabled
88 # but for select to work, need to select ACPI_VIDEO's dependencies, ick
89 select VIDEO_OUTPUT_CONTROL if ACPI
90 select BACKLIGHT_CLASS_DEVICE if ACPI
91 select INPUT if ACPI
92 select ACPI_VIDEO if ACPI
86 help 93 help
87 Choose this option if you want kernel modesetting enabled by default, 94 Choose this option if you want kernel modesetting enabled by default,
88 and you have a new enough userspace to support this. Running old 95 and you have a new enough userspace to support this. Running old
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index a04639dc633d..45890447feec 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -561,7 +561,6 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,
561 int saved_x, saved_y; 561 int saved_x, saved_y;
562 struct drm_encoder *encoder; 562 struct drm_encoder *encoder;
563 bool ret = true; 563 bool ret = true;
564 bool depth_changed, bpp_changed;
565 564
566 adjusted_mode = drm_mode_duplicate(dev, mode); 565 adjusted_mode = drm_mode_duplicate(dev, mode);
567 566
@@ -570,15 +569,6 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,
570 if (!crtc->enabled) 569 if (!crtc->enabled)
571 return true; 570 return true;
572 571
573 if (old_fb && crtc->fb) {
574 depth_changed = (old_fb->depth != crtc->fb->depth);
575 bpp_changed = (old_fb->bits_per_pixel !=
576 crtc->fb->bits_per_pixel);
577 } else {
578 depth_changed = true;
579 bpp_changed = true;
580 }
581
582 saved_mode = crtc->mode; 572 saved_mode = crtc->mode;
583 saved_x = crtc->x; 573 saved_x = crtc->x;
584 saved_y = crtc->y; 574 saved_y = crtc->y;
@@ -590,15 +580,6 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,
590 crtc->x = x; 580 crtc->x = x;
591 crtc->y = y; 581 crtc->y = y;
592 582
593 if (drm_mode_equal(&saved_mode, &crtc->mode)) {
594 if (saved_x != crtc->x || saved_y != crtc->y ||
595 depth_changed || bpp_changed) {
596 ret = !crtc_funcs->mode_set_base(crtc, crtc->x, crtc->y,
597 old_fb);
598 goto done;
599 }
600 }
601
602 /* Pass our mode to the connectors and the CRTC to give them a chance to 583 /* Pass our mode to the connectors and the CRTC to give them a chance to
603 * adjust it according to limitations or connector properties, and also 584 * adjust it according to limitations or connector properties, and also
604 * a chance to reject the mode entirely. 585 * a chance to reject the mode entirely.
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index c4ada8b6295b..f01def16a669 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -456,7 +456,8 @@ int drm_ioctl(struct inode *inode, struct file *filp,
456 retcode = -EINVAL; 456 retcode = -EINVAL;
457 } else if (((ioctl->flags & DRM_ROOT_ONLY) && !capable(CAP_SYS_ADMIN)) || 457 } else if (((ioctl->flags & DRM_ROOT_ONLY) && !capable(CAP_SYS_ADMIN)) ||
458 ((ioctl->flags & DRM_AUTH) && !file_priv->authenticated) || 458 ((ioctl->flags & DRM_AUTH) && !file_priv->authenticated) ||
459 ((ioctl->flags & DRM_MASTER) && !file_priv->is_master)) { 459 ((ioctl->flags & DRM_MASTER) && !file_priv->is_master) ||
460 (!(ioctl->flags & DRM_CONTROL_ALLOW) && (file_priv->minor->type == DRM_MINOR_CONTROL))) {
460 retcode = -EACCES; 461 retcode = -EACCES;
461 } else { 462 } else {
462 if (cmd & (IOC_IN | IOC_OUT)) { 463 if (cmd & (IOC_IN | IOC_OUT)) {
diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c
index d009661781bc..b9631e3a1ea6 100644
--- a/drivers/gpu/drm/drm_stub.c
+++ b/drivers/gpu/drm/drm_stub.c
@@ -159,6 +159,9 @@ void drm_master_put(struct drm_master **master)
159int drm_setmaster_ioctl(struct drm_device *dev, void *data, 159int drm_setmaster_ioctl(struct drm_device *dev, void *data,
160 struct drm_file *file_priv) 160 struct drm_file *file_priv)
161{ 161{
162 if (file_priv->is_master)
163 return 0;
164
162 if (file_priv->minor->master && file_priv->minor->master != file_priv->master) 165 if (file_priv->minor->master && file_priv->minor->master != file_priv->master)
163 return -EINVAL; 166 return -EINVAL;
164 167
@@ -169,6 +172,7 @@ int drm_setmaster_ioctl(struct drm_device *dev, void *data,
169 file_priv->minor->master != file_priv->master) { 172 file_priv->minor->master != file_priv->master) {
170 mutex_lock(&dev->struct_mutex); 173 mutex_lock(&dev->struct_mutex);
171 file_priv->minor->master = drm_master_get(file_priv->master); 174 file_priv->minor->master = drm_master_get(file_priv->master);
175 file_priv->is_master = 1;
172 mutex_unlock(&dev->struct_mutex); 176 mutex_unlock(&dev->struct_mutex);
173 } 177 }
174 178
@@ -178,10 +182,15 @@ int drm_setmaster_ioctl(struct drm_device *dev, void *data,
178int drm_dropmaster_ioctl(struct drm_device *dev, void *data, 182int drm_dropmaster_ioctl(struct drm_device *dev, void *data,
179 struct drm_file *file_priv) 183 struct drm_file *file_priv)
180{ 184{
181 if (!file_priv->master) 185 if (!file_priv->is_master)
186 return -EINVAL;
187
188 if (!file_priv->minor->master)
182 return -EINVAL; 189 return -EINVAL;
190
183 mutex_lock(&dev->struct_mutex); 191 mutex_lock(&dev->struct_mutex);
184 drm_master_put(&file_priv->minor->master); 192 drm_master_put(&file_priv->minor->master);
193 file_priv->is_master = 0;
185 mutex_unlock(&dev->struct_mutex); 194 mutex_unlock(&dev->struct_mutex);
186 return 0; 195 return 0;
187} 196}
@@ -393,14 +402,14 @@ int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
393 if (dev->driver->load) { 402 if (dev->driver->load) {
394 ret = dev->driver->load(dev, ent->driver_data); 403 ret = dev->driver->load(dev, ent->driver_data);
395 if (ret) 404 if (ret)
396 goto err_g3; 405 goto err_g4;
397 } 406 }
398 407
399 /* setup the grouping for the legacy output */ 408 /* setup the grouping for the legacy output */
400 if (drm_core_check_feature(dev, DRIVER_MODESET)) { 409 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
401 ret = drm_mode_group_init_legacy_group(dev, &dev->primary->mode_group); 410 ret = drm_mode_group_init_legacy_group(dev, &dev->primary->mode_group);
402 if (ret) 411 if (ret)
403 goto err_g3; 412 goto err_g4;
404 } 413 }
405 414
406 list_add_tail(&dev->driver_item, &driver->device_list); 415 list_add_tail(&dev->driver_item, &driver->device_list);
@@ -411,8 +420,11 @@ int drm_get_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
411 420
412 return 0; 421 return 0;
413 422
414err_g3: 423err_g4:
415 drm_put_minor(&dev->primary); 424 drm_put_minor(&dev->primary);
425err_g3:
426 if (drm_core_check_feature(dev, DRIVER_MODESET))
427 drm_put_minor(&dev->control);
416err_g2: 428err_g2:
417 pci_disable_device(pdev); 429 pci_disable_device(pdev);
418err_g1: 430err_g1:
@@ -493,11 +505,11 @@ void drm_put_dev(struct drm_device *dev)
493 dev->agp = NULL; 505 dev->agp = NULL;
494 } 506 }
495 507
496 drm_ht_remove(&dev->map_hash);
497 drm_ctxbitmap_cleanup(dev);
498
499 list_for_each_entry_safe(r_list, list_temp, &dev->maplist, head) 508 list_for_each_entry_safe(r_list, list_temp, &dev->maplist, head)
500 drm_rmmap(dev, r_list->map); 509 drm_rmmap(dev, r_list->map);
510 drm_ht_remove(&dev->map_hash);
511
512 drm_ctxbitmap_cleanup(dev);
501 513
502 if (drm_core_check_feature(dev, DRIVER_MODESET)) 514 if (drm_core_check_feature(dev, DRIVER_MODESET))
503 drm_put_minor(&dev->control); 515 drm_put_minor(&dev->control);
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index bc0c6849360c..8f9372921f82 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -132,6 +132,7 @@ void drm_sysfs_destroy(void)
132 */ 132 */
133static void drm_sysfs_device_release(struct device *dev) 133static void drm_sysfs_device_release(struct device *dev)
134{ 134{
135 memset(dev, 0, sizeof(struct device));
135 return; 136 return;
136} 137}
137 138
@@ -488,9 +489,7 @@ int drm_sysfs_device_add(struct drm_minor *minor)
488 489
489 return 0; 490 return 0;
490 491
491 device_unregister(&minor->kdev);
492err_out: 492err_out:
493
494 return err; 493 return err;
495} 494}
496 495
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index a000cf028826..53d544552625 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -713,18 +713,18 @@ static int i915_cmdbuffer(struct drm_device *dev, void *data,
713 mutex_unlock(&dev->struct_mutex); 713 mutex_unlock(&dev->struct_mutex);
714 if (ret) { 714 if (ret) {
715 DRM_ERROR("i915_dispatch_cmdbuffer failed\n"); 715 DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
716 goto fail_batch_free; 716 goto fail_clip_free;
717 } 717 }
718 718
719 if (sarea_priv) 719 if (sarea_priv)
720 sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); 720 sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
721 721
722fail_batch_free:
723 drm_free(batch_data, cmdbuf->sz, DRM_MEM_DRIVER);
724fail_clip_free: 722fail_clip_free:
725 drm_free(cliprects, 723 drm_free(cliprects,
726 cmdbuf->num_cliprects * sizeof(struct drm_clip_rect), 724 cmdbuf->num_cliprects * sizeof(struct drm_clip_rect),
727 DRM_MEM_DRIVER); 725 DRM_MEM_DRIVER);
726fail_batch_free:
727 drm_free(batch_data, cmdbuf->sz, DRM_MEM_DRIVER);
728 728
729 return ret; 729 return ret;
730} 730}
@@ -1011,8 +1011,16 @@ static int i915_load_modeset_init(struct drm_device *dev)
1011 /* Basic memrange allocator for stolen space (aka vram) */ 1011 /* Basic memrange allocator for stolen space (aka vram) */
1012 drm_mm_init(&dev_priv->vram, 0, prealloc_size); 1012 drm_mm_init(&dev_priv->vram, 0, prealloc_size);
1013 1013
1014 /* Let GEM Manage from end of prealloc space to end of aperture */ 1014 /* Let GEM Manage from end of prealloc space to end of aperture.
1015 i915_gem_do_init(dev, prealloc_size, agp_size); 1015 *
1016 * However, leave one page at the end still bound to the scratch page.
1017 * There are a number of places where the hardware apparently
1018 * prefetches past the end of the object, and we've seen multiple
1019 * hangs with the GPU head pointer stuck in a batchbuffer bound
1020 * at the last page of the aperture. One page should be enough to
1021 * keep any prefetching inside of the aperture.
1022 */
1023 i915_gem_do_init(dev, prealloc_size, agp_size - 4096);
1016 1024
1017 ret = i915_gem_init_ringbuffer(dev); 1025 ret = i915_gem_init_ringbuffer(dev);
1018 if (ret) 1026 if (ret)
@@ -1232,7 +1240,7 @@ int i915_driver_unload(struct drm_device *dev)
1232 if (dev_priv->regs != NULL) 1240 if (dev_priv->regs != NULL)
1233 iounmap(dev_priv->regs); 1241 iounmap(dev_priv->regs);
1234 1242
1235 intel_opregion_free(dev); 1243 intel_opregion_free(dev, 0);
1236 1244
1237 if (drm_core_check_feature(dev, DRIVER_MODESET)) { 1245 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
1238 intel_modeset_cleanup(dev); 1246 intel_modeset_cleanup(dev);
@@ -1350,6 +1358,7 @@ struct drm_ioctl_desc i915_ioctls[] = {
1350 DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0), 1358 DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0),
1351 DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0), 1359 DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0),
1352 DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0), 1360 DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0),
1361 DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, 0),
1353}; 1362};
1354 1363
1355int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); 1364int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 6503e2210f65..98560e1e899a 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -77,7 +77,7 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state)
77 drm_irq_uninstall(dev); 77 drm_irq_uninstall(dev);
78 } 78 }
79 79
80 intel_opregion_free(dev); 80 intel_opregion_free(dev, 1);
81 81
82 if (state.event == PM_EVENT_SUSPEND) { 82 if (state.event == PM_EVENT_SUSPEND) {
83 /* Shut down the device */ 83 /* Shut down the device */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3750d8003048..9b149fe824c3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -283,6 +283,7 @@ typedef struct drm_i915_private {
283 u8 saveAR[21]; 283 u8 saveAR[21];
284 u8 saveDACMASK; 284 u8 saveDACMASK;
285 u8 saveCR[37]; 285 u8 saveCR[37];
286 uint64_t saveFENCE[16];
286 287
287 struct { 288 struct {
288 struct drm_mm gtt_space; 289 struct drm_mm gtt_space;
@@ -446,6 +447,9 @@ struct drm_i915_gem_object {
446 uint32_t tiling_mode; 447 uint32_t tiling_mode;
447 uint32_t stride; 448 uint32_t stride;
448 449
450 /** Record of address bit 17 of each page at last unbind. */
451 long *bit_17;
452
449 /** AGP mapping type (AGP_USER_MEMORY or AGP_USER_CACHED_MEMORY */ 453 /** AGP mapping type (AGP_USER_MEMORY or AGP_USER_CACHED_MEMORY */
450 uint32_t agp_type; 454 uint32_t agp_type;
451 455
@@ -635,9 +639,13 @@ int i915_gem_attach_phys_object(struct drm_device *dev,
635void i915_gem_detach_phys_object(struct drm_device *dev, 639void i915_gem_detach_phys_object(struct drm_device *dev,
636 struct drm_gem_object *obj); 640 struct drm_gem_object *obj);
637void i915_gem_free_all_phys_object(struct drm_device *dev); 641void i915_gem_free_all_phys_object(struct drm_device *dev);
642int i915_gem_object_get_pages(struct drm_gem_object *obj);
643void i915_gem_object_put_pages(struct drm_gem_object *obj);
638 644
639/* i915_gem_tiling.c */ 645/* i915_gem_tiling.c */
640void i915_gem_detect_bit_6_swizzle(struct drm_device *dev); 646void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
647void i915_gem_object_do_bit_17_swizzle(struct drm_gem_object *obj);
648void i915_gem_object_save_bit_17_swizzle(struct drm_gem_object *obj);
641 649
642/* i915_gem_debug.c */ 650/* i915_gem_debug.c */
643void i915_gem_dump_object(struct drm_gem_object *obj, int len, 651void i915_gem_dump_object(struct drm_gem_object *obj, int len,
@@ -667,12 +675,12 @@ extern int i915_restore_state(struct drm_device *dev);
667#ifdef CONFIG_ACPI 675#ifdef CONFIG_ACPI
668/* i915_opregion.c */ 676/* i915_opregion.c */
669extern int intel_opregion_init(struct drm_device *dev, int resume); 677extern int intel_opregion_init(struct drm_device *dev, int resume);
670extern void intel_opregion_free(struct drm_device *dev); 678extern void intel_opregion_free(struct drm_device *dev, int suspend);
671extern void opregion_asle_intr(struct drm_device *dev); 679extern void opregion_asle_intr(struct drm_device *dev);
672extern void opregion_enable_asle(struct drm_device *dev); 680extern void opregion_enable_asle(struct drm_device *dev);
673#else 681#else
674static inline int intel_opregion_init(struct drm_device *dev, int resume) { return 0; } 682static inline int intel_opregion_init(struct drm_device *dev, int resume) { return 0; }
675static inline void intel_opregion_free(struct drm_device *dev) { return; } 683static inline void intel_opregion_free(struct drm_device *dev, int suspend) { return; }
676static inline void opregion_asle_intr(struct drm_device *dev) { return; } 684static inline void opregion_asle_intr(struct drm_device *dev) { return; }
677static inline void opregion_enable_asle(struct drm_device *dev) { return; } 685static inline void opregion_enable_asle(struct drm_device *dev) { return; }
678#endif 686#endif
@@ -698,13 +706,8 @@ extern void intel_modeset_cleanup(struct drm_device *dev);
698#define I915_WRITE16(reg, val) writel(val, dev_priv->regs + (reg)) 706#define I915_WRITE16(reg, val) writel(val, dev_priv->regs + (reg))
699#define I915_READ8(reg) readb(dev_priv->regs + (reg)) 707#define I915_READ8(reg) readb(dev_priv->regs + (reg))
700#define I915_WRITE8(reg, val) writeb(val, dev_priv->regs + (reg)) 708#define I915_WRITE8(reg, val) writeb(val, dev_priv->regs + (reg))
701#ifdef writeq
702#define I915_WRITE64(reg, val) writeq(val, dev_priv->regs + (reg)) 709#define I915_WRITE64(reg, val) writeq(val, dev_priv->regs + (reg))
703#else 710#define I915_READ64(reg) readq(dev_priv->regs + (reg))
704#define I915_WRITE64(reg, val) (writel(val, dev_priv->regs + (reg)), \
705 writel(upper_32_bits(val), dev_priv->regs + \
706 (reg) + 4))
707#endif
708#define POSTING_READ(reg) (void)I915_READ(reg) 711#define POSTING_READ(reg) (void)I915_READ(reg)
709 712
710#define I915_VERBOSE 0 713#define I915_VERBOSE 0
@@ -780,15 +783,18 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
780 (dev)->pci_device == 0x2A42 || \ 783 (dev)->pci_device == 0x2A42 || \
781 (dev)->pci_device == 0x2E02 || \ 784 (dev)->pci_device == 0x2E02 || \
782 (dev)->pci_device == 0x2E12 || \ 785 (dev)->pci_device == 0x2E12 || \
783 (dev)->pci_device == 0x2E22) 786 (dev)->pci_device == 0x2E22 || \
787 (dev)->pci_device == 0x2E32)
784 788
785#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02) 789#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02 || \
790 (dev)->pci_device == 0x2A12)
786 791
787#define IS_GM45(dev) ((dev)->pci_device == 0x2A42) 792#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
788 793
789#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \ 794#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
790 (dev)->pci_device == 0x2E12 || \ 795 (dev)->pci_device == 0x2E12 || \
791 (dev)->pci_device == 0x2E22 || \ 796 (dev)->pci_device == 0x2E22 || \
797 (dev)->pci_device == 0x2E32 || \
792 IS_GM45(dev)) 798 IS_GM45(dev))
793 799
794#define IS_IGDG(dev) ((dev)->pci_device == 0xa001) 800#define IS_IGDG(dev) ((dev)->pci_device == 0xa001)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 1449b452cc63..b189b49c7602 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -43,8 +43,6 @@ static int i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj,
43 uint64_t offset, 43 uint64_t offset,
44 uint64_t size); 44 uint64_t size);
45static void i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj); 45static void i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj);
46static int i915_gem_object_get_pages(struct drm_gem_object *obj);
47static void i915_gem_object_put_pages(struct drm_gem_object *obj);
48static int i915_gem_object_wait_rendering(struct drm_gem_object *obj); 46static int i915_gem_object_wait_rendering(struct drm_gem_object *obj);
49static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, 47static int i915_gem_object_bind_to_gtt(struct drm_gem_object *obj,
50 unsigned alignment); 48 unsigned alignment);
@@ -143,15 +141,27 @@ fast_shmem_read(struct page **pages,
143 int length) 141 int length)
144{ 142{
145 char __iomem *vaddr; 143 char __iomem *vaddr;
146 int ret; 144 int unwritten;
147 145
148 vaddr = kmap_atomic(pages[page_base >> PAGE_SHIFT], KM_USER0); 146 vaddr = kmap_atomic(pages[page_base >> PAGE_SHIFT], KM_USER0);
149 if (vaddr == NULL) 147 if (vaddr == NULL)
150 return -ENOMEM; 148 return -ENOMEM;
151 ret = __copy_to_user_inatomic(data, vaddr + page_offset, length); 149 unwritten = __copy_to_user_inatomic(data, vaddr + page_offset, length);
152 kunmap_atomic(vaddr, KM_USER0); 150 kunmap_atomic(vaddr, KM_USER0);
153 151
154 return ret; 152 if (unwritten)
153 return -EFAULT;
154
155 return 0;
156}
157
158static int i915_gem_object_needs_bit17_swizzle(struct drm_gem_object *obj)
159{
160 drm_i915_private_t *dev_priv = obj->dev->dev_private;
161 struct drm_i915_gem_object *obj_priv = obj->driver_private;
162
163 return dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17 &&
164 obj_priv->tiling_mode != I915_TILING_NONE;
155} 165}
156 166
157static inline int 167static inline int
@@ -181,6 +191,64 @@ slow_shmem_copy(struct page *dst_page,
181 return 0; 191 return 0;
182} 192}
183 193
194static inline int
195slow_shmem_bit17_copy(struct page *gpu_page,
196 int gpu_offset,
197 struct page *cpu_page,
198 int cpu_offset,
199 int length,
200 int is_read)
201{
202 char *gpu_vaddr, *cpu_vaddr;
203
204 /* Use the unswizzled path if this page isn't affected. */
205 if ((page_to_phys(gpu_page) & (1 << 17)) == 0) {
206 if (is_read)
207 return slow_shmem_copy(cpu_page, cpu_offset,
208 gpu_page, gpu_offset, length);
209 else
210 return slow_shmem_copy(gpu_page, gpu_offset,
211 cpu_page, cpu_offset, length);
212 }
213
214 gpu_vaddr = kmap_atomic(gpu_page, KM_USER0);
215 if (gpu_vaddr == NULL)
216 return -ENOMEM;
217
218 cpu_vaddr = kmap_atomic(cpu_page, KM_USER1);
219 if (cpu_vaddr == NULL) {
220 kunmap_atomic(gpu_vaddr, KM_USER0);
221 return -ENOMEM;
222 }
223
224 /* Copy the data, XORing A6 with A17 (1). The user already knows he's
225 * XORing with the other bits (A9 for Y, A9 and A10 for X)
226 */
227 while (length > 0) {
228 int cacheline_end = ALIGN(gpu_offset + 1, 64);
229 int this_length = min(cacheline_end - gpu_offset, length);
230 int swizzled_gpu_offset = gpu_offset ^ 64;
231
232 if (is_read) {
233 memcpy(cpu_vaddr + cpu_offset,
234 gpu_vaddr + swizzled_gpu_offset,
235 this_length);
236 } else {
237 memcpy(gpu_vaddr + swizzled_gpu_offset,
238 cpu_vaddr + cpu_offset,
239 this_length);
240 }
241 cpu_offset += this_length;
242 gpu_offset += this_length;
243 length -= this_length;
244 }
245
246 kunmap_atomic(cpu_vaddr, KM_USER1);
247 kunmap_atomic(gpu_vaddr, KM_USER0);
248
249 return 0;
250}
251
184/** 252/**
185 * This is the fast shmem pread path, which attempts to copy_from_user directly 253 * This is the fast shmem pread path, which attempts to copy_from_user directly
186 * from the backing pages of the object to the user's address space. On a 254 * from the backing pages of the object to the user's address space. On a
@@ -269,6 +337,7 @@ i915_gem_shmem_pread_slow(struct drm_device *dev, struct drm_gem_object *obj,
269 int page_length; 337 int page_length;
270 int ret; 338 int ret;
271 uint64_t data_ptr = args->data_ptr; 339 uint64_t data_ptr = args->data_ptr;
340 int do_bit17_swizzling;
272 341
273 remain = args->size; 342 remain = args->size;
274 343
@@ -286,13 +355,15 @@ i915_gem_shmem_pread_slow(struct drm_device *dev, struct drm_gem_object *obj,
286 355
287 down_read(&mm->mmap_sem); 356 down_read(&mm->mmap_sem);
288 pinned_pages = get_user_pages(current, mm, (uintptr_t)args->data_ptr, 357 pinned_pages = get_user_pages(current, mm, (uintptr_t)args->data_ptr,
289 num_pages, 0, 0, user_pages, NULL); 358 num_pages, 1, 0, user_pages, NULL);
290 up_read(&mm->mmap_sem); 359 up_read(&mm->mmap_sem);
291 if (pinned_pages < num_pages) { 360 if (pinned_pages < num_pages) {
292 ret = -EFAULT; 361 ret = -EFAULT;
293 goto fail_put_user_pages; 362 goto fail_put_user_pages;
294 } 363 }
295 364
365 do_bit17_swizzling = i915_gem_object_needs_bit17_swizzle(obj);
366
296 mutex_lock(&dev->struct_mutex); 367 mutex_lock(&dev->struct_mutex);
297 368
298 ret = i915_gem_object_get_pages(obj); 369 ret = i915_gem_object_get_pages(obj);
@@ -327,11 +398,20 @@ i915_gem_shmem_pread_slow(struct drm_device *dev, struct drm_gem_object *obj,
327 if ((data_page_offset + page_length) > PAGE_SIZE) 398 if ((data_page_offset + page_length) > PAGE_SIZE)
328 page_length = PAGE_SIZE - data_page_offset; 399 page_length = PAGE_SIZE - data_page_offset;
329 400
330 ret = slow_shmem_copy(user_pages[data_page_index], 401 if (do_bit17_swizzling) {
331 data_page_offset, 402 ret = slow_shmem_bit17_copy(obj_priv->pages[shmem_page_index],
332 obj_priv->pages[shmem_page_index], 403 shmem_page_offset,
333 shmem_page_offset, 404 user_pages[data_page_index],
334 page_length); 405 data_page_offset,
406 page_length,
407 1);
408 } else {
409 ret = slow_shmem_copy(user_pages[data_page_index],
410 data_page_offset,
411 obj_priv->pages[shmem_page_index],
412 shmem_page_offset,
413 page_length);
414 }
335 if (ret) 415 if (ret)
336 goto fail_put_pages; 416 goto fail_put_pages;
337 417
@@ -383,9 +463,14 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
383 return -EINVAL; 463 return -EINVAL;
384 } 464 }
385 465
386 ret = i915_gem_shmem_pread_fast(dev, obj, args, file_priv); 466 if (i915_gem_object_needs_bit17_swizzle(obj)) {
387 if (ret != 0)
388 ret = i915_gem_shmem_pread_slow(dev, obj, args, file_priv); 467 ret = i915_gem_shmem_pread_slow(dev, obj, args, file_priv);
468 } else {
469 ret = i915_gem_shmem_pread_fast(dev, obj, args, file_priv);
470 if (ret != 0)
471 ret = i915_gem_shmem_pread_slow(dev, obj, args,
472 file_priv);
473 }
389 474
390 drm_gem_object_unreference(obj); 475 drm_gem_object_unreference(obj);
391 476
@@ -727,6 +812,7 @@ i915_gem_shmem_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj,
727 int page_length; 812 int page_length;
728 int ret; 813 int ret;
729 uint64_t data_ptr = args->data_ptr; 814 uint64_t data_ptr = args->data_ptr;
815 int do_bit17_swizzling;
730 816
731 remain = args->size; 817 remain = args->size;
732 818
@@ -751,6 +837,8 @@ i915_gem_shmem_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj,
751 goto fail_put_user_pages; 837 goto fail_put_user_pages;
752 } 838 }
753 839
840 do_bit17_swizzling = i915_gem_object_needs_bit17_swizzle(obj);
841
754 mutex_lock(&dev->struct_mutex); 842 mutex_lock(&dev->struct_mutex);
755 843
756 ret = i915_gem_object_get_pages(obj); 844 ret = i915_gem_object_get_pages(obj);
@@ -785,11 +873,20 @@ i915_gem_shmem_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj,
785 if ((data_page_offset + page_length) > PAGE_SIZE) 873 if ((data_page_offset + page_length) > PAGE_SIZE)
786 page_length = PAGE_SIZE - data_page_offset; 874 page_length = PAGE_SIZE - data_page_offset;
787 875
788 ret = slow_shmem_copy(obj_priv->pages[shmem_page_index], 876 if (do_bit17_swizzling) {
789 shmem_page_offset, 877 ret = slow_shmem_bit17_copy(obj_priv->pages[shmem_page_index],
790 user_pages[data_page_index], 878 shmem_page_offset,
791 data_page_offset, 879 user_pages[data_page_index],
792 page_length); 880 data_page_offset,
881 page_length,
882 0);
883 } else {
884 ret = slow_shmem_copy(obj_priv->pages[shmem_page_index],
885 shmem_page_offset,
886 user_pages[data_page_index],
887 data_page_offset,
888 page_length);
889 }
793 if (ret) 890 if (ret)
794 goto fail_put_pages; 891 goto fail_put_pages;
795 892
@@ -854,6 +951,8 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
854 ret = i915_gem_gtt_pwrite_slow(dev, obj, args, 951 ret = i915_gem_gtt_pwrite_slow(dev, obj, args,
855 file_priv); 952 file_priv);
856 } 953 }
954 } else if (i915_gem_object_needs_bit17_swizzle(obj)) {
955 ret = i915_gem_shmem_pwrite_slow(dev, obj, args, file_priv);
857 } else { 956 } else {
858 ret = i915_gem_shmem_pwrite_fast(dev, obj, args, file_priv); 957 ret = i915_gem_shmem_pwrite_fast(dev, obj, args, file_priv);
859 if (ret == -EFAULT) { 958 if (ret == -EFAULT) {
@@ -1285,7 +1384,7 @@ i915_gem_mmap_gtt_ioctl(struct drm_device *dev, void *data,
1285 return 0; 1384 return 0;
1286} 1385}
1287 1386
1288static void 1387void
1289i915_gem_object_put_pages(struct drm_gem_object *obj) 1388i915_gem_object_put_pages(struct drm_gem_object *obj)
1290{ 1389{
1291 struct drm_i915_gem_object *obj_priv = obj->driver_private; 1390 struct drm_i915_gem_object *obj_priv = obj->driver_private;
@@ -1297,6 +1396,9 @@ i915_gem_object_put_pages(struct drm_gem_object *obj)
1297 if (--obj_priv->pages_refcount != 0) 1396 if (--obj_priv->pages_refcount != 0)
1298 return; 1397 return;
1299 1398
1399 if (obj_priv->tiling_mode != I915_TILING_NONE)
1400 i915_gem_object_save_bit_17_swizzle(obj);
1401
1300 for (i = 0; i < page_count; i++) 1402 for (i = 0; i < page_count; i++)
1301 if (obj_priv->pages[i] != NULL) { 1403 if (obj_priv->pages[i] != NULL) {
1302 if (obj_priv->dirty) 1404 if (obj_priv->dirty)
@@ -1494,8 +1596,19 @@ i915_gem_retire_request(struct drm_device *dev,
1494 1596
1495 if (obj->write_domain != 0) 1597 if (obj->write_domain != 0)
1496 i915_gem_object_move_to_flushing(obj); 1598 i915_gem_object_move_to_flushing(obj);
1497 else 1599 else {
1600 /* Take a reference on the object so it won't be
1601 * freed while the spinlock is held. The list
1602 * protection for this spinlock is safe when breaking
1603 * the lock like this since the next thing we do
1604 * is just get the head of the list again.
1605 */
1606 drm_gem_object_reference(obj);
1498 i915_gem_object_move_to_inactive(obj); 1607 i915_gem_object_move_to_inactive(obj);
1608 spin_unlock(&dev_priv->mm.active_list_lock);
1609 drm_gem_object_unreference(obj);
1610 spin_lock(&dev_priv->mm.active_list_lock);
1611 }
1499 } 1612 }
1500out: 1613out:
1501 spin_unlock(&dev_priv->mm.active_list_lock); 1614 spin_unlock(&dev_priv->mm.active_list_lock);
@@ -1578,11 +1691,20 @@ static int
1578i915_wait_request(struct drm_device *dev, uint32_t seqno) 1691i915_wait_request(struct drm_device *dev, uint32_t seqno)
1579{ 1692{
1580 drm_i915_private_t *dev_priv = dev->dev_private; 1693 drm_i915_private_t *dev_priv = dev->dev_private;
1694 u32 ier;
1581 int ret = 0; 1695 int ret = 0;
1582 1696
1583 BUG_ON(seqno == 0); 1697 BUG_ON(seqno == 0);
1584 1698
1585 if (!i915_seqno_passed(i915_get_gem_seqno(dev), seqno)) { 1699 if (!i915_seqno_passed(i915_get_gem_seqno(dev), seqno)) {
1700 ier = I915_READ(IER);
1701 if (!ier) {
1702 DRM_ERROR("something (likely vbetool) disabled "
1703 "interrupts, re-enabling\n");
1704 i915_driver_irq_preinstall(dev);
1705 i915_driver_irq_postinstall(dev);
1706 }
1707
1586 dev_priv->mm.waiting_gem_seqno = seqno; 1708 dev_priv->mm.waiting_gem_seqno = seqno;
1587 i915_user_irq_get(dev); 1709 i915_user_irq_get(dev);
1588 ret = wait_event_interruptible(dev_priv->irq_queue, 1710 ret = wait_event_interruptible(dev_priv->irq_queue,
@@ -1884,7 +2006,7 @@ i915_gem_evict_everything(struct drm_device *dev)
1884 return ret; 2006 return ret;
1885} 2007}
1886 2008
1887static int 2009int
1888i915_gem_object_get_pages(struct drm_gem_object *obj) 2010i915_gem_object_get_pages(struct drm_gem_object *obj)
1889{ 2011{
1890 struct drm_i915_gem_object *obj_priv = obj->driver_private; 2012 struct drm_i915_gem_object *obj_priv = obj->driver_private;
@@ -1922,6 +2044,10 @@ i915_gem_object_get_pages(struct drm_gem_object *obj)
1922 } 2044 }
1923 obj_priv->pages[i] = page; 2045 obj_priv->pages[i] = page;
1924 } 2046 }
2047
2048 if (obj_priv->tiling_mode != I915_TILING_NONE)
2049 i915_gem_object_do_bit_17_swizzle(obj);
2050
1925 return 0; 2051 return 0;
1926} 2052}
1927 2053
@@ -3002,13 +3128,13 @@ i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object *exec_list,
3002 drm_free(*relocs, reloc_count * sizeof(**relocs), 3128 drm_free(*relocs, reloc_count * sizeof(**relocs),
3003 DRM_MEM_DRIVER); 3129 DRM_MEM_DRIVER);
3004 *relocs = NULL; 3130 *relocs = NULL;
3005 return ret; 3131 return -EFAULT;
3006 } 3132 }
3007 3133
3008 reloc_index += exec_list[i].relocation_count; 3134 reloc_index += exec_list[i].relocation_count;
3009 } 3135 }
3010 3136
3011 return ret; 3137 return 0;
3012} 3138}
3013 3139
3014static int 3140static int
@@ -3017,23 +3143,28 @@ i915_gem_put_relocs_to_user(struct drm_i915_gem_exec_object *exec_list,
3017 struct drm_i915_gem_relocation_entry *relocs) 3143 struct drm_i915_gem_relocation_entry *relocs)
3018{ 3144{
3019 uint32_t reloc_count = 0, i; 3145 uint32_t reloc_count = 0, i;
3020 int ret; 3146 int ret = 0;
3021 3147
3022 for (i = 0; i < buffer_count; i++) { 3148 for (i = 0; i < buffer_count; i++) {
3023 struct drm_i915_gem_relocation_entry __user *user_relocs; 3149 struct drm_i915_gem_relocation_entry __user *user_relocs;
3150 int unwritten;
3024 3151
3025 user_relocs = (void __user *)(uintptr_t)exec_list[i].relocs_ptr; 3152 user_relocs = (void __user *)(uintptr_t)exec_list[i].relocs_ptr;
3026 3153
3027 if (ret == 0) { 3154 unwritten = copy_to_user(user_relocs,
3028 ret = copy_to_user(user_relocs, 3155 &relocs[reloc_count],
3029 &relocs[reloc_count], 3156 exec_list[i].relocation_count *
3030 exec_list[i].relocation_count * 3157 sizeof(*relocs));
3031 sizeof(*relocs)); 3158
3159 if (unwritten) {
3160 ret = -EFAULT;
3161 goto err;
3032 } 3162 }
3033 3163
3034 reloc_count += exec_list[i].relocation_count; 3164 reloc_count += exec_list[i].relocation_count;
3035 } 3165 }
3036 3166
3167err:
3037 drm_free(relocs, reloc_count * sizeof(*relocs), DRM_MEM_DRIVER); 3168 drm_free(relocs, reloc_count * sizeof(*relocs), DRM_MEM_DRIVER);
3038 3169
3039 return ret; 3170 return ret;
@@ -3243,7 +3374,7 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
3243 exec_offset = exec_list[args->buffer_count - 1].offset; 3374 exec_offset = exec_list[args->buffer_count - 1].offset;
3244 3375
3245#if WATCH_EXEC 3376#if WATCH_EXEC
3246 i915_gem_dump_object(object_list[args->buffer_count - 1], 3377 i915_gem_dump_object(batch_obj,
3247 args->batch_len, 3378 args->batch_len,
3248 __func__, 3379 __func__,
3249 ~0); 3380 ~0);
@@ -3308,10 +3439,12 @@ err:
3308 (uintptr_t) args->buffers_ptr, 3439 (uintptr_t) args->buffers_ptr,
3309 exec_list, 3440 exec_list,
3310 sizeof(*exec_list) * args->buffer_count); 3441 sizeof(*exec_list) * args->buffer_count);
3311 if (ret) 3442 if (ret) {
3443 ret = -EFAULT;
3312 DRM_ERROR("failed to copy %d exec entries " 3444 DRM_ERROR("failed to copy %d exec entries "
3313 "back to user (%d)\n", 3445 "back to user (%d)\n",
3314 args->buffer_count, ret); 3446 args->buffer_count, ret);
3447 }
3315 } 3448 }
3316 3449
3317 /* Copy the updated relocations out regardless of current error 3450 /* Copy the updated relocations out regardless of current error
@@ -3593,6 +3726,7 @@ void i915_gem_free_object(struct drm_gem_object *obj)
3593 i915_gem_free_mmap_offset(obj); 3726 i915_gem_free_mmap_offset(obj);
3594 3727
3595 drm_free(obj_priv->page_cpu_valid, 1, DRM_MEM_DRIVER); 3728 drm_free(obj_priv->page_cpu_valid, 1, DRM_MEM_DRIVER);
3729 kfree(obj_priv->bit_17);
3596 drm_free(obj->driver_private, 1, DRM_MEM_DRIVER); 3730 drm_free(obj->driver_private, 1, DRM_MEM_DRIVER);
3597} 3731}
3598 3732
@@ -3962,8 +4096,10 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
3962 dev_priv->mm.suspended = 0; 4096 dev_priv->mm.suspended = 0;
3963 4097
3964 ret = i915_gem_init_ringbuffer(dev); 4098 ret = i915_gem_init_ringbuffer(dev);
3965 if (ret != 0) 4099 if (ret != 0) {
4100 mutex_unlock(&dev->struct_mutex);
3966 return ret; 4101 return ret;
4102 }
3967 4103
3968 spin_lock(&dev_priv->mm.active_list_lock); 4104 spin_lock(&dev_priv->mm.active_list_lock);
3969 BUG_ON(!list_empty(&dev_priv->mm.active_list)); 4105 BUG_ON(!list_empty(&dev_priv->mm.active_list));
diff --git a/drivers/gpu/drm/i915/i915_gem_debugfs.c b/drivers/gpu/drm/i915/i915_gem_debugfs.c
index a1ac0c5e7307..986f1082c596 100644
--- a/drivers/gpu/drm/i915/i915_gem_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_gem_debugfs.c
@@ -234,6 +234,96 @@ static int i915_hws_info(struct seq_file *m, void *data)
234 return 0; 234 return 0;
235} 235}
236 236
237static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_count)
238{
239 int page, i;
240 uint32_t *mem;
241
242 for (page = 0; page < page_count; page++) {
243 mem = kmap(pages[page]);
244 for (i = 0; i < PAGE_SIZE; i += 4)
245 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]);
246 kunmap(pages[page]);
247 }
248}
249
250static int i915_batchbuffer_info(struct seq_file *m, void *data)
251{
252 struct drm_info_node *node = (struct drm_info_node *) m->private;
253 struct drm_device *dev = node->minor->dev;
254 drm_i915_private_t *dev_priv = dev->dev_private;
255 struct drm_gem_object *obj;
256 struct drm_i915_gem_object *obj_priv;
257 int ret;
258
259 spin_lock(&dev_priv->mm.active_list_lock);
260
261 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) {
262 obj = obj_priv->obj;
263 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) {
264 ret = i915_gem_object_get_pages(obj);
265 if (ret) {
266 DRM_ERROR("Failed to get pages: %d\n", ret);
267 spin_unlock(&dev_priv->mm.active_list_lock);
268 return ret;
269 }
270
271 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj_priv->gtt_offset);
272 i915_dump_pages(m, obj_priv->pages, obj->size / PAGE_SIZE);
273
274 i915_gem_object_put_pages(obj);
275 }
276 }
277
278 spin_unlock(&dev_priv->mm.active_list_lock);
279
280 return 0;
281}
282
283static int i915_ringbuffer_data(struct seq_file *m, void *data)
284{
285 struct drm_info_node *node = (struct drm_info_node *) m->private;
286 struct drm_device *dev = node->minor->dev;
287 drm_i915_private_t *dev_priv = dev->dev_private;
288 u8 *virt;
289 uint32_t *ptr, off;
290
291 if (!dev_priv->ring.ring_obj) {
292 seq_printf(m, "No ringbuffer setup\n");
293 return 0;
294 }
295
296 virt = dev_priv->ring.virtual_start;
297
298 for (off = 0; off < dev_priv->ring.Size; off += 4) {
299 ptr = (uint32_t *)(virt + off);
300 seq_printf(m, "%08x : %08x\n", off, *ptr);
301 }
302
303 return 0;
304}
305
306static int i915_ringbuffer_info(struct seq_file *m, void *data)
307{
308 struct drm_info_node *node = (struct drm_info_node *) m->private;
309 struct drm_device *dev = node->minor->dev;
310 drm_i915_private_t *dev_priv = dev->dev_private;
311 unsigned int head, tail, mask;
312
313 head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
314 tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
315 mask = dev_priv->ring.tail_mask;
316
317 seq_printf(m, "RingHead : %08x\n", head);
318 seq_printf(m, "RingTail : %08x\n", tail);
319 seq_printf(m, "RingMask : %08x\n", mask);
320 seq_printf(m, "RingSize : %08lx\n", dev_priv->ring.Size);
321 seq_printf(m, "Acthd : %08x\n", I915_READ(IS_I965G(dev) ? ACTHD_I965 : ACTHD));
322
323 return 0;
324}
325
326
237static struct drm_info_list i915_gem_debugfs_list[] = { 327static struct drm_info_list i915_gem_debugfs_list[] = {
238 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST}, 328 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
239 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST}, 329 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
@@ -243,6 +333,9 @@ static struct drm_info_list i915_gem_debugfs_list[] = {
243 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0}, 333 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
244 {"i915_gem_interrupt", i915_interrupt_info, 0}, 334 {"i915_gem_interrupt", i915_interrupt_info, 0},
245 {"i915_gem_hws", i915_hws_info, 0}, 335 {"i915_gem_hws", i915_hws_info, 0},
336 {"i915_ringbuffer_data", i915_ringbuffer_data, 0},
337 {"i915_ringbuffer_info", i915_ringbuffer_info, 0},
338 {"i915_batchbuffers", i915_batchbuffer_info, 0},
246}; 339};
247#define I915_GEM_DEBUGFS_ENTRIES ARRAY_SIZE(i915_gem_debugfs_list) 340#define I915_GEM_DEBUGFS_ENTRIES ARRAY_SIZE(i915_gem_debugfs_list)
248 341
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 6be3f927c86a..52a059354e83 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -25,6 +25,8 @@
25 * 25 *
26 */ 26 */
27 27
28#include "linux/string.h"
29#include "linux/bitops.h"
28#include "drmP.h" 30#include "drmP.h"
29#include "drm.h" 31#include "drm.h"
30#include "i915_drm.h" 32#include "i915_drm.h"
@@ -127,8 +129,8 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
127 swizzle_y = I915_BIT_6_SWIZZLE_9_11; 129 swizzle_y = I915_BIT_6_SWIZZLE_9_11;
128 } else { 130 } else {
129 /* Bit 17 swizzling by the CPU in addition. */ 131 /* Bit 17 swizzling by the CPU in addition. */
130 swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN; 132 swizzle_x = I915_BIT_6_SWIZZLE_9_10_17;
131 swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN; 133 swizzle_y = I915_BIT_6_SWIZZLE_9_17;
132 } 134 }
133 break; 135 break;
134 } 136 }
@@ -281,13 +283,25 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
281 mutex_lock(&dev->struct_mutex); 283 mutex_lock(&dev->struct_mutex);
282 284
283 if (args->tiling_mode == I915_TILING_NONE) { 285 if (args->tiling_mode == I915_TILING_NONE) {
284 obj_priv->tiling_mode = I915_TILING_NONE;
285 args->swizzle_mode = I915_BIT_6_SWIZZLE_NONE; 286 args->swizzle_mode = I915_BIT_6_SWIZZLE_NONE;
286 } else { 287 } else {
287 if (args->tiling_mode == I915_TILING_X) 288 if (args->tiling_mode == I915_TILING_X)
288 args->swizzle_mode = dev_priv->mm.bit_6_swizzle_x; 289 args->swizzle_mode = dev_priv->mm.bit_6_swizzle_x;
289 else 290 else
290 args->swizzle_mode = dev_priv->mm.bit_6_swizzle_y; 291 args->swizzle_mode = dev_priv->mm.bit_6_swizzle_y;
292
293 /* Hide bit 17 swizzling from the user. This prevents old Mesa
294 * from aborting the application on sw fallbacks to bit 17,
295 * and we use the pread/pwrite bit17 paths to swizzle for it.
296 * If there was a user that was relying on the swizzle
297 * information for drm_intel_bo_map()ed reads/writes this would
298 * break it, but we don't have any of those.
299 */
300 if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_17)
301 args->swizzle_mode = I915_BIT_6_SWIZZLE_9;
302 if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_10_17)
303 args->swizzle_mode = I915_BIT_6_SWIZZLE_9_10;
304
291 /* If we can't handle the swizzling, make it untiled. */ 305 /* If we can't handle the swizzling, make it untiled. */
292 if (args->swizzle_mode == I915_BIT_6_SWIZZLE_UNKNOWN) { 306 if (args->swizzle_mode == I915_BIT_6_SWIZZLE_UNKNOWN) {
293 args->tiling_mode = I915_TILING_NONE; 307 args->tiling_mode = I915_TILING_NONE;
@@ -354,8 +368,100 @@ i915_gem_get_tiling(struct drm_device *dev, void *data,
354 DRM_ERROR("unknown tiling mode\n"); 368 DRM_ERROR("unknown tiling mode\n");
355 } 369 }
356 370
371 /* Hide bit 17 from the user -- see comment in i915_gem_set_tiling */
372 if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_17)
373 args->swizzle_mode = I915_BIT_6_SWIZZLE_9;
374 if (args->swizzle_mode == I915_BIT_6_SWIZZLE_9_10_17)
375 args->swizzle_mode = I915_BIT_6_SWIZZLE_9_10;
376
357 drm_gem_object_unreference(obj); 377 drm_gem_object_unreference(obj);
358 mutex_unlock(&dev->struct_mutex); 378 mutex_unlock(&dev->struct_mutex);
359 379
360 return 0; 380 return 0;
361} 381}
382
383/**
384 * Swap every 64 bytes of this page around, to account for it having a new
385 * bit 17 of its physical address and therefore being interpreted differently
386 * by the GPU.
387 */
388static int
389i915_gem_swizzle_page(struct page *page)
390{
391 char *vaddr;
392 int i;
393 char temp[64];
394
395 vaddr = kmap(page);
396 if (vaddr == NULL)
397 return -ENOMEM;
398
399 for (i = 0; i < PAGE_SIZE; i += 128) {
400 memcpy(temp, &vaddr[i], 64);
401 memcpy(&vaddr[i], &vaddr[i + 64], 64);
402 memcpy(&vaddr[i + 64], temp, 64);
403 }
404
405 kunmap(page);
406
407 return 0;
408}
409
410void
411i915_gem_object_do_bit_17_swizzle(struct drm_gem_object *obj)
412{
413 struct drm_device *dev = obj->dev;
414 drm_i915_private_t *dev_priv = dev->dev_private;
415 struct drm_i915_gem_object *obj_priv = obj->driver_private;
416 int page_count = obj->size >> PAGE_SHIFT;
417 int i;
418
419 if (dev_priv->mm.bit_6_swizzle_x != I915_BIT_6_SWIZZLE_9_10_17)
420 return;
421
422 if (obj_priv->bit_17 == NULL)
423 return;
424
425 for (i = 0; i < page_count; i++) {
426 char new_bit_17 = page_to_phys(obj_priv->pages[i]) >> 17;
427 if ((new_bit_17 & 0x1) !=
428 (test_bit(i, obj_priv->bit_17) != 0)) {
429 int ret = i915_gem_swizzle_page(obj_priv->pages[i]);
430 if (ret != 0) {
431 DRM_ERROR("Failed to swizzle page\n");
432 return;
433 }
434 set_page_dirty(obj_priv->pages[i]);
435 }
436 }
437}
438
439void
440i915_gem_object_save_bit_17_swizzle(struct drm_gem_object *obj)
441{
442 struct drm_device *dev = obj->dev;
443 drm_i915_private_t *dev_priv = dev->dev_private;
444 struct drm_i915_gem_object *obj_priv = obj->driver_private;
445 int page_count = obj->size >> PAGE_SHIFT;
446 int i;
447
448 if (dev_priv->mm.bit_6_swizzle_x != I915_BIT_6_SWIZZLE_9_10_17)
449 return;
450
451 if (obj_priv->bit_17 == NULL) {
452 obj_priv->bit_17 = kmalloc(BITS_TO_LONGS(page_count) *
453 sizeof(long), GFP_KERNEL);
454 if (obj_priv->bit_17 == NULL) {
455 DRM_ERROR("Failed to allocate memory for bit 17 "
456 "record\n");
457 return;
458 }
459 }
460
461 for (i = 0; i < page_count; i++) {
462 if (page_to_phys(obj_priv->pages[i]) & (1 << 17))
463 __set_bit(i, obj_priv->bit_17);
464 else
465 __clear_bit(i, obj_priv->bit_17);
466 }
467}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index ee7ce7b78cf7..98bb4c878c4e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -406,7 +406,7 @@ int i915_irq_emit(struct drm_device *dev, void *data,
406 drm_i915_irq_emit_t *emit = data; 406 drm_i915_irq_emit_t *emit = data;
407 int result; 407 int result;
408 408
409 if (!dev_priv) { 409 if (!dev_priv || !dev_priv->ring.virtual_start) {
410 DRM_ERROR("called with no initialization\n"); 410 DRM_ERROR("called with no initialization\n");
411 return -EINVAL; 411 return -EINVAL;
412 } 412 }
diff --git a/drivers/gpu/drm/i915/i915_opregion.c b/drivers/gpu/drm/i915/i915_opregion.c
index 69427722d20e..dc425e74a268 100644
--- a/drivers/gpu/drm/i915/i915_opregion.c
+++ b/drivers/gpu/drm/i915/i915_opregion.c
@@ -370,11 +370,8 @@ int intel_opregion_init(struct drm_device *dev, int resume)
370 if (mboxes & MBOX_ACPI) { 370 if (mboxes & MBOX_ACPI) {
371 DRM_DEBUG("Public ACPI methods supported\n"); 371 DRM_DEBUG("Public ACPI methods supported\n");
372 opregion->acpi = base + OPREGION_ACPI_OFFSET; 372 opregion->acpi = base + OPREGION_ACPI_OFFSET;
373 if (drm_core_check_feature(dev, DRIVER_MODESET)) { 373 if (drm_core_check_feature(dev, DRIVER_MODESET))
374 intel_didl_outputs(dev); 374 intel_didl_outputs(dev);
375 if (!resume)
376 acpi_video_register();
377 }
378 } else { 375 } else {
379 DRM_DEBUG("Public ACPI methods not supported\n"); 376 DRM_DEBUG("Public ACPI methods not supported\n");
380 err = -ENOTSUPP; 377 err = -ENOTSUPP;
@@ -389,8 +386,13 @@ int intel_opregion_init(struct drm_device *dev, int resume)
389 if (mboxes & MBOX_ASLE) { 386 if (mboxes & MBOX_ASLE) {
390 DRM_DEBUG("ASLE supported\n"); 387 DRM_DEBUG("ASLE supported\n");
391 opregion->asle = base + OPREGION_ASLE_OFFSET; 388 opregion->asle = base + OPREGION_ASLE_OFFSET;
389 opregion_enable_asle(dev);
392 } 390 }
393 391
392 if (!resume)
393 acpi_video_register();
394
395
394 /* Notify BIOS we are ready to handle ACPI video ext notifs. 396 /* Notify BIOS we are ready to handle ACPI video ext notifs.
395 * Right now, all the events are handled by the ACPI video module. 397 * Right now, all the events are handled by the ACPI video module.
396 * We don't actually need to do anything with them. */ 398 * We don't actually need to do anything with them. */
@@ -408,7 +410,7 @@ err_out:
408 return err; 410 return err;
409} 411}
410 412
411void intel_opregion_free(struct drm_device *dev) 413void intel_opregion_free(struct drm_device *dev, int suspend)
412{ 414{
413 struct drm_i915_private *dev_priv = dev->dev_private; 415 struct drm_i915_private *dev_priv = dev->dev_private;
414 struct intel_opregion *opregion = &dev_priv->opregion; 416 struct intel_opregion *opregion = &dev_priv->opregion;
@@ -416,6 +418,9 @@ void intel_opregion_free(struct drm_device *dev)
416 if (!opregion->enabled) 418 if (!opregion->enabled)
417 return; 419 return;
418 420
421 if (!suspend)
422 acpi_video_exit();
423
419 opregion->acpi->drdy = 0; 424 opregion->acpi->drdy = 0;
420 425
421 system_opregion = NULL; 426 system_opregion = NULL;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e805b590ae71..15da44cf21b1 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -526,6 +526,7 @@
526#define DPLLA_INPUT_BUFFER_ENABLE (1 << 0) 526#define DPLLA_INPUT_BUFFER_ENABLE (1 << 0)
527#define D_STATE 0x6104 527#define D_STATE 0x6104
528#define CG_2D_DIS 0x6200 528#define CG_2D_DIS 0x6200
529#define DPCUNIT_CLOCK_GATE_DISABLE (1 << 24)
529#define CG_3D_DIS 0x6204 530#define CG_3D_DIS 0x6204
530 531
531/* 532/*
@@ -1446,6 +1447,7 @@
1446#define DISPPLANE_NO_LINE_DOUBLE 0 1447#define DISPPLANE_NO_LINE_DOUBLE 0
1447#define DISPPLANE_STEREO_POLARITY_FIRST 0 1448#define DISPPLANE_STEREO_POLARITY_FIRST 0
1448#define DISPPLANE_STEREO_POLARITY_SECOND (1<<18) 1449#define DISPPLANE_STEREO_POLARITY_SECOND (1<<18)
1450#define DISPPLANE_TILED (1<<10)
1449#define DSPAADDR 0x70184 1451#define DSPAADDR 0x70184
1450#define DSPASTRIDE 0x70188 1452#define DSPASTRIDE 0x70188
1451#define DSPAPOS 0x7018C /* reserved */ 1453#define DSPAPOS 0x7018C /* reserved */
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index d669cc2b42c0..ce8a21344a71 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -349,6 +349,18 @@ int i915_save_state(struct drm_device *dev)
349 for (i = 0; i < 3; i++) 349 for (i = 0; i < 3; i++)
350 dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2)); 350 dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2));
351 351
352 /* Fences */
353 if (IS_I965G(dev)) {
354 for (i = 0; i < 16; i++)
355 dev_priv->saveFENCE[i] = I915_READ64(FENCE_REG_965_0 + (i * 8));
356 } else {
357 for (i = 0; i < 8; i++)
358 dev_priv->saveFENCE[i] = I915_READ(FENCE_REG_830_0 + (i * 4));
359
360 if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
361 for (i = 0; i < 8; i++)
362 dev_priv->saveFENCE[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4));
363 }
352 i915_save_vga(dev); 364 i915_save_vga(dev);
353 365
354 return 0; 366 return 0;
@@ -371,6 +383,18 @@ int i915_restore_state(struct drm_device *dev)
371 /* Display arbitration */ 383 /* Display arbitration */
372 I915_WRITE(DSPARB, dev_priv->saveDSPARB); 384 I915_WRITE(DSPARB, dev_priv->saveDSPARB);
373 385
386 /* Fences */
387 if (IS_I965G(dev)) {
388 for (i = 0; i < 16; i++)
389 I915_WRITE64(FENCE_REG_965_0 + (i * 8), dev_priv->saveFENCE[i]);
390 } else {
391 for (i = 0; i < 8; i++)
392 I915_WRITE(FENCE_REG_830_0 + (i * 4), dev_priv->saveFENCE[i]);
393 if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
394 for (i = 0; i < 8; i++)
395 I915_WRITE(FENCE_REG_945_8 + (i * 4), dev_priv->saveFENCE[i+8]);
396 }
397
374 /* Pipe & plane A info */ 398 /* Pipe & plane A info */
375 /* Prime the clock */ 399 /* Prime the clock */
376 if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { 400 if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 9bdd959260a5..19148c3df637 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -161,7 +161,7 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector)
161 hotplug_en &= CRT_FORCE_HOTPLUG_MASK; 161 hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
162 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT; 162 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
163 163
164 if (IS_GM45(dev)) 164 if (IS_G4X(dev))
165 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64; 165 hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
166 166
167 hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50; 167 hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 64773ce52964..3387cf32f385 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -367,6 +367,7 @@ static const intel_limit_t intel_limits[] = {
367 .p1 = { .min = I9XX_P1_MIN, .max = I9XX_P1_MAX }, 367 .p1 = { .min = I9XX_P1_MIN, .max = I9XX_P1_MAX },
368 .p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT, 368 .p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT,
369 .p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST }, 369 .p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST },
370 .find_pll = intel_find_best_PLL,
370 }, 371 },
371 { /* INTEL_LIMIT_IGD_LVDS */ 372 { /* INTEL_LIMIT_IGD_LVDS */
372 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX }, 373 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX },
@@ -380,6 +381,7 @@ static const intel_limit_t intel_limits[] = {
380 /* IGD only supports single-channel mode. */ 381 /* IGD only supports single-channel mode. */
381 .p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT, 382 .p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT,
382 .p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_SLOW }, 383 .p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_SLOW },
384 .find_pll = intel_find_best_PLL,
383 }, 385 },
384 386
385}; 387};
@@ -655,6 +657,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
655 int dspbase = (pipe == 0 ? DSPAADDR : DSPBADDR); 657 int dspbase = (pipe == 0 ? DSPAADDR : DSPBADDR);
656 int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF); 658 int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF);
657 int dspstride = (pipe == 0) ? DSPASTRIDE : DSPBSTRIDE; 659 int dspstride = (pipe == 0) ? DSPASTRIDE : DSPBSTRIDE;
660 int dsptileoff = (pipe == 0 ? DSPATILEOFF : DSPBTILEOFF);
658 int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR; 661 int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;
659 u32 dspcntr, alignment; 662 u32 dspcntr, alignment;
660 int ret; 663 int ret;
@@ -731,6 +734,13 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
731 mutex_unlock(&dev->struct_mutex); 734 mutex_unlock(&dev->struct_mutex);
732 return -EINVAL; 735 return -EINVAL;
733 } 736 }
737 if (IS_I965G(dev)) {
738 if (obj_priv->tiling_mode != I915_TILING_NONE)
739 dspcntr |= DISPPLANE_TILED;
740 else
741 dspcntr &= ~DISPPLANE_TILED;
742 }
743
734 I915_WRITE(dspcntr_reg, dspcntr); 744 I915_WRITE(dspcntr_reg, dspcntr);
735 745
736 Start = obj_priv->gtt_offset; 746 Start = obj_priv->gtt_offset;
@@ -743,6 +753,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
743 I915_READ(dspbase); 753 I915_READ(dspbase);
744 I915_WRITE(dspsurf, Start); 754 I915_WRITE(dspsurf, Start);
745 I915_READ(dspsurf); 755 I915_READ(dspsurf);
756 I915_WRITE(dsptileoff, (y << 16) | x);
746 } else { 757 } else {
747 I915_WRITE(dspbase, Start + Offset); 758 I915_WRITE(dspbase, Start + Offset);
748 I915_READ(dspbase); 759 I915_READ(dspbase);
@@ -1793,6 +1804,37 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
1793 } 1804 }
1794} 1805}
1795 1806
1807int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
1808 struct drm_file *file_priv)
1809{
1810 drm_i915_private_t *dev_priv = dev->dev_private;
1811 struct drm_i915_get_pipe_from_crtc_id *pipe_from_crtc_id = data;
1812 struct drm_crtc *crtc = NULL;
1813 int pipe = -1;
1814
1815 if (!dev_priv) {
1816 DRM_ERROR("called with no initialization\n");
1817 return -EINVAL;
1818 }
1819
1820 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1821 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1822 if (crtc->base.id == pipe_from_crtc_id->crtc_id) {
1823 pipe = intel_crtc->pipe;
1824 break;
1825 }
1826 }
1827
1828 if (pipe == -1) {
1829 DRM_ERROR("no such CRTC id\n");
1830 return -EINVAL;
1831 }
1832
1833 pipe_from_crtc_id->pipe = pipe;
1834
1835 return 0;
1836}
1837
1796struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe) 1838struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe)
1797{ 1839{
1798 struct drm_crtc *crtc = NULL; 1840 struct drm_crtc *crtc = NULL;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 957daef8edff..cd4b9c5f715e 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -109,7 +109,7 @@ struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg,
109void intel_i2c_destroy(struct intel_i2c_chan *chan); 109void intel_i2c_destroy(struct intel_i2c_chan *chan);
110int intel_ddc_get_modes(struct intel_output *intel_output); 110int intel_ddc_get_modes(struct intel_output *intel_output);
111extern bool intel_ddc_probe(struct intel_output *intel_output); 111extern bool intel_ddc_probe(struct intel_output *intel_output);
112 112void intel_i2c_quirk_set(struct drm_device *dev, bool enable);
113extern void intel_crt_init(struct drm_device *dev); 113extern void intel_crt_init(struct drm_device *dev);
114extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg); 114extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
115extern bool intel_sdvo_init(struct drm_device *dev, int output_device); 115extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
@@ -125,6 +125,8 @@ extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
125 125
126extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, 126extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
127 struct drm_crtc *crtc); 127 struct drm_crtc *crtc);
128int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
129 struct drm_file *file_priv);
128extern void intel_wait_for_vblank(struct drm_device *dev); 130extern void intel_wait_for_vblank(struct drm_device *dev);
129extern struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe); 131extern struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe);
130extern struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output, 132extern struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output,
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
index b7f0ebe9f810..e4652dcdd9bb 100644
--- a/drivers/gpu/drm/i915/intel_fb.c
+++ b/drivers/gpu/drm/i915/intel_fb.c
@@ -864,8 +864,8 @@ static void intelfb_sysrq(int dummy1, struct tty_struct *dummy3)
864 864
865static struct sysrq_key_op sysrq_intelfb_restore_op = { 865static struct sysrq_key_op sysrq_intelfb_restore_op = {
866 .handler = intelfb_sysrq, 866 .handler = intelfb_sysrq,
867 .help_msg = "force fb", 867 .help_msg = "force-fb(V)",
868 .action_msg = "force restore of fb console", 868 .action_msg = "Restore framebuffer console",
869}; 869};
870 870
871int intelfb_probe(struct drm_device *dev) 871int intelfb_probe(struct drm_device *dev)
@@ -898,7 +898,7 @@ int intelfb_probe(struct drm_device *dev)
898 ret = intelfb_single_fb_probe(dev); 898 ret = intelfb_single_fb_probe(dev);
899 } 899 }
900 900
901 register_sysrq_key('g', &sysrq_intelfb_restore_op); 901 register_sysrq_key('v', &sysrq_intelfb_restore_op);
902 902
903 return ret; 903 return ret;
904} 904}
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index b06a4a3ff08d..d0983bb93a18 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -38,7 +38,7 @@
38struct intel_hdmi_priv { 38struct intel_hdmi_priv {
39 u32 sdvox_reg; 39 u32 sdvox_reg;
40 u32 save_SDVOX; 40 u32 save_SDVOX;
41 int has_hdmi_sink; 41 bool has_hdmi_sink;
42}; 42};
43 43
44static void intel_hdmi_mode_set(struct drm_encoder *encoder, 44static void intel_hdmi_mode_set(struct drm_encoder *encoder,
@@ -128,6 +128,22 @@ static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
128 return true; 128 return true;
129} 129}
130 130
131static void
132intel_hdmi_sink_detect(struct drm_connector *connector)
133{
134 struct intel_output *intel_output = to_intel_output(connector);
135 struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv;
136 struct edid *edid = NULL;
137
138 edid = drm_get_edid(&intel_output->base,
139 &intel_output->ddc_bus->adapter);
140 if (edid != NULL) {
141 hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
142 kfree(edid);
143 intel_output->base.display_info.raw_edid = NULL;
144 }
145}
146
131static enum drm_connector_status 147static enum drm_connector_status
132intel_hdmi_detect(struct drm_connector *connector) 148intel_hdmi_detect(struct drm_connector *connector)
133{ 149{
@@ -139,11 +155,18 @@ intel_hdmi_detect(struct drm_connector *connector)
139 155
140 temp = I915_READ(PORT_HOTPLUG_EN); 156 temp = I915_READ(PORT_HOTPLUG_EN);
141 157
142 I915_WRITE(PORT_HOTPLUG_EN, 158 switch (hdmi_priv->sdvox_reg) {
143 temp | 159 case SDVOB:
144 HDMIB_HOTPLUG_INT_EN | 160 temp |= HDMIB_HOTPLUG_INT_EN;
145 HDMIC_HOTPLUG_INT_EN | 161 break;
146 HDMID_HOTPLUG_INT_EN); 162 case SDVOC:
163 temp |= HDMIC_HOTPLUG_INT_EN;
164 break;
165 default:
166 return connector_status_unknown;
167 }
168
169 I915_WRITE(PORT_HOTPLUG_EN, temp);
147 170
148 POSTING_READ(PORT_HOTPLUG_EN); 171 POSTING_READ(PORT_HOTPLUG_EN);
149 172
@@ -158,9 +181,10 @@ intel_hdmi_detect(struct drm_connector *connector)
158 return connector_status_unknown; 181 return connector_status_unknown;
159 } 182 }
160 183
161 if ((I915_READ(PORT_HOTPLUG_STAT) & bit) != 0) 184 if ((I915_READ(PORT_HOTPLUG_STAT) & bit) != 0) {
185 intel_hdmi_sink_detect(connector);
162 return connector_status_connected; 186 return connector_status_connected;
163 else 187 } else
164 return connector_status_disconnected; 188 return connector_status_disconnected;
165} 189}
166 190
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index 5ee9d4c25753..f7061f68d050 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -34,6 +34,21 @@
34#include "i915_drm.h" 34#include "i915_drm.h"
35#include "i915_drv.h" 35#include "i915_drv.h"
36 36
37void intel_i2c_quirk_set(struct drm_device *dev, bool enable)
38{
39 struct drm_i915_private *dev_priv = dev->dev_private;
40
41 /* When using bit bashing for I2C, this bit needs to be set to 1 */
42 if (!IS_IGD(dev))
43 return;
44 if (enable)
45 I915_WRITE(CG_2D_DIS,
46 I915_READ(CG_2D_DIS) | DPCUNIT_CLOCK_GATE_DISABLE);
47 else
48 I915_WRITE(CG_2D_DIS,
49 I915_READ(CG_2D_DIS) & (~DPCUNIT_CLOCK_GATE_DISABLE));
50}
51
37/* 52/*
38 * Intel GPIO access functions 53 * Intel GPIO access functions
39 */ 54 */
@@ -153,8 +168,10 @@ struct intel_i2c_chan *intel_i2c_create(struct drm_device *dev, const u32 reg,
153 goto out_free; 168 goto out_free;
154 169
155 /* JJJ: raise SCL and SDA? */ 170 /* JJJ: raise SCL and SDA? */
171 intel_i2c_quirk_set(dev, true);
156 set_data(chan, 1); 172 set_data(chan, 1);
157 set_clock(chan, 1); 173 set_clock(chan, 1);
174 intel_i2c_quirk_set(dev, false);
158 udelay(20); 175 udelay(20);
159 176
160 return chan; 177 return chan;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 6619f26e46a5..439a86514993 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -384,7 +384,51 @@ static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
384 .destroy = intel_lvds_enc_destroy, 384 .destroy = intel_lvds_enc_destroy,
385}; 385};
386 386
387static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
388{
389 DRM_DEBUG("Skipping LVDS initialization for %s\n", id->ident);
390 return 1;
391}
387 392
393/* These systems claim to have LVDS, but really don't */
394static const struct dmi_system_id __initdata intel_no_lvds[] = {
395 {
396 .callback = intel_no_lvds_dmi_callback,
397 .ident = "Apple Mac Mini (Core series)",
398 .matches = {
399 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
400 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
401 },
402 },
403 {
404 .callback = intel_no_lvds_dmi_callback,
405 .ident = "Apple Mac Mini (Core 2 series)",
406 .matches = {
407 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
408 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
409 },
410 },
411 {
412 .callback = intel_no_lvds_dmi_callback,
413 .ident = "MSI IM-945GSE-A",
414 .matches = {
415 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
416 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
417 },
418 },
419 {
420 .callback = intel_no_lvds_dmi_callback,
421 .ident = "Dell Studio Hybrid",
422 .matches = {
423 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
424 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
425 },
426 },
427
428 /* FIXME: add a check for the Aopen Mini PC */
429
430 { } /* terminating entry */
431};
388 432
389/** 433/**
390 * intel_lvds_init - setup LVDS connectors on this device 434 * intel_lvds_init - setup LVDS connectors on this device
@@ -404,15 +448,9 @@ void intel_lvds_init(struct drm_device *dev)
404 u32 lvds; 448 u32 lvds;
405 int pipe; 449 int pipe;
406 450
407 /* Blacklist machines that we know falsely report LVDS. */ 451 /* Skip init on machines we know falsely report LVDS */
408 /* FIXME: add a check for the Aopen Mini PC */ 452 if (dmi_check_system(intel_no_lvds))
409
410 /* Apple Mac Mini Core Duo and Mac Mini Core 2 Duo */
411 if(dmi_match(DMI_PRODUCT_NAME, "Macmini1,1") ||
412 dmi_match(DMI_PRODUCT_NAME, "Macmini2,1")) {
413 DRM_DEBUG("Skipping LVDS initialization for Apple Mac Mini\n");
414 return; 453 return;
415 }
416 454
417 intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL); 455 intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
418 if (!intel_output) { 456 if (!intel_output) {
diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c
index 07d7ec976168..e0910fefce87 100644
--- a/drivers/gpu/drm/i915/intel_modes.c
+++ b/drivers/gpu/drm/i915/intel_modes.c
@@ -27,6 +27,7 @@
27#include <linux/fb.h> 27#include <linux/fb.h>
28#include "drmP.h" 28#include "drmP.h"
29#include "intel_drv.h" 29#include "intel_drv.h"
30#include "i915_drv.h"
30 31
31/** 32/**
32 * intel_ddc_probe 33 * intel_ddc_probe
@@ -52,7 +53,10 @@ bool intel_ddc_probe(struct intel_output *intel_output)
52 } 53 }
53 }; 54 };
54 55
56 intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, true);
55 ret = i2c_transfer(&intel_output->ddc_bus->adapter, msgs, 2); 57 ret = i2c_transfer(&intel_output->ddc_bus->adapter, msgs, 2);
58 intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, false);
59
56 if (ret == 2) 60 if (ret == 2)
57 return true; 61 return true;
58 62
@@ -70,8 +74,10 @@ int intel_ddc_get_modes(struct intel_output *intel_output)
70 struct edid *edid; 74 struct edid *edid;
71 int ret = 0; 75 int ret = 0;
72 76
77 intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, true);
73 edid = drm_get_edid(&intel_output->base, 78 edid = drm_get_edid(&intel_output->base,
74 &intel_output->ddc_bus->adapter); 79 &intel_output->ddc_bus->adapter);
80 intel_i2c_quirk_set(intel_output->ddc_bus->drm_dev, false);
75 if (edid) { 81 if (edid) {
76 drm_mode_connector_update_edid_property(&intel_output->base, 82 drm_mode_connector_update_edid_property(&intel_output->base,
77 edid); 83 edid);
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 7b31f55f55c8..9913651c1e17 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -1357,6 +1357,23 @@ void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1357 intel_sdvo_read_response(intel_output, &response, 2); 1357 intel_sdvo_read_response(intel_output, &response, 2);
1358} 1358}
1359 1359
1360static void
1361intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1362{
1363 struct intel_output *intel_output = to_intel_output(connector);
1364 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
1365 struct edid *edid = NULL;
1366
1367 intel_sdvo_set_control_bus_switch(intel_output, sdvo_priv->ddc_bus);
1368 edid = drm_get_edid(&intel_output->base,
1369 &intel_output->ddc_bus->adapter);
1370 if (edid != NULL) {
1371 sdvo_priv->is_hdmi = drm_detect_hdmi_monitor(edid);
1372 kfree(edid);
1373 intel_output->base.display_info.raw_edid = NULL;
1374 }
1375}
1376
1360static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connector) 1377static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connector)
1361{ 1378{
1362 u8 response[2]; 1379 u8 response[2];
@@ -1371,9 +1388,10 @@ static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connect
1371 if (status != SDVO_CMD_STATUS_SUCCESS) 1388 if (status != SDVO_CMD_STATUS_SUCCESS)
1372 return connector_status_unknown; 1389 return connector_status_unknown;
1373 1390
1374 if ((response[0] != 0) || (response[1] != 0)) 1391 if ((response[0] != 0) || (response[1] != 0)) {
1392 intel_sdvo_hdmi_sink_detect(connector);
1375 return connector_status_connected; 1393 return connector_status_connected;
1376 else 1394 } else
1377 return connector_status_disconnected; 1395 return connector_status_disconnected;
1378} 1396}
1379 1397
diff --git a/drivers/gpu/drm/r128/r128_cce.c b/drivers/gpu/drm/r128/r128_cce.c
index 32de4cedc363..077c0455a6b9 100644
--- a/drivers/gpu/drm/r128/r128_cce.c
+++ b/drivers/gpu/drm/r128/r128_cce.c
@@ -511,9 +511,9 @@ static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init)
511 511
512#if __OS_HAS_AGP 512#if __OS_HAS_AGP
513 if (!dev_priv->is_pci) { 513 if (!dev_priv->is_pci) {
514 drm_core_ioremap(dev_priv->cce_ring, dev); 514 drm_core_ioremap_wc(dev_priv->cce_ring, dev);
515 drm_core_ioremap(dev_priv->ring_rptr, dev); 515 drm_core_ioremap_wc(dev_priv->ring_rptr, dev);
516 drm_core_ioremap(dev->agp_buffer_map, dev); 516 drm_core_ioremap_wc(dev->agp_buffer_map, dev);
517 if (!dev_priv->cce_ring->handle || 517 if (!dev_priv->cce_ring->handle ||
518 !dev_priv->ring_rptr->handle || 518 !dev_priv->ring_rptr->handle ||
519 !dev->agp_buffer_map->handle) { 519 !dev->agp_buffer_map->handle) {
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index ed4d27e6ee6f..8071d965f142 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -99,9 +99,10 @@
99 * 1.27- Add support for IGP GART 99 * 1.27- Add support for IGP GART
100 * 1.28- Add support for VBL on CRTC2 100 * 1.28- Add support for VBL on CRTC2
101 * 1.29- R500 3D cmd buffer support 101 * 1.29- R500 3D cmd buffer support
102 * 1.30- Add support for occlusion queries
102 */ 103 */
103#define DRIVER_MAJOR 1 104#define DRIVER_MAJOR 1
104#define DRIVER_MINOR 29 105#define DRIVER_MINOR 30
105#define DRIVER_PATCHLEVEL 0 106#define DRIVER_PATCHLEVEL 0
106 107
107/* 108/*
diff --git a/drivers/gpu/drm/via/via_dma.c b/drivers/gpu/drm/via/via_dma.c
index 7a339dba6a69..bfb92d283260 100644
--- a/drivers/gpu/drm/via/via_dma.c
+++ b/drivers/gpu/drm/via/via_dma.c
@@ -481,11 +481,13 @@ static int via_wait_idle(drm_via_private_t * dev_priv)
481{ 481{
482 int count = 10000000; 482 int count = 10000000;
483 483
484 while (!(VIA_READ(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY) && count--); 484 while (!(VIA_READ(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY) && --count)
485 ;
485 486
486 while (count-- && (VIA_READ(VIA_REG_STATUS) & 487 while (count && (VIA_READ(VIA_REG_STATUS) &
487 (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | 488 (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY |
488 VIA_3D_ENG_BUSY))) ; 489 VIA_3D_ENG_BUSY)))
490 --count;
489 return count; 491 return count;
490} 492}
491 493
@@ -705,7 +707,7 @@ static int via_cmdbuf_size(struct drm_device *dev, void *data, struct drm_file *
705 switch (d_siz->func) { 707 switch (d_siz->func) {
706 case VIA_CMDBUF_SPACE: 708 case VIA_CMDBUF_SPACE:
707 while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz->size) 709 while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz->size)
708 && count--) { 710 && --count) {
709 if (!d_siz->wait) { 711 if (!d_siz->wait) {
710 break; 712 break;
711 } 713 }
@@ -717,7 +719,7 @@ static int via_cmdbuf_size(struct drm_device *dev, void *data, struct drm_file *
717 break; 719 break;
718 case VIA_CMDBUF_LAG: 720 case VIA_CMDBUF_LAG:
719 while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz->size) 721 while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz->size)
720 && count--) { 722 && --count) {
721 if (!d_siz->wait) { 723 if (!d_siz->wait) {
722 break; 724 break;
723 } 725 }
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-21 09:40:00 -0500