diff options
Diffstat (limited to 'drivers/gpu/drm/savage/savage_bci.c')
-rw-r--r-- | drivers/gpu/drm/savage/savage_bci.c | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/drivers/gpu/drm/savage/savage_bci.c b/drivers/gpu/drm/savage/savage_bci.c index 2d0c9ca484c5..f576232846c3 100644 --- a/drivers/gpu/drm/savage/savage_bci.c +++ b/drivers/gpu/drm/savage/savage_bci.c | |||
@@ -573,13 +573,13 @@ int savage_driver_firstopen(struct drm_device *dev) | |||
573 | dev_priv->mtrr[2].handle = -1; | 573 | dev_priv->mtrr[2].handle = -1; |
574 | if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { | 574 | if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { |
575 | fb_rsrc = 0; | 575 | fb_rsrc = 0; |
576 | fb_base = drm_get_resource_start(dev, 0); | 576 | fb_base = pci_resource_start(dev->pdev, 0); |
577 | fb_size = SAVAGE_FB_SIZE_S3; | 577 | fb_size = SAVAGE_FB_SIZE_S3; |
578 | mmio_base = fb_base + SAVAGE_FB_SIZE_S3; | 578 | mmio_base = fb_base + SAVAGE_FB_SIZE_S3; |
579 | aper_rsrc = 0; | 579 | aper_rsrc = 0; |
580 | aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; | 580 | aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; |
581 | /* this should always be true */ | 581 | /* this should always be true */ |
582 | if (drm_get_resource_len(dev, 0) == 0x08000000) { | 582 | if (pci_resource_len(dev->pdev, 0) == 0x08000000) { |
583 | /* Don't make MMIO write-cobining! We need 3 | 583 | /* Don't make MMIO write-cobining! We need 3 |
584 | * MTRRs. */ | 584 | * MTRRs. */ |
585 | dev_priv->mtrr[0].base = fb_base; | 585 | dev_priv->mtrr[0].base = fb_base; |
@@ -599,18 +599,19 @@ int savage_driver_firstopen(struct drm_device *dev) | |||
599 | dev_priv->mtrr[2].size, DRM_MTRR_WC); | 599 | dev_priv->mtrr[2].size, DRM_MTRR_WC); |
600 | } else { | 600 | } else { |
601 | DRM_ERROR("strange pci_resource_len %08llx\n", | 601 | DRM_ERROR("strange pci_resource_len %08llx\n", |
602 | (unsigned long long)drm_get_resource_len(dev, 0)); | 602 | (unsigned long long) |
603 | pci_resource_len(dev->pdev, 0)); | ||
603 | } | 604 | } |
604 | } else if (dev_priv->chipset != S3_SUPERSAVAGE && | 605 | } else if (dev_priv->chipset != S3_SUPERSAVAGE && |
605 | dev_priv->chipset != S3_SAVAGE2000) { | 606 | dev_priv->chipset != S3_SAVAGE2000) { |
606 | mmio_base = drm_get_resource_start(dev, 0); | 607 | mmio_base = pci_resource_start(dev->pdev, 0); |
607 | fb_rsrc = 1; | 608 | fb_rsrc = 1; |
608 | fb_base = drm_get_resource_start(dev, 1); | 609 | fb_base = pci_resource_start(dev->pdev, 1); |
609 | fb_size = SAVAGE_FB_SIZE_S4; | 610 | fb_size = SAVAGE_FB_SIZE_S4; |
610 | aper_rsrc = 1; | 611 | aper_rsrc = 1; |
611 | aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; | 612 | aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; |
612 | /* this should always be true */ | 613 | /* this should always be true */ |
613 | if (drm_get_resource_len(dev, 1) == 0x08000000) { | 614 | if (pci_resource_len(dev->pdev, 1) == 0x08000000) { |
614 | /* Can use one MTRR to cover both fb and | 615 | /* Can use one MTRR to cover both fb and |
615 | * aperture. */ | 616 | * aperture. */ |
616 | dev_priv->mtrr[0].base = fb_base; | 617 | dev_priv->mtrr[0].base = fb_base; |
@@ -620,15 +621,16 @@ int savage_driver_firstopen(struct drm_device *dev) | |||
620 | dev_priv->mtrr[0].size, DRM_MTRR_WC); | 621 | dev_priv->mtrr[0].size, DRM_MTRR_WC); |
621 | } else { | 622 | } else { |
622 | DRM_ERROR("strange pci_resource_len %08llx\n", | 623 | DRM_ERROR("strange pci_resource_len %08llx\n", |
623 | (unsigned long long)drm_get_resource_len(dev, 1)); | 624 | (unsigned long long) |
625 | pci_resource_len(dev->pdev, 1)); | ||
624 | } | 626 | } |
625 | } else { | 627 | } else { |
626 | mmio_base = drm_get_resource_start(dev, 0); | 628 | mmio_base = pci_resource_start(dev->pdev, 0); |
627 | fb_rsrc = 1; | 629 | fb_rsrc = 1; |
628 | fb_base = drm_get_resource_start(dev, 1); | 630 | fb_base = pci_resource_start(dev->pdev, 1); |
629 | fb_size = drm_get_resource_len(dev, 1); | 631 | fb_size = pci_resource_len(dev->pdev, 1); |
630 | aper_rsrc = 2; | 632 | aper_rsrc = 2; |
631 | aperture_base = drm_get_resource_start(dev, 2); | 633 | aperture_base = pci_resource_start(dev->pdev, 2); |
632 | /* Automatic MTRR setup will do the right thing. */ | 634 | /* Automatic MTRR setup will do the right thing. */ |
633 | } | 635 | } |
634 | 636 | ||