diff options
Diffstat (limited to 'drivers/gpu/drm/radeon')
-rw-r--r-- | drivers/gpu/drm/radeon/atom.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/atombios_crtc.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 17 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 12 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_atombios.c | 30 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_fence.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_gart.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_i2c.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_pm.c | 11 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_ring.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs600.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv770.c | 6 |
15 files changed, 67 insertions, 43 deletions
diff --git a/drivers/gpu/drm/radeon/atom.c b/drivers/gpu/drm/radeon/atom.c index 258fa5e7a2d9..d71d375149f8 100644 --- a/drivers/gpu/drm/radeon/atom.c +++ b/drivers/gpu/drm/radeon/atom.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include "atom.h" | 32 | #include "atom.h" |
33 | #include "atom-names.h" | 33 | #include "atom-names.h" |
34 | #include "atom-bits.h" | 34 | #include "atom-bits.h" |
35 | #include "radeon.h" | ||
35 | 36 | ||
36 | #define ATOM_COND_ABOVE 0 | 37 | #define ATOM_COND_ABOVE 0 |
37 | #define ATOM_COND_ABOVEOREQUAL 1 | 38 | #define ATOM_COND_ABOVEOREQUAL 1 |
@@ -101,7 +102,9 @@ static void debug_print_spaces(int n) | |||
101 | static uint32_t atom_iio_execute(struct atom_context *ctx, int base, | 102 | static uint32_t atom_iio_execute(struct atom_context *ctx, int base, |
102 | uint32_t index, uint32_t data) | 103 | uint32_t index, uint32_t data) |
103 | { | 104 | { |
105 | struct radeon_device *rdev = ctx->card->dev->dev_private; | ||
104 | uint32_t temp = 0xCDCDCDCD; | 106 | uint32_t temp = 0xCDCDCDCD; |
107 | |||
105 | while (1) | 108 | while (1) |
106 | switch (CU8(base)) { | 109 | switch (CU8(base)) { |
107 | case ATOM_IIO_NOP: | 110 | case ATOM_IIO_NOP: |
@@ -112,7 +115,8 @@ static uint32_t atom_iio_execute(struct atom_context *ctx, int base, | |||
112 | base += 3; | 115 | base += 3; |
113 | break; | 116 | break; |
114 | case ATOM_IIO_WRITE: | 117 | case ATOM_IIO_WRITE: |
115 | (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1)); | 118 | if (rdev->family == CHIP_RV515) |
119 | (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1)); | ||
116 | ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp); | 120 | ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp); |
117 | base += 3; | 121 | base += 3; |
118 | break; | 122 | break; |
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index b41ec59c7100..9d516a8c4dfa 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -531,6 +531,12 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
531 | pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; | 531 | pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; |
532 | else | 532 | else |
533 | pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV; | 533 | pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV; |
534 | |||
535 | if ((rdev->family == CHIP_R600) || | ||
536 | (rdev->family == CHIP_RV610) || | ||
537 | (rdev->family == CHIP_RV630) || | ||
538 | (rdev->family == CHIP_RV670)) | ||
539 | pll->flags |= RADEON_PLL_PREFER_MINM_OVER_MAXP; | ||
534 | } else { | 540 | } else { |
535 | pll->flags |= RADEON_PLL_LEGACY; | 541 | pll->flags |= RADEON_PLL_LEGACY; |
536 | 542 | ||
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 0b0cc74c08c0..3453910ee0f3 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -120,11 +120,16 @@ void evergreen_pm_misc(struct radeon_device *rdev) | |||
120 | struct radeon_power_state *ps = &rdev->pm.power_state[req_ps_idx]; | 120 | struct radeon_power_state *ps = &rdev->pm.power_state[req_ps_idx]; |
121 | struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage; | 121 | struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage; |
122 | 122 | ||
123 | if ((voltage->type == VOLTAGE_SW) && voltage->voltage) { | 123 | if (voltage->type == VOLTAGE_SW) { |
124 | if (voltage->voltage != rdev->pm.current_vddc) { | 124 | if (voltage->voltage && (voltage->voltage != rdev->pm.current_vddc)) { |
125 | radeon_atom_set_voltage(rdev, voltage->voltage); | 125 | radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC); |
126 | rdev->pm.current_vddc = voltage->voltage; | 126 | rdev->pm.current_vddc = voltage->voltage; |
127 | DRM_DEBUG("Setting: v: %d\n", voltage->voltage); | 127 | DRM_DEBUG("Setting: vddc: %d\n", voltage->voltage); |
128 | } | ||
129 | if (voltage->vddci && (voltage->vddci != rdev->pm.current_vddci)) { | ||
130 | radeon_atom_set_voltage(rdev, voltage->vddci, SET_VOLTAGE_TYPE_ASIC_VDDCI); | ||
131 | rdev->pm.current_vddci = voltage->vddci; | ||
132 | DRM_DEBUG("Setting: vddci: %d\n", voltage->vddci); | ||
128 | } | 133 | } |
129 | } | 134 | } |
130 | } | 135 | } |
@@ -3036,9 +3041,6 @@ int evergreen_init(struct radeon_device *rdev) | |||
3036 | { | 3041 | { |
3037 | int r; | 3042 | int r; |
3038 | 3043 | ||
3039 | r = radeon_dummy_page_init(rdev); | ||
3040 | if (r) | ||
3041 | return r; | ||
3042 | /* This don't do much */ | 3044 | /* This don't do much */ |
3043 | r = radeon_gem_init(rdev); | 3045 | r = radeon_gem_init(rdev); |
3044 | if (r) | 3046 | if (r) |
@@ -3150,7 +3152,6 @@ void evergreen_fini(struct radeon_device *rdev) | |||
3150 | radeon_atombios_fini(rdev); | 3152 | radeon_atombios_fini(rdev); |
3151 | kfree(rdev->bios); | 3153 | kfree(rdev->bios); |
3152 | rdev->bios = NULL; | 3154 | rdev->bios = NULL; |
3153 | radeon_dummy_page_fini(rdev); | ||
3154 | } | 3155 | } |
3155 | 3156 | ||
3156 | static void evergreen_pcie_gen2_enable(struct radeon_device *rdev) | 3157 | static void evergreen_pcie_gen2_enable(struct radeon_device *rdev) |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index be271c42de4d..15d58292677a 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -587,7 +587,7 @@ void r600_pm_misc(struct radeon_device *rdev) | |||
587 | 587 | ||
588 | if ((voltage->type == VOLTAGE_SW) && voltage->voltage) { | 588 | if ((voltage->type == VOLTAGE_SW) && voltage->voltage) { |
589 | if (voltage->voltage != rdev->pm.current_vddc) { | 589 | if (voltage->voltage != rdev->pm.current_vddc) { |
590 | radeon_atom_set_voltage(rdev, voltage->voltage); | 590 | radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC); |
591 | rdev->pm.current_vddc = voltage->voltage; | 591 | rdev->pm.current_vddc = voltage->voltage; |
592 | DRM_DEBUG_DRIVER("Setting: v: %d\n", voltage->voltage); | 592 | DRM_DEBUG_DRIVER("Setting: v: %d\n", voltage->voltage); |
593 | } | 593 | } |
@@ -2509,9 +2509,6 @@ int r600_init(struct radeon_device *rdev) | |||
2509 | { | 2509 | { |
2510 | int r; | 2510 | int r; |
2511 | 2511 | ||
2512 | r = radeon_dummy_page_init(rdev); | ||
2513 | if (r) | ||
2514 | return r; | ||
2515 | if (r600_debugfs_mc_info_init(rdev)) { | 2512 | if (r600_debugfs_mc_info_init(rdev)) { |
2516 | DRM_ERROR("Failed to register debugfs file for mc !\n"); | 2513 | DRM_ERROR("Failed to register debugfs file for mc !\n"); |
2517 | } | 2514 | } |
@@ -2625,7 +2622,6 @@ void r600_fini(struct radeon_device *rdev) | |||
2625 | radeon_atombios_fini(rdev); | 2622 | radeon_atombios_fini(rdev); |
2626 | kfree(rdev->bios); | 2623 | kfree(rdev->bios); |
2627 | rdev->bios = NULL; | 2624 | rdev->bios = NULL; |
2628 | radeon_dummy_page_fini(rdev); | ||
2629 | } | 2625 | } |
2630 | 2626 | ||
2631 | 2627 | ||
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 93f536594c73..ba643b576054 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -177,7 +177,7 @@ void radeon_pm_suspend(struct radeon_device *rdev); | |||
177 | void radeon_pm_resume(struct radeon_device *rdev); | 177 | void radeon_pm_resume(struct radeon_device *rdev); |
178 | void radeon_combios_get_power_modes(struct radeon_device *rdev); | 178 | void radeon_combios_get_power_modes(struct radeon_device *rdev); |
179 | void radeon_atombios_get_power_modes(struct radeon_device *rdev); | 179 | void radeon_atombios_get_power_modes(struct radeon_device *rdev); |
180 | void radeon_atom_set_voltage(struct radeon_device *rdev, u16 level); | 180 | void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type); |
181 | void rs690_pm_info(struct radeon_device *rdev); | 181 | void rs690_pm_info(struct radeon_device *rdev); |
182 | extern int rv6xx_get_temp(struct radeon_device *rdev); | 182 | extern int rv6xx_get_temp(struct radeon_device *rdev); |
183 | extern int rv770_get_temp(struct radeon_device *rdev); | 183 | extern int rv770_get_temp(struct radeon_device *rdev); |
@@ -767,7 +767,9 @@ struct radeon_voltage { | |||
767 | u8 vddci_id; /* index into vddci voltage table */ | 767 | u8 vddci_id; /* index into vddci voltage table */ |
768 | bool vddci_enabled; | 768 | bool vddci_enabled; |
769 | /* r6xx+ sw */ | 769 | /* r6xx+ sw */ |
770 | u32 voltage; | 770 | u16 voltage; |
771 | /* evergreen+ vddci */ | ||
772 | u16 vddci; | ||
771 | }; | 773 | }; |
772 | 774 | ||
773 | /* clock mode flags */ | 775 | /* clock mode flags */ |
@@ -835,10 +837,12 @@ struct radeon_pm { | |||
835 | int default_power_state_index; | 837 | int default_power_state_index; |
836 | u32 current_sclk; | 838 | u32 current_sclk; |
837 | u32 current_mclk; | 839 | u32 current_mclk; |
838 | u32 current_vddc; | 840 | u16 current_vddc; |
841 | u16 current_vddci; | ||
839 | u32 default_sclk; | 842 | u32 default_sclk; |
840 | u32 default_mclk; | 843 | u32 default_mclk; |
841 | u32 default_vddc; | 844 | u16 default_vddc; |
845 | u16 default_vddci; | ||
842 | struct radeon_i2c_chan *i2c_bus; | 846 | struct radeon_i2c_chan *i2c_bus; |
843 | /* selected pm method */ | 847 | /* selected pm method */ |
844 | enum radeon_pm_method pm_method; | 848 | enum radeon_pm_method pm_method; |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index eb888ee5f674..ca576191d058 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -94,7 +94,7 @@ static void radeon_register_accessor_init(struct radeon_device *rdev) | |||
94 | rdev->mc_rreg = &rs600_mc_rreg; | 94 | rdev->mc_rreg = &rs600_mc_rreg; |
95 | rdev->mc_wreg = &rs600_mc_wreg; | 95 | rdev->mc_wreg = &rs600_mc_wreg; |
96 | } | 96 | } |
97 | if ((rdev->family >= CHIP_R600) && (rdev->family <= CHIP_HEMLOCK)) { | 97 | if (rdev->family >= CHIP_R600) { |
98 | rdev->pciep_rreg = &r600_pciep_rreg; | 98 | rdev->pciep_rreg = &r600_pciep_rreg; |
99 | rdev->pciep_wreg = &r600_pciep_wreg; | 99 | rdev->pciep_wreg = &r600_pciep_wreg; |
100 | } | 100 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 99768d9d91da..f5d12fb103fa 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -2176,24 +2176,27 @@ static void radeon_atombios_add_pplib_thermal_controller(struct radeon_device *r | |||
2176 | } | 2176 | } |
2177 | } | 2177 | } |
2178 | 2178 | ||
2179 | static u16 radeon_atombios_get_default_vddc(struct radeon_device *rdev) | 2179 | static void radeon_atombios_get_default_voltages(struct radeon_device *rdev, |
2180 | u16 *vddc, u16 *vddci) | ||
2180 | { | 2181 | { |
2181 | struct radeon_mode_info *mode_info = &rdev->mode_info; | 2182 | struct radeon_mode_info *mode_info = &rdev->mode_info; |
2182 | int index = GetIndexIntoMasterTable(DATA, FirmwareInfo); | 2183 | int index = GetIndexIntoMasterTable(DATA, FirmwareInfo); |
2183 | u8 frev, crev; | 2184 | u8 frev, crev; |
2184 | u16 data_offset; | 2185 | u16 data_offset; |
2185 | union firmware_info *firmware_info; | 2186 | union firmware_info *firmware_info; |
2186 | u16 vddc = 0; | 2187 | |
2188 | *vddc = 0; | ||
2189 | *vddci = 0; | ||
2187 | 2190 | ||
2188 | if (atom_parse_data_header(mode_info->atom_context, index, NULL, | 2191 | if (atom_parse_data_header(mode_info->atom_context, index, NULL, |
2189 | &frev, &crev, &data_offset)) { | 2192 | &frev, &crev, &data_offset)) { |
2190 | firmware_info = | 2193 | firmware_info = |
2191 | (union firmware_info *)(mode_info->atom_context->bios + | 2194 | (union firmware_info *)(mode_info->atom_context->bios + |
2192 | data_offset); | 2195 | data_offset); |
2193 | vddc = le16_to_cpu(firmware_info->info_14.usBootUpVDDCVoltage); | 2196 | *vddc = le16_to_cpu(firmware_info->info_14.usBootUpVDDCVoltage); |
2197 | if ((frev == 2) && (crev >= 2)) | ||
2198 | *vddci = le16_to_cpu(firmware_info->info_22.usBootUpVDDCIVoltage); | ||
2194 | } | 2199 | } |
2195 | |||
2196 | return vddc; | ||
2197 | } | 2200 | } |
2198 | 2201 | ||
2199 | static void radeon_atombios_parse_pplib_non_clock_info(struct radeon_device *rdev, | 2202 | static void radeon_atombios_parse_pplib_non_clock_info(struct radeon_device *rdev, |
@@ -2203,7 +2206,9 @@ static void radeon_atombios_parse_pplib_non_clock_info(struct radeon_device *rde | |||
2203 | int j; | 2206 | int j; |
2204 | u32 misc = le32_to_cpu(non_clock_info->ulCapsAndSettings); | 2207 | u32 misc = le32_to_cpu(non_clock_info->ulCapsAndSettings); |
2205 | u32 misc2 = le16_to_cpu(non_clock_info->usClassification); | 2208 | u32 misc2 = le16_to_cpu(non_clock_info->usClassification); |
2206 | u16 vddc = radeon_atombios_get_default_vddc(rdev); | 2209 | u16 vddc, vddci; |
2210 | |||
2211 | radeon_atombios_get_default_voltages(rdev, &vddc, &vddci); | ||
2207 | 2212 | ||
2208 | rdev->pm.power_state[state_index].misc = misc; | 2213 | rdev->pm.power_state[state_index].misc = misc; |
2209 | rdev->pm.power_state[state_index].misc2 = misc2; | 2214 | rdev->pm.power_state[state_index].misc2 = misc2; |
@@ -2244,6 +2249,7 @@ static void radeon_atombios_parse_pplib_non_clock_info(struct radeon_device *rde | |||
2244 | rdev->pm.default_sclk = rdev->pm.power_state[state_index].clock_info[0].sclk; | 2249 | rdev->pm.default_sclk = rdev->pm.power_state[state_index].clock_info[0].sclk; |
2245 | rdev->pm.default_mclk = rdev->pm.power_state[state_index].clock_info[0].mclk; | 2250 | rdev->pm.default_mclk = rdev->pm.power_state[state_index].clock_info[0].mclk; |
2246 | rdev->pm.default_vddc = rdev->pm.power_state[state_index].clock_info[0].voltage.voltage; | 2251 | rdev->pm.default_vddc = rdev->pm.power_state[state_index].clock_info[0].voltage.voltage; |
2252 | rdev->pm.default_vddci = rdev->pm.power_state[state_index].clock_info[0].voltage.vddci; | ||
2247 | } else { | 2253 | } else { |
2248 | /* patch the table values with the default slck/mclk from firmware info */ | 2254 | /* patch the table values with the default slck/mclk from firmware info */ |
2249 | for (j = 0; j < mode_index; j++) { | 2255 | for (j = 0; j < mode_index; j++) { |
@@ -2286,6 +2292,8 @@ static bool radeon_atombios_parse_pplib_clock_info(struct radeon_device *rdev, | |||
2286 | VOLTAGE_SW; | 2292 | VOLTAGE_SW; |
2287 | rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage = | 2293 | rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage = |
2288 | le16_to_cpu(clock_info->evergreen.usVDDC); | 2294 | le16_to_cpu(clock_info->evergreen.usVDDC); |
2295 | rdev->pm.power_state[state_index].clock_info[mode_index].voltage.vddci = | ||
2296 | le16_to_cpu(clock_info->evergreen.usVDDCI); | ||
2289 | } else { | 2297 | } else { |
2290 | sclk = le16_to_cpu(clock_info->r600.usEngineClockLow); | 2298 | sclk = le16_to_cpu(clock_info->r600.usEngineClockLow); |
2291 | sclk |= clock_info->r600.ucEngineClockHigh << 16; | 2299 | sclk |= clock_info->r600.ucEngineClockHigh << 16; |
@@ -2577,25 +2585,25 @@ union set_voltage { | |||
2577 | struct _SET_VOLTAGE_PARAMETERS_V2 v2; | 2585 | struct _SET_VOLTAGE_PARAMETERS_V2 v2; |
2578 | }; | 2586 | }; |
2579 | 2587 | ||
2580 | void radeon_atom_set_voltage(struct radeon_device *rdev, u16 level) | 2588 | void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type) |
2581 | { | 2589 | { |
2582 | union set_voltage args; | 2590 | union set_voltage args; |
2583 | int index = GetIndexIntoMasterTable(COMMAND, SetVoltage); | 2591 | int index = GetIndexIntoMasterTable(COMMAND, SetVoltage); |
2584 | u8 frev, crev, volt_index = level; | 2592 | u8 frev, crev, volt_index = voltage_level; |
2585 | 2593 | ||
2586 | if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) | 2594 | if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) |
2587 | return; | 2595 | return; |
2588 | 2596 | ||
2589 | switch (crev) { | 2597 | switch (crev) { |
2590 | case 1: | 2598 | case 1: |
2591 | args.v1.ucVoltageType = SET_VOLTAGE_TYPE_ASIC_VDDC; | 2599 | args.v1.ucVoltageType = voltage_type; |
2592 | args.v1.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_ALL_SOURCE; | 2600 | args.v1.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_ALL_SOURCE; |
2593 | args.v1.ucVoltageIndex = volt_index; | 2601 | args.v1.ucVoltageIndex = volt_index; |
2594 | break; | 2602 | break; |
2595 | case 2: | 2603 | case 2: |
2596 | args.v2.ucVoltageType = SET_VOLTAGE_TYPE_ASIC_VDDC; | 2604 | args.v2.ucVoltageType = voltage_type; |
2597 | args.v2.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_SET_VOLTAGE; | 2605 | args.v2.ucVoltageMode = SET_ASIC_VOLTAGE_MODE_SET_VOLTAGE; |
2598 | args.v2.usVoltageLevel = cpu_to_le16(level); | 2606 | args.v2.usVoltageLevel = cpu_to_le16(voltage_level); |
2599 | break; | 2607 | break; |
2600 | default: | 2608 | default: |
2601 | DRM_ERROR("Unknown table version %d, %d\n", frev, crev); | 2609 | DRM_ERROR("Unknown table version %d, %d\n", frev, crev); |
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c index 9e59868d354e..bbcd1dd7bac0 100644 --- a/drivers/gpu/drm/radeon/radeon_fence.c +++ b/drivers/gpu/drm/radeon/radeon_fence.c | |||
@@ -79,7 +79,7 @@ static bool radeon_fence_poll_locked(struct radeon_device *rdev) | |||
79 | scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; | 79 | scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; |
80 | else | 80 | else |
81 | scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; | 81 | scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; |
82 | seq = rdev->wb.wb[scratch_index/4]; | 82 | seq = le32_to_cpu(rdev->wb.wb[scratch_index/4]); |
83 | } else | 83 | } else |
84 | seq = RREG32(rdev->fence_drv.scratch_reg); | 84 | seq = RREG32(rdev->fence_drv.scratch_reg); |
85 | if (seq != rdev->fence_drv.last_seq) { | 85 | if (seq != rdev->fence_drv.last_seq) { |
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c index f0534ef2f331..8a955bbdb608 100644 --- a/drivers/gpu/drm/radeon/radeon_gart.c +++ b/drivers/gpu/drm/radeon/radeon_gart.c | |||
@@ -285,4 +285,6 @@ void radeon_gart_fini(struct radeon_device *rdev) | |||
285 | rdev->gart.pages = NULL; | 285 | rdev->gart.pages = NULL; |
286 | rdev->gart.pages_addr = NULL; | 286 | rdev->gart.pages_addr = NULL; |
287 | rdev->gart.ttm_alloced = NULL; | 287 | rdev->gart.ttm_alloced = NULL; |
288 | |||
289 | radeon_dummy_page_fini(rdev); | ||
288 | } | 290 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c index ded2a45bc95c..ccbabf734a61 100644 --- a/drivers/gpu/drm/radeon/radeon_i2c.c +++ b/drivers/gpu/drm/radeon/radeon_i2c.c | |||
@@ -1062,7 +1062,7 @@ void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus, | |||
1062 | *val = in_buf[0]; | 1062 | *val = in_buf[0]; |
1063 | DRM_DEBUG("val = 0x%02x\n", *val); | 1063 | DRM_DEBUG("val = 0x%02x\n", *val); |
1064 | } else { | 1064 | } else { |
1065 | DRM_ERROR("i2c 0x%02x 0x%02x read failed\n", | 1065 | DRM_DEBUG("i2c 0x%02x 0x%02x read failed\n", |
1066 | addr, *val); | 1066 | addr, *val); |
1067 | } | 1067 | } |
1068 | } | 1068 | } |
@@ -1084,7 +1084,7 @@ void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c_bus, | |||
1084 | out_buf[1] = val; | 1084 | out_buf[1] = val; |
1085 | 1085 | ||
1086 | if (i2c_transfer(&i2c_bus->adapter, &msg, 1) != 1) | 1086 | if (i2c_transfer(&i2c_bus->adapter, &msg, 1) != 1) |
1087 | DRM_ERROR("i2c 0x%02x 0x%02x write failed\n", | 1087 | DRM_DEBUG("i2c 0x%02x 0x%02x write failed\n", |
1088 | addr, val); | 1088 | addr, val); |
1089 | } | 1089 | } |
1090 | 1090 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index 5b54268ed6b2..2f46e0c8df53 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c | |||
@@ -269,7 +269,7 @@ static const struct drm_encoder_helper_funcs radeon_legacy_lvds_helper_funcs = { | |||
269 | .disable = radeon_legacy_encoder_disable, | 269 | .disable = radeon_legacy_encoder_disable, |
270 | }; | 270 | }; |
271 | 271 | ||
272 | #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE | 272 | #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE) |
273 | 273 | ||
274 | #define MAX_RADEON_LEVEL 0xFF | 274 | #define MAX_RADEON_LEVEL 0xFF |
275 | 275 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 08de669e025a..86eda1ea94df 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include "drmP.h" | 23 | #include "drmP.h" |
24 | #include "radeon.h" | 24 | #include "radeon.h" |
25 | #include "avivod.h" | 25 | #include "avivod.h" |
26 | #include "atom.h" | ||
26 | #ifdef CONFIG_ACPI | 27 | #ifdef CONFIG_ACPI |
27 | #include <linux/acpi.h> | 28 | #include <linux/acpi.h> |
28 | #endif | 29 | #endif |
@@ -535,7 +536,11 @@ void radeon_pm_resume(struct radeon_device *rdev) | |||
535 | /* set up the default clocks if the MC ucode is loaded */ | 536 | /* set up the default clocks if the MC ucode is loaded */ |
536 | if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) { | 537 | if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) { |
537 | if (rdev->pm.default_vddc) | 538 | if (rdev->pm.default_vddc) |
538 | radeon_atom_set_voltage(rdev, rdev->pm.default_vddc); | 539 | radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, |
540 | SET_VOLTAGE_TYPE_ASIC_VDDC); | ||
541 | if (rdev->pm.default_vddci) | ||
542 | radeon_atom_set_voltage(rdev, rdev->pm.default_vddci, | ||
543 | SET_VOLTAGE_TYPE_ASIC_VDDCI); | ||
539 | if (rdev->pm.default_sclk) | 544 | if (rdev->pm.default_sclk) |
540 | radeon_set_engine_clock(rdev, rdev->pm.default_sclk); | 545 | radeon_set_engine_clock(rdev, rdev->pm.default_sclk); |
541 | if (rdev->pm.default_mclk) | 546 | if (rdev->pm.default_mclk) |
@@ -548,6 +553,7 @@ void radeon_pm_resume(struct radeon_device *rdev) | |||
548 | rdev->pm.current_sclk = rdev->pm.default_sclk; | 553 | rdev->pm.current_sclk = rdev->pm.default_sclk; |
549 | rdev->pm.current_mclk = rdev->pm.default_mclk; | 554 | rdev->pm.current_mclk = rdev->pm.default_mclk; |
550 | rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.voltage; | 555 | rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.voltage; |
556 | rdev->pm.current_vddci = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.vddci; | ||
551 | if (rdev->pm.pm_method == PM_METHOD_DYNPM | 557 | if (rdev->pm.pm_method == PM_METHOD_DYNPM |
552 | && rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) { | 558 | && rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) { |
553 | rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; | 559 | rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; |
@@ -585,7 +591,8 @@ int radeon_pm_init(struct radeon_device *rdev) | |||
585 | /* set up the default clocks if the MC ucode is loaded */ | 591 | /* set up the default clocks if the MC ucode is loaded */ |
586 | if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) { | 592 | if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) { |
587 | if (rdev->pm.default_vddc) | 593 | if (rdev->pm.default_vddc) |
588 | radeon_atom_set_voltage(rdev, rdev->pm.default_vddc); | 594 | radeon_atom_set_voltage(rdev, rdev->pm.default_vddc, |
595 | SET_VOLTAGE_TYPE_ASIC_VDDC); | ||
589 | if (rdev->pm.default_sclk) | 596 | if (rdev->pm.default_sclk) |
590 | radeon_set_engine_clock(rdev, rdev->pm.default_sclk); | 597 | radeon_set_engine_clock(rdev, rdev->pm.default_sclk); |
591 | if (rdev->pm.default_mclk) | 598 | if (rdev->pm.default_mclk) |
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c index bbc9cd823334..c6776e48fdde 100644 --- a/drivers/gpu/drm/radeon/radeon_ring.c +++ b/drivers/gpu/drm/radeon/radeon_ring.c | |||
@@ -248,7 +248,7 @@ void radeon_ib_pool_fini(struct radeon_device *rdev) | |||
248 | void radeon_ring_free_size(struct radeon_device *rdev) | 248 | void radeon_ring_free_size(struct radeon_device *rdev) |
249 | { | 249 | { |
250 | if (rdev->wb.enabled) | 250 | if (rdev->wb.enabled) |
251 | rdev->cp.rptr = rdev->wb.wb[RADEON_WB_CP_RPTR_OFFSET/4]; | 251 | rdev->cp.rptr = le32_to_cpu(rdev->wb.wb[RADEON_WB_CP_RPTR_OFFSET/4]); |
252 | else { | 252 | else { |
253 | if (rdev->family >= CHIP_R600) | 253 | if (rdev->family >= CHIP_R600) |
254 | rdev->cp.rptr = RREG32(R600_CP_RB_RPTR); | 254 | rdev->cp.rptr = RREG32(R600_CP_RB_RPTR); |
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 876cebc4b8ba..6e3b11e5abbe 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -114,7 +114,7 @@ void rs600_pm_misc(struct radeon_device *rdev) | |||
114 | udelay(voltage->delay); | 114 | udelay(voltage->delay); |
115 | } | 115 | } |
116 | } else if (voltage->type == VOLTAGE_VDDC) | 116 | } else if (voltage->type == VOLTAGE_VDDC) |
117 | radeon_atom_set_voltage(rdev, voltage->vddc_id); | 117 | radeon_atom_set_voltage(rdev, voltage->vddc_id, SET_VOLTAGE_TYPE_ASIC_VDDC); |
118 | 118 | ||
119 | dyn_pwrmgt_sclk_length = RREG32_PLL(DYN_PWRMGT_SCLK_LENGTH); | 119 | dyn_pwrmgt_sclk_length = RREG32_PLL(DYN_PWRMGT_SCLK_LENGTH); |
120 | dyn_pwrmgt_sclk_length &= ~REDUCED_POWER_SCLK_HILEN(0xf); | 120 | dyn_pwrmgt_sclk_length &= ~REDUCED_POWER_SCLK_HILEN(0xf); |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index b974ac7df8df..ef8a5babe9f7 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -106,7 +106,7 @@ void rv770_pm_misc(struct radeon_device *rdev) | |||
106 | 106 | ||
107 | if ((voltage->type == VOLTAGE_SW) && voltage->voltage) { | 107 | if ((voltage->type == VOLTAGE_SW) && voltage->voltage) { |
108 | if (voltage->voltage != rdev->pm.current_vddc) { | 108 | if (voltage->voltage != rdev->pm.current_vddc) { |
109 | radeon_atom_set_voltage(rdev, voltage->voltage); | 109 | radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC); |
110 | rdev->pm.current_vddc = voltage->voltage; | 110 | rdev->pm.current_vddc = voltage->voltage; |
111 | DRM_DEBUG("Setting: v: %d\n", voltage->voltage); | 111 | DRM_DEBUG("Setting: v: %d\n", voltage->voltage); |
112 | } | 112 | } |
@@ -1255,9 +1255,6 @@ int rv770_init(struct radeon_device *rdev) | |||
1255 | { | 1255 | { |
1256 | int r; | 1256 | int r; |
1257 | 1257 | ||
1258 | r = radeon_dummy_page_init(rdev); | ||
1259 | if (r) | ||
1260 | return r; | ||
1261 | /* This don't do much */ | 1258 | /* This don't do much */ |
1262 | r = radeon_gem_init(rdev); | 1259 | r = radeon_gem_init(rdev); |
1263 | if (r) | 1260 | if (r) |
@@ -1372,7 +1369,6 @@ void rv770_fini(struct radeon_device *rdev) | |||
1372 | radeon_atombios_fini(rdev); | 1369 | radeon_atombios_fini(rdev); |
1373 | kfree(rdev->bios); | 1370 | kfree(rdev->bios); |
1374 | rdev->bios = NULL; | 1371 | rdev->bios = NULL; |
1375 | radeon_dummy_page_fini(rdev); | ||
1376 | } | 1372 | } |
1377 | 1373 | ||
1378 | static void rv770_pcie_gen2_enable(struct radeon_device *rdev) | 1374 | static void rv770_pcie_gen2_enable(struct radeon_device *rdev) |