21 files changed, 145 insertions, 114 deletions

diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index b1e11f8434e2..ac14b67621d3 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -405,16 +405,13 @@ bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector)
         u8 msg[DP_DPCD_SIZE];
         int ret;
 
-        char dpcd_hex_dump[DP_DPCD_SIZE * 3];
-
         ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_DPCD_REV, msg,
                                DP_DPCD_SIZE);
         if (ret > 0) {
                 memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE);
 
-                hex_dump_to_buffer(dig_connector->dpcd, sizeof(dig_connector->dpcd),
-                                   32, 1, dpcd_hex_dump, sizeof(dpcd_hex_dump), false);
-                DRM_DEBUG_KMS("DPCD: %s\n", dpcd_hex_dump);
+                DRM_DEBUG_KMS("DPCD: %*ph\n", (int)sizeof(dig_connector->dpcd),
+                              dig_connector->dpcd);
 
                 radeon_dp_probe_oui(radeon_connector);
 
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index fa9565957f9d..3d546c606b43 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -4803,7 +4803,7 @@ struct bonaire_mqd
  */
 static int cik_cp_compute_resume(struct radeon_device *rdev)
 {
-        int r, i, idx;
+        int r, i, j, idx;
         u32 tmp;
         bool use_doorbell = true;
         u64 hqd_gpu_addr;
@@ -4922,7 +4922,7 @@ static int cik_cp_compute_resume(struct radeon_device *rdev)
                 mqd->queue_state.cp_hqd_pq_wptr= 0;
                 if (RREG32(CP_HQD_ACTIVE) & 1) {
                         WREG32(CP_HQD_DEQUEUE_REQUEST, 1);
-                        for (i = 0; i < rdev->usec_timeout; i++) {
+                        for (j = 0; j < rdev->usec_timeout; j++) {
                                 if (!(RREG32(CP_HQD_ACTIVE) & 1))
                                         break;
                                 udelay(1);
@@ -7751,17 +7751,17 @@ static inline u32 cik_get_ih_wptr(struct radeon_device *rdev)
                 wptr = RREG32(IH_RB_WPTR);
 
         if (wptr & RB_OVERFLOW) {
+                wptr &= ~RB_OVERFLOW;
                 /* When a ring buffer overflow happen start parsing interrupt
                  * from the last not overwritten vector (wptr + 16). Hopefully
                  * this should allow us to catchup.
                  */
-                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n",
-                        wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
+                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
+                         wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask);
                 rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
                 tmp = RREG32(IH_RB_CNTL);
                 tmp |= IH_WPTR_OVERFLOW_CLEAR;
                 WREG32(IH_RB_CNTL, tmp);
-                wptr &= ~RB_OVERFLOW;
         }
         return (wptr & rdev->ih.ptr_mask);
 }
@@ -8251,6 +8251,7 @@ restart_ih:
                 /* wptr/rptr are in bytes! */
                 rptr += 16;
                 rptr &= rdev->ih.ptr_mask;
+                WREG32(IH_RB_RPTR, rptr);
         }
         if (queue_hotplug)
                 schedule_work(&rdev->hotplug_work);
@@ -8259,7 +8260,6 @@ restart_ih:
         if (queue_thermal)
                 schedule_work(&rdev->pm.dpm.thermal.work);
         rdev->ih.rptr = rptr;
-        WREG32(IH_RB_RPTR, rdev->ih.rptr);
         atomic_set(&rdev->ih.lock, 0);
 
         /* make sure wptr hasn't changed while processing */
diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c
index 192278bc993c..c4ffa54b1e3d 100644
--- a/drivers/gpu/drm/radeon/cik_sdma.c
+++ b/drivers/gpu/drm/radeon/cik_sdma.c
@@ -489,13 +489,6 @@ int cik_sdma_resume(struct radeon_device *rdev)
 {
         int r;
 
-        /* Reset dma */
-        WREG32(SRBM_SOFT_RESET, SOFT_RESET_SDMA | SOFT_RESET_SDMA1);
-        RREG32(SRBM_SOFT_RESET);
-        udelay(50);
-        WREG32(SRBM_SOFT_RESET, 0);
-        RREG32(SRBM_SOFT_RESET);
-
         r = cik_sdma_load_microcode(rdev);
         if (r)
                 return r;
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index dbca60c7d097..e50807c29f69 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -4749,17 +4749,17 @@ static u32 evergreen_get_ih_wptr(struct radeon_device *rdev)
                 wptr = RREG32(IH_RB_WPTR);
 
         if (wptr & RB_OVERFLOW) {
+                wptr &= ~RB_OVERFLOW;
                 /* When a ring buffer overflow happen start parsing interrupt
                  * from the last not overwritten vector (wptr + 16). Hopefully
                  * this should allow us to catchup.
                  */
-                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n",
-                        wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
+                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
+                         wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask);
                 rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
                 tmp = RREG32(IH_RB_CNTL);
                 tmp |= IH_WPTR_OVERFLOW_CLEAR;
                 WREG32(IH_RB_CNTL, tmp);
-                wptr &= ~RB_OVERFLOW;
         }
         return (wptr & rdev->ih.ptr_mask);
 }
@@ -5137,6 +5137,7 @@ restart_ih:
                 /* wptr/rptr are in bytes! */
                 rptr += 16;
                 rptr &= rdev->ih.ptr_mask;
+                WREG32(IH_RB_RPTR, rptr);
         }
         if (queue_hotplug)
                 schedule_work(&rdev->hotplug_work);
@@ -5145,7 +5146,6 @@ restart_ih:
         if (queue_thermal && rdev->pm.dpm_enabled)
                 schedule_work(&rdev->pm.dpm.thermal.work);
         rdev->ih.rptr = rptr;
-        WREG32(IH_RB_RPTR, rdev->ih.rptr);
         atomic_set(&rdev->ih.lock, 0);
 
         /* make sure wptr hasn't changed while processing */
diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c
index 8b58e11b64fa..67cb472d188c 100644
--- a/drivers/gpu/drm/radeon/kv_dpm.c
+++ b/drivers/gpu/drm/radeon/kv_dpm.c
@@ -33,6 +33,8 @@
 #define KV_MINIMUM_ENGINE_CLOCK         800
 #define SMC_RAM_END                     0x40000
 
+static int kv_enable_nb_dpm(struct radeon_device *rdev,
+                            bool enable);
 static void kv_init_graphics_levels(struct radeon_device *rdev);
 static int kv_calculate_ds_divider(struct radeon_device *rdev);
 static int kv_calculate_nbps_level_settings(struct radeon_device *rdev);
@@ -1295,6 +1297,9 @@ void kv_dpm_disable(struct radeon_device *rdev)
 {
         kv_smc_bapm_enable(rdev, false);
 
+        if (rdev->family == CHIP_MULLINS)
+                kv_enable_nb_dpm(rdev, false);
+
         /* powerup blocks */
         kv_dpm_powergate_acp(rdev, false);
         kv_dpm_powergate_samu(rdev, false);
@@ -1769,15 +1774,24 @@ static int kv_update_dfs_bypass_settings(struct radeon_device *rdev,
         return ret;
 }
 
-static int kv_enable_nb_dpm(struct radeon_device *rdev)
+static int kv_enable_nb_dpm(struct radeon_device *rdev,
+                            bool enable)
 {
         struct kv_power_info *pi = kv_get_pi(rdev);
         int ret = 0;
 
-        if (pi->enable_nb_dpm && !pi->nb_dpm_enabled) {
-                ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_NBDPM_Enable);
-                if (ret == 0)
-                        pi->nb_dpm_enabled = true;
+        if (enable) {
+                if (pi->enable_nb_dpm && !pi->nb_dpm_enabled) {
+                        ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_NBDPM_Enable);
+                        if (ret == 0)
+                                pi->nb_dpm_enabled = true;
+                }
+        } else {
+                if (pi->enable_nb_dpm && pi->nb_dpm_enabled) {
+                        ret = kv_notify_message_to_smu(rdev, PPSMC_MSG_NBDPM_Disable);
+                        if (ret == 0)
+                                pi->nb_dpm_enabled = false;
+                }
         }
 
         return ret;
@@ -1864,7 +1878,7 @@ int kv_dpm_set_power_state(struct radeon_device *rdev)
                         }
                         kv_update_sclk_t(rdev);
                         if (rdev->family == CHIP_MULLINS)
-                                kv_enable_nb_dpm(rdev);
+                                kv_enable_nb_dpm(rdev, true);
                 }
         } else {
                 if (pi->enable_dpm) {
@@ -1889,7 +1903,7 @@ int kv_dpm_set_power_state(struct radeon_device *rdev)
                         }
                         kv_update_acp_boot_level(rdev);
                         kv_update_sclk_t(rdev);
-                        kv_enable_nb_dpm(rdev);
+                        kv_enable_nb_dpm(rdev, true);
                 }
         }
 
diff --git a/drivers/gpu/drm/radeon/ni_dma.c b/drivers/gpu/drm/radeon/ni_dma.c
index 8a3e6221cece..f26f0a9fb522 100644
--- a/drivers/gpu/drm/radeon/ni_dma.c
+++ b/drivers/gpu/drm/radeon/ni_dma.c
@@ -191,12 +191,6 @@ int cayman_dma_resume(struct radeon_device *rdev)
         u32 reg_offset, wb_offset;
         int i, r;
 
-        /* Reset dma */
-        WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA | SOFT_RESET_DMA1);
-        RREG32(SRBM_SOFT_RESET);
-        udelay(50);
-        WREG32(SRBM_SOFT_RESET, 0);
-
         for (i = 0; i < 2; i++) {
                 if (i == 0) {
                         ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX];
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 4c5ec44ff328..b0098e792e62 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -821,6 +821,20 @@ u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc)
                 return RREG32(RADEON_CRTC2_CRNT_FRAME);
 }
 
+/**
+ * r100_ring_hdp_flush - flush Host Data Path via the ring buffer
+ * rdev: radeon device structure
+ * ring: ring buffer struct for emitting packets
+ */
+static void r100_ring_hdp_flush(struct radeon_device *rdev, struct radeon_ring *ring)
+{
+        radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));
+        radeon_ring_write(ring, rdev->config.r100.hdp_cntl |
+                                RADEON_HDP_READ_BUFFER_INVALIDATE);
+        radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));
+        radeon_ring_write(ring, rdev->config.r100.hdp_cntl);
+}
+
 /* Who ever call radeon_fence_emit should call ring_lock and ask
  * for enough space (today caller are ib schedule and buffer move) */
 void r100_fence_ring_emit(struct radeon_device *rdev,
@@ -1056,20 +1070,6 @@ void r100_gfx_set_wptr(struct radeon_device *rdev,
         (void)RREG32(RADEON_CP_RB_WPTR);
 }
 
-/**
- * r100_ring_hdp_flush - flush Host Data Path via the ring buffer
- * rdev: radeon device structure
- * ring: ring buffer struct for emitting packets
- */
-void r100_ring_hdp_flush(struct radeon_device *rdev, struct radeon_ring *ring)
-{
-        radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));
-        radeon_ring_write(ring, rdev->config.r100.hdp_cntl |
-                                RADEON_HDP_READ_BUFFER_INVALIDATE);
-        radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));
-        radeon_ring_write(ring, rdev->config.r100.hdp_cntl);
-}
-
 static void r100_cp_load_microcode(struct radeon_device *rdev)
 {
         const __be32 *fw_data;
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index e616eb5f6e7a..ea5c9af722ef 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2769,8 +2769,8 @@ bool r600_semaphore_ring_emit(struct radeon_device *rdev,
         radeon_ring_write(ring, lower_32_bits(addr));
         radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel);
 
-        /* PFP_SYNC_ME packet only exists on 7xx+ */
-        if (emit_wait && (rdev->family >= CHIP_RV770)) {
+        /* PFP_SYNC_ME packet only exists on 7xx+, only enable it on eg+ */
+        if (emit_wait && (rdev->family >= CHIP_CEDAR)) {
                 /* Prevent the PFP from running ahead of the semaphore wait */
                 radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
                 radeon_ring_write(ring, 0x0);
@@ -3792,17 +3792,17 @@ static u32 r600_get_ih_wptr(struct radeon_device *rdev)
                 wptr = RREG32(IH_RB_WPTR);
 
         if (wptr & RB_OVERFLOW) {
+                wptr &= ~RB_OVERFLOW;
                 /* When a ring buffer overflow happen start parsing interrupt
                  * from the last not overwritten vector (wptr + 16). Hopefully
                  * this should allow us to catchup.
                  */
-                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n",
-                        wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
+                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
+                         wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask);
                 rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
                 tmp = RREG32(IH_RB_CNTL);
                 tmp |= IH_WPTR_OVERFLOW_CLEAR;
                 WREG32(IH_RB_CNTL, tmp);
-                wptr &= ~RB_OVERFLOW;
         }
         return (wptr & rdev->ih.ptr_mask);
 }
@@ -4048,6 +4048,7 @@ restart_ih:
                 /* wptr/rptr are in bytes! */
                 rptr += 16;
                 rptr &= rdev->ih.ptr_mask;
+                WREG32(IH_RB_RPTR, rptr);
         }
         if (queue_hotplug)
                 schedule_work(&rdev->hotplug_work);
@@ -4056,7 +4057,6 @@ restart_ih:
         if (queue_thermal && rdev->pm.dpm_enabled)
                 schedule_work(&rdev->pm.dpm.thermal.work);
         rdev->ih.rptr = rptr;
-        WREG32(IH_RB_RPTR, rdev->ih.rptr);
         atomic_set(&rdev->ih.lock, 0);
 
         /* make sure wptr hasn't changed while processing */
diff --git a/drivers/gpu/drm/radeon/r600_dma.c b/drivers/gpu/drm/radeon/r600_dma.c
index 51fd98553eaf..a908daa006d2 100644
--- a/drivers/gpu/drm/radeon/r600_dma.c
+++ b/drivers/gpu/drm/radeon/r600_dma.c
@@ -124,15 +124,6 @@ int r600_dma_resume(struct radeon_device *rdev)
         u32 rb_bufsz;
         int r;
 
-        /* Reset dma */
-        if (rdev->family >= CHIP_RV770)
-                WREG32(SRBM_SOFT_RESET, RV770_SOFT_RESET_DMA);
-        else
-                WREG32(SRBM_SOFT_RESET, SOFT_RESET_DMA);
-        RREG32(SRBM_SOFT_RESET);
-        udelay(50);
-        WREG32(SRBM_SOFT_RESET, 0);
-
         WREG32(DMA_SEM_INCOMPLETE_TIMER_CNTL, 0);
         WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL, 0);
 
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index 0c4a7d8d93e0..31e1052ad3e3 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -44,13 +44,6 @@
 #define R6XX_MAX_PIPES                          8
 #define R6XX_MAX_PIPES_MASK                     0xff
 
-/* PTE flags */
-#define PTE_VALID                               (1 << 0)
-#define PTE_SYSTEM                              (1 << 1)
-#define PTE_SNOOPED                             (1 << 2)
-#define PTE_READABLE                            (1 << 5)
-#define PTE_WRITEABLE                           (1 << 6)
-
 /* tiling bits */
 #define     ARRAY_LINEAR_GENERAL              0x00000000
 #define     ARRAY_LINEAR_ALIGNED              0x00000001
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 5f05b4c84338..3247bfd14410 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -106,6 +106,7 @@ extern int radeon_vm_block_size;
 extern int radeon_deep_color;
 extern int radeon_use_pflipirq;
 extern int radeon_bapm;
+extern int radeon_backlight;
 
 /*
  * Copy from radeon_drv.h so we don't have to include both and have conflicting
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index eeeeabe09758..2dd5847f9b98 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -185,7 +185,6 @@ static struct radeon_asic_ring r100_gfx_ring = {
         .get_rptr = &r100_gfx_get_rptr,
         .get_wptr = &r100_gfx_get_wptr,
         .set_wptr = &r100_gfx_set_wptr,
-        .hdp_flush = &r100_ring_hdp_flush,
 };
 
 static struct radeon_asic r100_asic = {
@@ -332,7 +331,6 @@ static struct radeon_asic_ring r300_gfx_ring = {
         .get_rptr = &r100_gfx_get_rptr,
         .get_wptr = &r100_gfx_get_wptr,
         .set_wptr = &r100_gfx_set_wptr,
-        .hdp_flush = &r100_ring_hdp_flush,
 };
 
 static struct radeon_asic r300_asic = {
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 275a5dc01780..7756bc1e1cd3 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -148,8 +148,7 @@ u32 r100_gfx_get_wptr(struct radeon_device *rdev,
                       struct radeon_ring *ring);
 void r100_gfx_set_wptr(struct radeon_device *rdev,
                        struct radeon_ring *ring);
-void r100_ring_hdp_flush(struct radeon_device *rdev,
-                         struct radeon_ring *ring);
+
 /*
  * r200,rv250,rs300,rv280
  */
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 92b2d8dd4735..e74c7e387dde 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -447,6 +447,13 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev,
                 }
         }
 
+        /* Fujitsu D3003-S2 board lists DVI-I as DVI-I and VGA */
+        if ((dev->pdev->device == 0x9805) &&
+            (dev->pdev->subsystem_vendor == 0x1734) &&
+            (dev->pdev->subsystem_device == 0x11bd)) {
+                if (*connector_type == DRM_MODE_CONNECTOR_VGA)
+                        return false;
+        }
 
         return true;
 }
@@ -2281,19 +2288,31 @@ static void radeon_atombios_add_pplib_thermal_controller(struct radeon_device *r
                                  (controller->ucFanParameters &
                                   ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with");
                         rdev->pm.int_thermal_type = THERMAL_TYPE_KV;
-                } else if ((controller->ucType ==
-                            ATOM_PP_THERMALCONTROLLER_EXTERNAL_GPIO) ||
-                           (controller->ucType ==
-                            ATOM_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL) ||
-                           (controller->ucType ==
-                            ATOM_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL)) {
-                        DRM_INFO("Special thermal controller config\n");
+                } else if (controller->ucType ==
+                           ATOM_PP_THERMALCONTROLLER_EXTERNAL_GPIO) {
+                        DRM_INFO("External GPIO thermal controller %s fan control\n",
+                                 (controller->ucFanParameters &
+                                  ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with");
+                        rdev->pm.int_thermal_type = THERMAL_TYPE_EXTERNAL_GPIO;
+                } else if (controller->ucType ==
+                           ATOM_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL) {
+                        DRM_INFO("ADT7473 with internal thermal controller %s fan control\n",
+                                 (controller->ucFanParameters &
+                                  ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with");
+                        rdev->pm.int_thermal_type = THERMAL_TYPE_ADT7473_WITH_INTERNAL;
+                } else if (controller->ucType ==
+                           ATOM_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL) {
+                        DRM_INFO("EMC2103 with internal thermal controller %s fan control\n",
+                                 (controller->ucFanParameters &
+                                  ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with");
+                        rdev->pm.int_thermal_type = THERMAL_TYPE_EMC2103_WITH_INTERNAL;
                 } else if (controller->ucType < ARRAY_SIZE(pp_lib_thermal_controller_names)) {
                         DRM_INFO("Possible %s thermal controller at 0x%02x %s fan control\n",
                                  pp_lib_thermal_controller_names[controller->ucType],
                                  controller->ucI2cAddress >> 1,
                                  (controller->ucFanParameters &
                                   ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with");
+                        rdev->pm.int_thermal_type = THERMAL_TYPE_EXTERNAL;
                         i2c_bus = radeon_lookup_i2c_gpio(rdev, controller->ucI2cLine);
                         rdev->pm.i2c_bus = radeon_i2c_lookup(rdev, &i2c_bus);
                         if (rdev->pm.i2c_bus) {
diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
index a9fb0d016d38..8bc7d0bbd3c8 100644
--- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c
+++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c
@@ -33,7 +33,6 @@ static struct radeon_atpx_priv {
         bool atpx_detected;
         /* handle for device - and atpx */
         acpi_handle dhandle;
-        acpi_handle other_handle;
         struct radeon_atpx atpx;
 } radeon_atpx_priv;
 
@@ -453,10 +452,9 @@ static bool radeon_atpx_pci_probe_handle(struct pci_dev *pdev)
                 return false;
 
         status = acpi_get_handle(dhandle, "ATPX", &atpx_handle);
-        if (ACPI_FAILURE(status)) {
-                radeon_atpx_priv.other_handle = dhandle;
+        if (ACPI_FAILURE(status))
                 return false;
-        }
+
         radeon_atpx_priv.dhandle = dhandle;
         radeon_atpx_priv.atpx.handle = atpx_handle;
         return true;
@@ -540,16 +538,6 @@ static bool radeon_atpx_detect(void)
                 printk(KERN_INFO "VGA switcheroo: detected switching method %s handle\n",
                        acpi_method_name);
                 radeon_atpx_priv.atpx_detected = true;
-                /*
-                 * On some systems hotplug events are generated for the device
-                 * being switched off when ATPX is executed.  They cause ACPI
-                 * hotplug to trigger and attempt to remove the device from
-                 * the system, which causes it to break down.  Prevent that from
-                 * happening by setting the no_hotplug flag for the involved
-                 * ACPI device objects.
-                 */
-                acpi_bus_no_hotplug(radeon_atpx_priv.dhandle);
-                acpi_bus_no_hotplug(radeon_atpx_priv.other_handle);
                 return true;
         }
         return false;
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 6a219bcee66d..12c8329644c4 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -123,6 +123,10 @@ static struct radeon_px_quirk radeon_px_quirk_list[] = {
          * https://bugzilla.kernel.org/show_bug.cgi?id=51381
          */
         { PCI_VENDOR_ID_ATI, 0x6741, 0x1043, 0x108c, RADEON_PX_QUIRK_DISABLE_PX },
+        /* Asus K53TK laptop with AMD A6-3420M APU and Radeon 7670m GPU
+         * https://bugzilla.kernel.org/show_bug.cgi?id=51381
+         */
+        { PCI_VENDOR_ID_ATI, 0x6840, 0x1043, 0x2122, RADEON_PX_QUIRK_DISABLE_PX },
         /* macbook pro 8.2 */
         { PCI_VENDOR_ID_ATI, 0x6741, PCI_VENDOR_ID_APPLE, 0x00e2, RADEON_PX_QUIRK_LONG_WAKEUP },
         { 0, 0, 0, 0, 0 },
@@ -1393,7 +1397,7 @@ int radeon_device_init(struct radeon_device *rdev,
 
         r = radeon_init(rdev);
         if (r)
-                return r;
+                goto failed;
 
         r = radeon_ib_ring_tests(rdev);
         if (r)
@@ -1413,7 +1417,7 @@ int radeon_device_init(struct radeon_device *rdev,
                 radeon_agp_disable(rdev);
                 r = radeon_init(rdev);
                 if (r)
-                        return r;
+                        goto failed;
         }
 
         if ((radeon_testing & 1)) {
@@ -1435,6 +1439,11 @@ int radeon_device_init(struct radeon_device *rdev,
                         DRM_INFO("radeon: acceleration disabled, skipping benchmarks\n");
         }
         return 0;
+
+failed:
+        if (runtime)
+                vga_switcheroo_fini_domain_pm_ops(rdev->dev);
+        return r;
 }
 
 static void radeon_debugfs_remove_files(struct radeon_device *rdev);
@@ -1455,6 +1464,8 @@ void radeon_device_fini(struct radeon_device *rdev)
         radeon_bo_evict_vram(rdev);
         radeon_fini(rdev);
         vga_switcheroo_unregister_client(rdev->pdev);
+        if (rdev->flags & RADEON_IS_PX)
+                vga_switcheroo_fini_domain_pm_ops(rdev->dev);
         vga_client_register(rdev->pdev, NULL, NULL, NULL);
         if (rdev->rio_mem)
                 pci_iounmap(rdev->pdev, rdev->rio_mem);
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 8df888908833..f9d17b29b343 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -83,7 +83,7 @@
  *            CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
  *   2.39.0 - Add INFO query for number of active CUs
  *   2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
- *            CS to GPU
+ *            CS to GPU on >= r600
  */
 #define KMS_DRIVER_MAJOR        2
 #define KMS_DRIVER_MINOR        40
@@ -181,6 +181,7 @@ int radeon_vm_block_size = -1;
 int radeon_deep_color = 0;
 int radeon_use_pflipirq = 2;
 int radeon_bapm = -1;
+int radeon_backlight = -1;
 
 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
 module_param_named(no_wb, radeon_no_wb, int, 0444);
@@ -263,6 +264,9 @@ module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
 module_param_named(bapm, radeon_bapm, int, 0444);
 
+MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
+module_param_named(backlight, radeon_backlight, int, 0444);
+
 static struct pci_device_id pciidlist[] = {
         radeon_PCI_IDS
 };
@@ -440,6 +444,7 @@ static int radeon_pmops_runtime_suspend(struct device *dev)
         ret = radeon_suspend_kms(drm_dev, false, false);
         pci_save_state(pdev);
         pci_disable_device(pdev);
+        pci_ignore_hotplug(pdev);
         pci_set_power_state(pdev, PCI_D3cold);
         drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
 
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index 3c2094c25b53..15edf23b465c 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -158,10 +158,43 @@ radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8
         return ret;
 }
 
+static void radeon_encoder_add_backlight(struct radeon_encoder *radeon_encoder,
+                                         struct drm_connector *connector)
+{
+        struct drm_device *dev = radeon_encoder->base.dev;
+        struct radeon_device *rdev = dev->dev_private;
+        bool use_bl = false;
+
+        if (!(radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)))
+                return;
+
+        if (radeon_backlight == 0) {
+                return;
+        } else if (radeon_backlight == 1) {
+                use_bl = true;
+        } else if (radeon_backlight == -1) {
+                /* Quirks */
+                /* Amilo Xi 2550 only works with acpi bl */
+                if ((rdev->pdev->device == 0x9583) &&
+                    (rdev->pdev->subsystem_vendor == 0x1734) &&
+                    (rdev->pdev->subsystem_device == 0x1107))
+                        use_bl = false;
+                else
+                        use_bl = true;
+        }
+
+        if (use_bl) {
+                if (rdev->is_atom_bios)
+                        radeon_atom_backlight_init(radeon_encoder, connector);
+                else
+                        radeon_legacy_backlight_init(radeon_encoder, connector);
+                rdev->mode_info.bl_encoder = radeon_encoder;
+        }
+}
+
 void
 radeon_link_encoder_connector(struct drm_device *dev)
 {
-        struct radeon_device *rdev = dev->dev_private;
         struct drm_connector *connector;
         struct radeon_connector *radeon_connector;
         struct drm_encoder *encoder;
@@ -174,13 +207,8 @@ radeon_link_encoder_connector(struct drm_device *dev)
                         radeon_encoder = to_radeon_encoder(encoder);
                         if (radeon_encoder->devices & radeon_connector->devices) {
                                 drm_mode_connector_attach_encoder(connector, encoder);
-                                if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
-                                        if (rdev->is_atom_bios)
-                                                radeon_atom_backlight_init(radeon_encoder, connector);
-                                        else
-                                                radeon_legacy_backlight_init(radeon_encoder, connector);
-                                        rdev->mode_info.bl_encoder = radeon_encoder;
-                                }
+                                if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
+                                        radeon_encoder_add_backlight(radeon_encoder, connector);
                         }
                 }
         }
diff --git a/drivers/gpu/drm/radeon/radeon_semaphore.c b/drivers/gpu/drm/radeon/radeon_semaphore.c
index 56d9fd66d8ae..abd6753a570a 100644
--- a/drivers/gpu/drm/radeon/radeon_semaphore.c
+++ b/drivers/gpu/drm/radeon/radeon_semaphore.c
@@ -34,7 +34,7 @@
 int radeon_semaphore_create(struct radeon_device *rdev,
                             struct radeon_semaphore **semaphore)
 {
-        uint32_t *cpu_addr;
+        uint64_t *cpu_addr;
         int i, r;
 
         *semaphore = kmalloc(sizeof(struct radeon_semaphore), GFP_KERNEL);
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index 6c1fc339d228..c5799f16aa4b 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -221,9 +221,9 @@ void rs400_gart_set_page(struct radeon_device *rdev, unsigned i,
         entry = (lower_32_bits(addr) & PAGE_MASK) |
                 ((upper_32_bits(addr) & 0xff) << 4);
         if (flags & RADEON_GART_PAGE_READ)
-                addr |= RS400_PTE_READABLE;
+                entry |= RS400_PTE_READABLE;
         if (flags & RADEON_GART_PAGE_WRITE)
-                addr |= RS400_PTE_WRITEABLE;
+                entry |= RS400_PTE_WRITEABLE;
         if (!(flags & RADEON_GART_PAGE_SNOOP))
                 entry |= RS400_PTE_UNSNOOPED;
         entry = cpu_to_le32(entry);
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 6bce40847753..3a0b973e8a96 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -6316,17 +6316,17 @@ static inline u32 si_get_ih_wptr(struct radeon_device *rdev)
                 wptr = RREG32(IH_RB_WPTR);
 
         if (wptr & RB_OVERFLOW) {
+                wptr &= ~RB_OVERFLOW;
                 /* When a ring buffer overflow happen start parsing interrupt
                  * from the last not overwritten vector (wptr + 16). Hopefully
                  * this should allow us to catchup.
                  */
-                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n",
-                        wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
+                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
+                         wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask);
                 rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
                 tmp = RREG32(IH_RB_CNTL);
                 tmp |= IH_WPTR_OVERFLOW_CLEAR;
                 WREG32(IH_RB_CNTL, tmp);
-                wptr &= ~RB_OVERFLOW;
         }
         return (wptr & rdev->ih.ptr_mask);
 }
@@ -6664,13 +6664,13 @@ restart_ih:
                 /* wptr/rptr are in bytes! */
                 rptr += 16;
                 rptr &= rdev->ih.ptr_mask;
+                WREG32(IH_RB_RPTR, rptr);
         }
         if (queue_hotplug)
                 schedule_work(&rdev->hotplug_work);
         if (queue_thermal && rdev->pm.dpm_enabled)
                 schedule_work(&rdev->pm.dpm.thermal.work);
         rdev->ih.rptr = rptr;
-        WREG32(IH_RB_RPTR, rdev->ih.rptr);
         atomic_set(&rdev->ih.lock, 0);
 
         /* make sure wptr hasn't changed while processing */