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-rw-r--r--drivers/gpu/drm/radeon/atombios.h16
-rw-r--r--drivers/gpu/drm/radeon/r600.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_fb.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_state.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_ttm.c2
-rw-r--r--drivers/gpu/drm/radeon/rv770.c4
6 files changed, 15 insertions, 15 deletions
diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h
index c11ddddfb3b6..6643afc36cea 100644
--- a/drivers/gpu/drm/radeon/atombios.h
+++ b/drivers/gpu/drm/radeon/atombios.h
@@ -1141,7 +1141,7 @@ typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS {
1141/* ucTableFormatRevision=1,ucTableContentRevision=2 */ 1141/* ucTableFormatRevision=1,ucTableContentRevision=2 */
1142typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS_V2 { 1142typedef struct _LVDS_ENCODER_CONTROL_PARAMETERS_V2 {
1143 USHORT usPixelClock; /* in 10KHz; for bios convenient */ 1143 USHORT usPixelClock; /* in 10KHz; for bios convenient */
1144 UCHAR ucMisc; /* see PANEL_ENCODER_MISC_xx defintions below */ 1144 UCHAR ucMisc; /* see PANEL_ENCODER_MISC_xx definitions below */
1145 UCHAR ucAction; /* 0: turn off encoder */ 1145 UCHAR ucAction; /* 0: turn off encoder */
1146 /* 1: setup and turn on encoder */ 1146 /* 1: setup and turn on encoder */
1147 UCHAR ucTruncate; /* bit0=0: Disable truncate */ 1147 UCHAR ucTruncate; /* bit0=0: Disable truncate */
@@ -1424,7 +1424,7 @@ typedef struct _ATOM_MULTIMEDIA_CONFIG_INFO {
1424/* Structures used in FirmwareInfoTable */ 1424/* Structures used in FirmwareInfoTable */
1425/****************************************************************************/ 1425/****************************************************************************/
1426 1426
1427/* usBIOSCapability Defintion: */ 1427/* usBIOSCapability Definition: */
1428/* Bit 0 = 0: Bios image is not Posted, =1:Bios image is Posted; */ 1428/* Bit 0 = 0: Bios image is not Posted, =1:Bios image is Posted; */
1429/* Bit 1 = 0: Dual CRTC is not supported, =1: Dual CRTC is supported; */ 1429/* Bit 1 = 0: Dual CRTC is not supported, =1: Dual CRTC is supported; */
1430/* Bit 2 = 0: Extended Desktop is not supported, =1: Extended Desktop is supported; */ 1430/* Bit 2 = 0: Extended Desktop is not supported, =1: Extended Desktop is supported; */
@@ -2386,7 +2386,7 @@ typedef struct _ATOM_ANALOG_TV_INFO_V1_2 {
2386} ATOM_ANALOG_TV_INFO_V1_2; 2386} ATOM_ANALOG_TV_INFO_V1_2;
2387 2387
2388/**************************************************************************/ 2388/**************************************************************************/
2389/* VRAM usage and their defintions */ 2389/* VRAM usage and their definitions */
2390 2390
2391/* One chunk of VRAM used by Bios are for HWICON surfaces,EDID data. */ 2391/* One chunk of VRAM used by Bios are for HWICON surfaces,EDID data. */
2392/* Current Mode timing and Dail Timing and/or STD timing data EACH device. They can be broken down as below. */ 2392/* Current Mode timing and Dail Timing and/or STD timing data EACH device. They can be broken down as below. */
@@ -3046,7 +3046,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
3046#define ATOM_S0_SYSTEM_POWER_STATE_VALUE_DC 2 3046#define ATOM_S0_SYSTEM_POWER_STATE_VALUE_DC 2
3047#define ATOM_S0_SYSTEM_POWER_STATE_VALUE_LITEAC 3 3047#define ATOM_S0_SYSTEM_POWER_STATE_VALUE_LITEAC 3
3048 3048
3049/* Byte aligned defintion for BIOS usage */ 3049/* Byte aligned definition for BIOS usage */
3050#define ATOM_S0_CRT1_MONOb0 0x01 3050#define ATOM_S0_CRT1_MONOb0 0x01
3051#define ATOM_S0_CRT1_COLORb0 0x02 3051#define ATOM_S0_CRT1_COLORb0 0x02
3052#define ATOM_S0_CRT1_MASKb0 (ATOM_S0_CRT1_MONOb0+ATOM_S0_CRT1_COLORb0) 3052#define ATOM_S0_CRT1_MASKb0 (ATOM_S0_CRT1_MONOb0+ATOM_S0_CRT1_COLORb0)
@@ -3131,7 +3131,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
3131#define ATOM_S2_DISPLAY_ROTATION_DEGREE_SHIFT 30 3131#define ATOM_S2_DISPLAY_ROTATION_DEGREE_SHIFT 30
3132#define ATOM_S2_DISPLAY_ROTATION_ANGLE_MASK 0xC0000000L 3132#define ATOM_S2_DISPLAY_ROTATION_ANGLE_MASK 0xC0000000L
3133 3133
3134/* Byte aligned defintion for BIOS usage */ 3134/* Byte aligned definition for BIOS usage */
3135#define ATOM_S2_TV1_STANDARD_MASKb0 0x0F 3135#define ATOM_S2_TV1_STANDARD_MASKb0 0x0F
3136#define ATOM_S2_CURRENT_BL_LEVEL_MASKb1 0xFF 3136#define ATOM_S2_CURRENT_BL_LEVEL_MASKb1 0xFF
3137#define ATOM_S2_CRT1_DPMS_STATEb2 0x01 3137#define ATOM_S2_CRT1_DPMS_STATEb2 0x01
@@ -3190,7 +3190,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
3190#define ATOM_S3_ALLOW_FAST_PWR_SWITCH 0x40000000L 3190#define ATOM_S3_ALLOW_FAST_PWR_SWITCH 0x40000000L
3191#define ATOM_S3_RQST_GPU_USE_MIN_PWR 0x80000000L 3191#define ATOM_S3_RQST_GPU_USE_MIN_PWR 0x80000000L
3192 3192
3193/* Byte aligned defintion for BIOS usage */ 3193/* Byte aligned definition for BIOS usage */
3194#define ATOM_S3_CRT1_ACTIVEb0 0x01 3194#define ATOM_S3_CRT1_ACTIVEb0 0x01
3195#define ATOM_S3_LCD1_ACTIVEb0 0x02 3195#define ATOM_S3_LCD1_ACTIVEb0 0x02
3196#define ATOM_S3_TV1_ACTIVEb0 0x04 3196#define ATOM_S3_TV1_ACTIVEb0 0x04
@@ -3230,7 +3230,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
3230#define ATOM_S4_LCD1_REFRESH_MASK 0x0000FF00L 3230#define ATOM_S4_LCD1_REFRESH_MASK 0x0000FF00L
3231#define ATOM_S4_LCD1_REFRESH_SHIFT 8 3231#define ATOM_S4_LCD1_REFRESH_SHIFT 8
3232 3232
3233/* Byte aligned defintion for BIOS usage */ 3233/* Byte aligned definition for BIOS usage */
3234#define ATOM_S4_LCD1_PANEL_ID_MASKb0 0x0FF 3234#define ATOM_S4_LCD1_PANEL_ID_MASKb0 0x0FF
3235#define ATOM_S4_LCD1_REFRESH_MASKb1 ATOM_S4_LCD1_PANEL_ID_MASKb0 3235#define ATOM_S4_LCD1_REFRESH_MASKb1 ATOM_S4_LCD1_PANEL_ID_MASKb0
3236#define ATOM_S4_VRAM_INFO_MASKb2 ATOM_S4_LCD1_PANEL_ID_MASKb0 3236#define ATOM_S4_VRAM_INFO_MASKb2 ATOM_S4_LCD1_PANEL_ID_MASKb0
@@ -3310,7 +3310,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO {
3310#define ATOM_S6_VRI_BRIGHTNESS_CHANGE 0x40000000L 3310#define ATOM_S6_VRI_BRIGHTNESS_CHANGE 0x40000000L
3311#define ATOM_S6_CONFIG_DISPLAY_CHANGE_MASK 0x80000000L 3311#define ATOM_S6_CONFIG_DISPLAY_CHANGE_MASK 0x80000000L
3312 3312
3313/* Byte aligned defintion for BIOS usage */ 3313/* Byte aligned definition for BIOS usage */
3314#define ATOM_S6_DEVICE_CHANGEb0 0x01 3314#define ATOM_S6_DEVICE_CHANGEb0 0x01
3315#define ATOM_S6_SCALER_CHANGEb0 0x02 3315#define ATOM_S6_SCALER_CHANGEb0 0x02
3316#define ATOM_S6_LID_CHANGEb0 0x04 3316#define ATOM_S6_LID_CHANGEb0 0x04
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 278f646bc18e..6740ed24358f 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -394,11 +394,11 @@ int r600_mc_init(struct radeon_device *rdev)
394 * AGP so that GPU can catch out of VRAM/AGP access 394 * AGP so that GPU can catch out of VRAM/AGP access
395 */ 395 */
396 if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) { 396 if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
397 /* Enought place before */ 397 /* Enough place before */
398 rdev->mc.vram_location = rdev->mc.gtt_location - 398 rdev->mc.vram_location = rdev->mc.gtt_location -
399 rdev->mc.mc_vram_size; 399 rdev->mc.mc_vram_size;
400 } else if (tmp > rdev->mc.mc_vram_size) { 400 } else if (tmp > rdev->mc.mc_vram_size) {
401 /* Enought place after */ 401 /* Enough place after */
402 rdev->mc.vram_location = rdev->mc.gtt_location + 402 rdev->mc.vram_location = rdev->mc.gtt_location +
403 rdev->mc.gtt_size; 403 rdev->mc.gtt_size;
404 } else { 404 } else {
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index b38c4c8e2c61..d10eb43645c8 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -59,7 +59,7 @@ static struct fb_ops radeonfb_ops = {
59}; 59};
60 60
61/** 61/**
62 * Curretly it is assumed that the old framebuffer is reused. 62 * Currently it is assumed that the old framebuffer is reused.
63 * 63 *
64 * LOCKING 64 * LOCKING
65 * caller should hold the mode config lock. 65 * caller should hold the mode config lock.
diff --git a/drivers/gpu/drm/radeon/radeon_state.c b/drivers/gpu/drm/radeon/radeon_state.c
index 38537d971a3e..067167cb39ca 100644
--- a/drivers/gpu/drm/radeon/radeon_state.c
+++ b/drivers/gpu/drm/radeon/radeon_state.c
@@ -1950,7 +1950,7 @@ static void radeon_apply_surface_regs(int surf_index,
1950 * Note that refcount can be at most 2, since during a free refcount=3 1950 * Note that refcount can be at most 2, since during a free refcount=3
1951 * might mean we have to allocate a new surface which might not always 1951 * might mean we have to allocate a new surface which might not always
1952 * be available. 1952 * be available.
1953 * For example : we allocate three contigous surfaces ABC. If B is 1953 * For example : we allocate three contiguous surfaces ABC. If B is
1954 * freed, we suddenly need two surfaces to store A and C, which might 1954 * freed, we suddenly need two surfaces to store A and C, which might
1955 * not always be available. 1955 * not always be available.
1956 */ 1956 */
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 1381e06d6af3..eda4ade24c3a 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -378,7 +378,7 @@ static int radeon_bo_move(struct ttm_buffer_object *bo,
378 new_mem->mem_type == TTM_PL_SYSTEM) || 378 new_mem->mem_type == TTM_PL_SYSTEM) ||
379 (old_mem->mem_type == TTM_PL_SYSTEM && 379 (old_mem->mem_type == TTM_PL_SYSTEM &&
380 new_mem->mem_type == TTM_PL_TT)) { 380 new_mem->mem_type == TTM_PL_TT)) {
381 /* bind is enought */ 381 /* bind is enough */
382 radeon_move_null(bo, new_mem); 382 radeon_move_null(bo, new_mem);
383 return 0; 383 return 0;
384 } 384 }
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index b0efd0ddae7a..5e06ee7076f5 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -829,11 +829,11 @@ int rv770_mc_init(struct radeon_device *rdev)
829 * AGP so that GPU can catch out of VRAM/AGP access 829 * AGP so that GPU can catch out of VRAM/AGP access
830 */ 830 */
831 if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) { 831 if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
832 /* Enought place before */ 832 /* Enough place before */
833 rdev->mc.vram_location = rdev->mc.gtt_location - 833 rdev->mc.vram_location = rdev->mc.gtt_location -
834 rdev->mc.mc_vram_size; 834 rdev->mc.mc_vram_size;
835 } else if (tmp > rdev->mc.mc_vram_size) { 835 } else if (tmp > rdev->mc.mc_vram_size) {
836 /* Enought place after */ 836 /* Enough place after */
837 rdev->mc.vram_location = rdev->mc.gtt_location + 837 rdev->mc.vram_location = rdev->mc.gtt_location +
838 rdev->mc.gtt_size; 838 rdev->mc.gtt_size;
839 } else { 839 } else {