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path: root/drivers/gpu/drm/radeon
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-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c51
-rw-r--r--drivers/gpu/drm/radeon/atombios_dp.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_agp.c8
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.c1
-rw-r--r--drivers/gpu/drm/radeon/radeon_atombios.c39
-rw-r--r--drivers/gpu/drm/radeon/radeon_combios.c104
-rw-r--r--drivers/gpu/drm/radeon/radeon_connectors.c26
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c15
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c223
-rw-r--r--drivers/gpu/drm/radeon/radeon_fb.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_i2c.c7
-rw-r--r--drivers/gpu/drm/radeon/radeon_irq_kms.c5
-rw-r--r--drivers/gpu/drm/radeon/radeon_kms.c79
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_crtc.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_encoders.c7
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h3
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c5
-rw-r--r--drivers/gpu/drm/radeon/radeon_state.c56
19 files changed, 360 insertions, 277 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 12ad512bd3d3..577239a24fd5 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -471,6 +471,8 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
471 struct radeon_encoder *radeon_encoder = NULL; 471 struct radeon_encoder *radeon_encoder = NULL;
472 u32 adjusted_clock = mode->clock; 472 u32 adjusted_clock = mode->clock;
473 int encoder_mode = 0; 473 int encoder_mode = 0;
474 u32 dp_clock = mode->clock;
475 int bpc = 8;
474 476
475 /* reset the pll flags */ 477 /* reset the pll flags */
476 pll->flags = 0; 478 pll->flags = 0;
@@ -513,6 +515,17 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
513 if (encoder->crtc == crtc) { 515 if (encoder->crtc == crtc) {
514 radeon_encoder = to_radeon_encoder(encoder); 516 radeon_encoder = to_radeon_encoder(encoder);
515 encoder_mode = atombios_get_encoder_mode(encoder); 517 encoder_mode = atombios_get_encoder_mode(encoder);
518 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) {
519 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
520 if (connector) {
521 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
522 struct radeon_connector_atom_dig *dig_connector =
523 radeon_connector->con_priv;
524
525 dp_clock = dig_connector->dp_clock;
526 }
527 }
528
516 if (ASIC_IS_AVIVO(rdev)) { 529 if (ASIC_IS_AVIVO(rdev)) {
517 /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */ 530 /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */
518 if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1) 531 if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1)
@@ -555,6 +568,14 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
555 args.v1.usPixelClock = cpu_to_le16(mode->clock / 10); 568 args.v1.usPixelClock = cpu_to_le16(mode->clock / 10);
556 args.v1.ucTransmitterID = radeon_encoder->encoder_id; 569 args.v1.ucTransmitterID = radeon_encoder->encoder_id;
557 args.v1.ucEncodeMode = encoder_mode; 570 args.v1.ucEncodeMode = encoder_mode;
571 if (encoder_mode == ATOM_ENCODER_MODE_DP) {
572 /* may want to enable SS on DP eventually */
573 /* args.v1.ucConfig |=
574 ADJUST_DISPLAY_CONFIG_SS_ENABLE;*/
575 } else if (encoder_mode == ATOM_ENCODER_MODE_LVDS) {
576 args.v1.ucConfig |=
577 ADJUST_DISPLAY_CONFIG_SS_ENABLE;
578 }
558 579
559 atom_execute_table(rdev->mode_info.atom_context, 580 atom_execute_table(rdev->mode_info.atom_context,
560 index, (uint32_t *)&args); 581 index, (uint32_t *)&args);
@@ -568,10 +589,20 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
568 if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { 589 if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) {
569 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 590 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
570 591
571 if (encoder_mode == ATOM_ENCODER_MODE_DP) 592 if (encoder_mode == ATOM_ENCODER_MODE_DP) {
593 /* may want to enable SS on DP/eDP eventually */
594 /*args.v3.sInput.ucDispPllConfig |=
595 DISPPLL_CONFIG_SS_ENABLE;*/
572 args.v3.sInput.ucDispPllConfig |= 596 args.v3.sInput.ucDispPllConfig |=
573 DISPPLL_CONFIG_COHERENT_MODE; 597 DISPPLL_CONFIG_COHERENT_MODE;
574 else { 598 /* 16200 or 27000 */
599 args.v3.sInput.usPixelClock = cpu_to_le16(dp_clock / 10);
600 } else {
601 if (encoder_mode == ATOM_ENCODER_MODE_HDMI) {
602 /* deep color support */
603 args.v3.sInput.usPixelClock =
604 cpu_to_le16((mode->clock * bpc / 8) / 10);
605 }
575 if (dig->coherent_mode) 606 if (dig->coherent_mode)
576 args.v3.sInput.ucDispPllConfig |= 607 args.v3.sInput.ucDispPllConfig |=
577 DISPPLL_CONFIG_COHERENT_MODE; 608 DISPPLL_CONFIG_COHERENT_MODE;
@@ -580,13 +611,19 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
580 DISPPLL_CONFIG_DUAL_LINK; 611 DISPPLL_CONFIG_DUAL_LINK;
581 } 612 }
582 } else if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { 613 } else if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
583 /* may want to enable SS on DP/eDP eventually */ 614 if (encoder_mode == ATOM_ENCODER_MODE_DP) {
584 /*args.v3.sInput.ucDispPllConfig |= 615 /* may want to enable SS on DP/eDP eventually */
585 DISPPLL_CONFIG_SS_ENABLE;*/ 616 /*args.v3.sInput.ucDispPllConfig |=
586 if (encoder_mode == ATOM_ENCODER_MODE_DP) 617 DISPPLL_CONFIG_SS_ENABLE;*/
587 args.v3.sInput.ucDispPllConfig |= 618 args.v3.sInput.ucDispPllConfig |=
588 DISPPLL_CONFIG_COHERENT_MODE; 619 DISPPLL_CONFIG_COHERENT_MODE;
589 else { 620 /* 16200 or 27000 */
621 args.v3.sInput.usPixelClock = cpu_to_le16(dp_clock / 10);
622 } else if (encoder_mode == ATOM_ENCODER_MODE_LVDS) {
623 /* want to enable SS on LVDS eventually */
624 /*args.v3.sInput.ucDispPllConfig |=
625 DISPPLL_CONFIG_SS_ENABLE;*/
626 } else {
590 if (mode->clock > 165000) 627 if (mode->clock > 165000)
591 args.v3.sInput.ucDispPllConfig |= 628 args.v3.sInput.ucDispPllConfig |=
592 DISPPLL_CONFIG_DUAL_LINK; 629 DISPPLL_CONFIG_DUAL_LINK;
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index 36e0d4b545e6..4e7778d44b8d 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -610,7 +610,7 @@ void dp_link_train(struct drm_encoder *encoder,
610 enc_id |= ATOM_DP_CONFIG_DIG2_ENCODER; 610 enc_id |= ATOM_DP_CONFIG_DIG2_ENCODER;
611 else 611 else
612 enc_id |= ATOM_DP_CONFIG_DIG1_ENCODER; 612 enc_id |= ATOM_DP_CONFIG_DIG1_ENCODER;
613 if (dig_connector->linkb) 613 if (dig->linkb)
614 enc_id |= ATOM_DP_CONFIG_LINK_B; 614 enc_id |= ATOM_DP_CONFIG_LINK_B;
615 else 615 else
616 enc_id |= ATOM_DP_CONFIG_LINK_A; 616 enc_id |= ATOM_DP_CONFIG_LINK_A;
diff --git a/drivers/gpu/drm/radeon/radeon_agp.c b/drivers/gpu/drm/radeon/radeon_agp.c
index f40dfb77f9b1..bd2f33e5c91a 100644
--- a/drivers/gpu/drm/radeon/radeon_agp.c
+++ b/drivers/gpu/drm/radeon/radeon_agp.c
@@ -156,7 +156,13 @@ int radeon_agp_init(struct radeon_device *rdev)
156 } 156 }
157 157
158 mode.mode = info.mode; 158 mode.mode = info.mode;
159 agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode; 159 /* chips with the agp to pcie bridge don't have the AGP_STATUS register
160 * Just use the whatever mode the host sets up.
161 */
162 if (rdev->family <= CHIP_RV350)
163 agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode;
164 else
165 agp_status = mode.mode;
160 is_v3 = !!(agp_status & RADEON_AGPv3_MODE); 166 is_v3 = !!(agp_status & RADEON_AGPv3_MODE);
161 167
162 if (is_v3) { 168 if (is_v3) {
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 646f96f97c77..a21bf88e8c2d 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -733,6 +733,7 @@ static struct radeon_asic evergreen_asic = {
733 .set_engine_clock = &radeon_atom_set_engine_clock, 733 .set_engine_clock = &radeon_atom_set_engine_clock,
734 .get_memory_clock = &radeon_atom_get_memory_clock, 734 .get_memory_clock = &radeon_atom_get_memory_clock,
735 .set_memory_clock = &radeon_atom_set_memory_clock, 735 .set_memory_clock = &radeon_atom_set_memory_clock,
736 .get_pcie_lanes = NULL,
736 .set_pcie_lanes = NULL, 737 .set_pcie_lanes = NULL,
737 .set_clock_gating = NULL, 738 .set_clock_gating = NULL,
738 .set_surface_reg = r600_set_surface_reg, 739 .set_surface_reg = r600_set_surface_reg,
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 6d30868744ee..61141981880d 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -32,11 +32,11 @@
32 32
33/* from radeon_encoder.c */ 33/* from radeon_encoder.c */
34extern uint32_t 34extern uint32_t
35radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, 35radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device,
36 uint8_t dac); 36 uint8_t dac);
37extern void radeon_link_encoder_connector(struct drm_device *dev); 37extern void radeon_link_encoder_connector(struct drm_device *dev);
38extern void 38extern void
39radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, 39radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_enum,
40 uint32_t supported_device); 40 uint32_t supported_device);
41 41
42/* from radeon_connector.c */ 42/* from radeon_connector.c */
@@ -46,14 +46,14 @@ radeon_add_atom_connector(struct drm_device *dev,
46 uint32_t supported_device, 46 uint32_t supported_device,
47 int connector_type, 47 int connector_type,
48 struct radeon_i2c_bus_rec *i2c_bus, 48 struct radeon_i2c_bus_rec *i2c_bus,
49 bool linkb, uint32_t igp_lane_info, 49 uint32_t igp_lane_info,
50 uint16_t connector_object_id, 50 uint16_t connector_object_id,
51 struct radeon_hpd *hpd, 51 struct radeon_hpd *hpd,
52 struct radeon_router *router); 52 struct radeon_router *router);
53 53
54/* from radeon_legacy_encoder.c */ 54/* from radeon_legacy_encoder.c */
55extern void 55extern void
56radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, 56radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum,
57 uint32_t supported_device); 57 uint32_t supported_device);
58 58
59union atom_supported_devices { 59union atom_supported_devices {
@@ -226,6 +226,8 @@ static struct radeon_hpd radeon_atom_get_hpd_info_from_gpio(struct radeon_device
226 struct radeon_hpd hpd; 226 struct radeon_hpd hpd;
227 u32 reg; 227 u32 reg;
228 228
229 memset(&hpd, 0, sizeof(struct radeon_hpd));
230
229 if (ASIC_IS_DCE4(rdev)) 231 if (ASIC_IS_DCE4(rdev))
230 reg = EVERGREEN_DC_GPIO_HPD_A; 232 reg = EVERGREEN_DC_GPIO_HPD_A;
231 else 233 else
@@ -477,7 +479,6 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
477 int i, j, k, path_size, device_support; 479 int i, j, k, path_size, device_support;
478 int connector_type; 480 int connector_type;
479 u16 igp_lane_info, conn_id, connector_object_id; 481 u16 igp_lane_info, conn_id, connector_object_id;
480 bool linkb;
481 struct radeon_i2c_bus_rec ddc_bus; 482 struct radeon_i2c_bus_rec ddc_bus;
482 struct radeon_router router; 483 struct radeon_router router;
483 struct radeon_gpio_rec gpio; 484 struct radeon_gpio_rec gpio;
@@ -510,7 +511,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
510 addr += path_size; 511 addr += path_size;
511 path = (ATOM_DISPLAY_OBJECT_PATH *) addr; 512 path = (ATOM_DISPLAY_OBJECT_PATH *) addr;
512 path_size += le16_to_cpu(path->usSize); 513 path_size += le16_to_cpu(path->usSize);
513 linkb = false; 514
514 if (device_support & le16_to_cpu(path->usDeviceTag)) { 515 if (device_support & le16_to_cpu(path->usDeviceTag)) {
515 uint8_t con_obj_id, con_obj_num, con_obj_type; 516 uint8_t con_obj_id, con_obj_num, con_obj_type;
516 517
@@ -601,13 +602,10 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
601 OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT; 602 OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT;
602 603
603 if (grph_obj_type == GRAPH_OBJECT_TYPE_ENCODER) { 604 if (grph_obj_type == GRAPH_OBJECT_TYPE_ENCODER) {
604 if (grph_obj_num == 2) 605 u16 encoder_obj = le16_to_cpu(path->usGraphicObjIds[j]);
605 linkb = true;
606 else
607 linkb = false;
608 606
609 radeon_add_atom_encoder(dev, 607 radeon_add_atom_encoder(dev,
610 grph_obj_id, 608 encoder_obj,
611 le16_to_cpu 609 le16_to_cpu
612 (path-> 610 (path->
613 usDeviceTag)); 611 usDeviceTag));
@@ -744,7 +742,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
744 le16_to_cpu(path-> 742 le16_to_cpu(path->
745 usDeviceTag), 743 usDeviceTag),
746 connector_type, &ddc_bus, 744 connector_type, &ddc_bus,
747 linkb, igp_lane_info, 745 igp_lane_info,
748 connector_object_id, 746 connector_object_id,
749 &hpd, 747 &hpd,
750 &router); 748 &router);
@@ -933,13 +931,13 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct
933 931
934 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) 932 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom)
935 radeon_add_atom_encoder(dev, 933 radeon_add_atom_encoder(dev,
936 radeon_get_encoder_id(dev, 934 radeon_get_encoder_enum(dev,
937 (1 << i), 935 (1 << i),
938 dac), 936 dac),
939 (1 << i)); 937 (1 << i));
940 else 938 else
941 radeon_add_legacy_encoder(dev, 939 radeon_add_legacy_encoder(dev,
942 radeon_get_encoder_id(dev, 940 radeon_get_encoder_enum(dev,
943 (1 << i), 941 (1 << i),
944 dac), 942 dac),
945 (1 << i)); 943 (1 << i));
@@ -996,7 +994,7 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct
996 bios_connectors[i]. 994 bios_connectors[i].
997 connector_type, 995 connector_type,
998 &bios_connectors[i].ddc_bus, 996 &bios_connectors[i].ddc_bus,
999 false, 0, 997 0,
1000 connector_object_id, 998 connector_object_id,
1001 &bios_connectors[i].hpd, 999 &bios_connectors[i].hpd,
1002 &router); 1000 &router);
@@ -1183,7 +1181,7 @@ bool radeon_atombios_sideport_present(struct radeon_device *rdev)
1183 return true; 1181 return true;
1184 break; 1182 break;
1185 case 2: 1183 case 2:
1186 if (igp_info->info_2.ucMemoryType & 0x0f) 1184 if (igp_info->info_2.ulBootUpSidePortClock)
1187 return true; 1185 return true;
1188 break; 1186 break;
1189 default: 1187 default:
@@ -1305,6 +1303,7 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct
1305 union lvds_info *lvds_info; 1303 union lvds_info *lvds_info;
1306 uint8_t frev, crev; 1304 uint8_t frev, crev;
1307 struct radeon_encoder_atom_dig *lvds = NULL; 1305 struct radeon_encoder_atom_dig *lvds = NULL;
1306 int encoder_enum = (encoder->encoder_enum & ENUM_ID_MASK) >> ENUM_ID_SHIFT;
1308 1307
1309 if (atom_parse_data_header(mode_info->atom_context, index, NULL, 1308 if (atom_parse_data_header(mode_info->atom_context, index, NULL,
1310 &frev, &crev, &data_offset)) { 1309 &frev, &crev, &data_offset)) {
@@ -1368,6 +1367,12 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct
1368 } 1367 }
1369 1368
1370 encoder->native_mode = lvds->native_mode; 1369 encoder->native_mode = lvds->native_mode;
1370
1371 if (encoder_enum == 2)
1372 lvds->linkb = true;
1373 else
1374 lvds->linkb = false;
1375
1371 } 1376 }
1372 return lvds; 1377 return lvds;
1373} 1378}
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index 885dcfac1838..bd74e428bd14 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -39,8 +39,8 @@
39 39
40/* from radeon_encoder.c */ 40/* from radeon_encoder.c */
41extern uint32_t 41extern uint32_t
42radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, 42radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device,
43 uint8_t dac); 43 uint8_t dac);
44extern void radeon_link_encoder_connector(struct drm_device *dev); 44extern void radeon_link_encoder_connector(struct drm_device *dev);
45 45
46/* from radeon_connector.c */ 46/* from radeon_connector.c */
@@ -55,7 +55,7 @@ radeon_add_legacy_connector(struct drm_device *dev,
55 55
56/* from radeon_legacy_encoder.c */ 56/* from radeon_legacy_encoder.c */
57extern void 57extern void
58radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, 58radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum,
59 uint32_t supported_device); 59 uint32_t supported_device);
60 60
61/* old legacy ATI BIOS routines */ 61/* old legacy ATI BIOS routines */
@@ -1505,7 +1505,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1505 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); 1505 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
1506 hpd.hpd = RADEON_HPD_NONE; 1506 hpd.hpd = RADEON_HPD_NONE;
1507 radeon_add_legacy_encoder(dev, 1507 radeon_add_legacy_encoder(dev,
1508 radeon_get_encoder_id(dev, 1508 radeon_get_encoder_enum(dev,
1509 ATOM_DEVICE_CRT1_SUPPORT, 1509 ATOM_DEVICE_CRT1_SUPPORT,
1510 1), 1510 1),
1511 ATOM_DEVICE_CRT1_SUPPORT); 1511 ATOM_DEVICE_CRT1_SUPPORT);
@@ -1520,7 +1520,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1520 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_NONE_DETECTED, 0, 0); 1520 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_NONE_DETECTED, 0, 0);
1521 hpd.hpd = RADEON_HPD_NONE; 1521 hpd.hpd = RADEON_HPD_NONE;
1522 radeon_add_legacy_encoder(dev, 1522 radeon_add_legacy_encoder(dev,
1523 radeon_get_encoder_id(dev, 1523 radeon_get_encoder_enum(dev,
1524 ATOM_DEVICE_LCD1_SUPPORT, 1524 ATOM_DEVICE_LCD1_SUPPORT,
1525 0), 1525 0),
1526 ATOM_DEVICE_LCD1_SUPPORT); 1526 ATOM_DEVICE_LCD1_SUPPORT);
@@ -1535,7 +1535,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1535 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); 1535 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
1536 hpd.hpd = RADEON_HPD_NONE; 1536 hpd.hpd = RADEON_HPD_NONE;
1537 radeon_add_legacy_encoder(dev, 1537 radeon_add_legacy_encoder(dev,
1538 radeon_get_encoder_id(dev, 1538 radeon_get_encoder_enum(dev,
1539 ATOM_DEVICE_CRT1_SUPPORT, 1539 ATOM_DEVICE_CRT1_SUPPORT,
1540 1), 1540 1),
1541 ATOM_DEVICE_CRT1_SUPPORT); 1541 ATOM_DEVICE_CRT1_SUPPORT);
@@ -1550,12 +1550,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1550 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); 1550 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
1551 hpd.hpd = RADEON_HPD_1; 1551 hpd.hpd = RADEON_HPD_1;
1552 radeon_add_legacy_encoder(dev, 1552 radeon_add_legacy_encoder(dev,
1553 radeon_get_encoder_id(dev, 1553 radeon_get_encoder_enum(dev,
1554 ATOM_DEVICE_DFP1_SUPPORT, 1554 ATOM_DEVICE_DFP1_SUPPORT,
1555 0), 1555 0),
1556 ATOM_DEVICE_DFP1_SUPPORT); 1556 ATOM_DEVICE_DFP1_SUPPORT);
1557 radeon_add_legacy_encoder(dev, 1557 radeon_add_legacy_encoder(dev,
1558 radeon_get_encoder_id(dev, 1558 radeon_get_encoder_enum(dev,
1559 ATOM_DEVICE_CRT2_SUPPORT, 1559 ATOM_DEVICE_CRT2_SUPPORT,
1560 2), 1560 2),
1561 ATOM_DEVICE_CRT2_SUPPORT); 1561 ATOM_DEVICE_CRT2_SUPPORT);
@@ -1571,7 +1571,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1571 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); 1571 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
1572 hpd.hpd = RADEON_HPD_NONE; 1572 hpd.hpd = RADEON_HPD_NONE;
1573 radeon_add_legacy_encoder(dev, 1573 radeon_add_legacy_encoder(dev,
1574 radeon_get_encoder_id(dev, 1574 radeon_get_encoder_enum(dev,
1575 ATOM_DEVICE_CRT1_SUPPORT, 1575 ATOM_DEVICE_CRT1_SUPPORT,
1576 1), 1576 1),
1577 ATOM_DEVICE_CRT1_SUPPORT); 1577 ATOM_DEVICE_CRT1_SUPPORT);
@@ -1588,7 +1588,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1588 ddc_i2c.valid = false; 1588 ddc_i2c.valid = false;
1589 hpd.hpd = RADEON_HPD_NONE; 1589 hpd.hpd = RADEON_HPD_NONE;
1590 radeon_add_legacy_encoder(dev, 1590 radeon_add_legacy_encoder(dev,
1591 radeon_get_encoder_id(dev, 1591 radeon_get_encoder_enum(dev,
1592 ATOM_DEVICE_TV1_SUPPORT, 1592 ATOM_DEVICE_TV1_SUPPORT,
1593 2), 1593 2),
1594 ATOM_DEVICE_TV1_SUPPORT); 1594 ATOM_DEVICE_TV1_SUPPORT);
@@ -1607,7 +1607,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1607 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); 1607 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
1608 hpd.hpd = RADEON_HPD_NONE; 1608 hpd.hpd = RADEON_HPD_NONE;
1609 radeon_add_legacy_encoder(dev, 1609 radeon_add_legacy_encoder(dev,
1610 radeon_get_encoder_id(dev, 1610 radeon_get_encoder_enum(dev,
1611 ATOM_DEVICE_LCD1_SUPPORT, 1611 ATOM_DEVICE_LCD1_SUPPORT,
1612 0), 1612 0),
1613 ATOM_DEVICE_LCD1_SUPPORT); 1613 ATOM_DEVICE_LCD1_SUPPORT);
@@ -1619,7 +1619,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1619 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); 1619 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
1620 hpd.hpd = RADEON_HPD_NONE; 1620 hpd.hpd = RADEON_HPD_NONE;
1621 radeon_add_legacy_encoder(dev, 1621 radeon_add_legacy_encoder(dev,
1622 radeon_get_encoder_id(dev, 1622 radeon_get_encoder_enum(dev,
1623 ATOM_DEVICE_CRT2_SUPPORT, 1623 ATOM_DEVICE_CRT2_SUPPORT,
1624 2), 1624 2),
1625 ATOM_DEVICE_CRT2_SUPPORT); 1625 ATOM_DEVICE_CRT2_SUPPORT);
@@ -1631,7 +1631,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1631 ddc_i2c.valid = false; 1631 ddc_i2c.valid = false;
1632 hpd.hpd = RADEON_HPD_NONE; 1632 hpd.hpd = RADEON_HPD_NONE;
1633 radeon_add_legacy_encoder(dev, 1633 radeon_add_legacy_encoder(dev,
1634 radeon_get_encoder_id(dev, 1634 radeon_get_encoder_enum(dev,
1635 ATOM_DEVICE_TV1_SUPPORT, 1635 ATOM_DEVICE_TV1_SUPPORT,
1636 2), 1636 2),
1637 ATOM_DEVICE_TV1_SUPPORT); 1637 ATOM_DEVICE_TV1_SUPPORT);
@@ -1648,7 +1648,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1648 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); 1648 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
1649 hpd.hpd = RADEON_HPD_NONE; 1649 hpd.hpd = RADEON_HPD_NONE;
1650 radeon_add_legacy_encoder(dev, 1650 radeon_add_legacy_encoder(dev,
1651 radeon_get_encoder_id(dev, 1651 radeon_get_encoder_enum(dev,
1652 ATOM_DEVICE_LCD1_SUPPORT, 1652 ATOM_DEVICE_LCD1_SUPPORT,
1653 0), 1653 0),
1654 ATOM_DEVICE_LCD1_SUPPORT); 1654 ATOM_DEVICE_LCD1_SUPPORT);
@@ -1660,12 +1660,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1660 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); 1660 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
1661 hpd.hpd = RADEON_HPD_2; /* ??? */ 1661 hpd.hpd = RADEON_HPD_2; /* ??? */
1662 radeon_add_legacy_encoder(dev, 1662 radeon_add_legacy_encoder(dev,
1663 radeon_get_encoder_id(dev, 1663 radeon_get_encoder_enum(dev,
1664 ATOM_DEVICE_DFP2_SUPPORT, 1664 ATOM_DEVICE_DFP2_SUPPORT,
1665 0), 1665 0),
1666 ATOM_DEVICE_DFP2_SUPPORT); 1666 ATOM_DEVICE_DFP2_SUPPORT);
1667 radeon_add_legacy_encoder(dev, 1667 radeon_add_legacy_encoder(dev,
1668 radeon_get_encoder_id(dev, 1668 radeon_get_encoder_enum(dev,
1669 ATOM_DEVICE_CRT1_SUPPORT, 1669 ATOM_DEVICE_CRT1_SUPPORT,
1670 1), 1670 1),
1671 ATOM_DEVICE_CRT1_SUPPORT); 1671 ATOM_DEVICE_CRT1_SUPPORT);
@@ -1680,7 +1680,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1680 ddc_i2c.valid = false; 1680 ddc_i2c.valid = false;
1681 hpd.hpd = RADEON_HPD_NONE; 1681 hpd.hpd = RADEON_HPD_NONE;
1682 radeon_add_legacy_encoder(dev, 1682 radeon_add_legacy_encoder(dev,
1683 radeon_get_encoder_id(dev, 1683 radeon_get_encoder_enum(dev,
1684 ATOM_DEVICE_TV1_SUPPORT, 1684 ATOM_DEVICE_TV1_SUPPORT,
1685 2), 1685 2),
1686 ATOM_DEVICE_TV1_SUPPORT); 1686 ATOM_DEVICE_TV1_SUPPORT);
@@ -1697,7 +1697,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1697 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); 1697 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
1698 hpd.hpd = RADEON_HPD_NONE; 1698 hpd.hpd = RADEON_HPD_NONE;
1699 radeon_add_legacy_encoder(dev, 1699 radeon_add_legacy_encoder(dev,
1700 radeon_get_encoder_id(dev, 1700 radeon_get_encoder_enum(dev,
1701 ATOM_DEVICE_LCD1_SUPPORT, 1701 ATOM_DEVICE_LCD1_SUPPORT,
1702 0), 1702 0),
1703 ATOM_DEVICE_LCD1_SUPPORT); 1703 ATOM_DEVICE_LCD1_SUPPORT);
@@ -1709,12 +1709,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1709 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); 1709 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
1710 hpd.hpd = RADEON_HPD_1; /* ??? */ 1710 hpd.hpd = RADEON_HPD_1; /* ??? */
1711 radeon_add_legacy_encoder(dev, 1711 radeon_add_legacy_encoder(dev,
1712 radeon_get_encoder_id(dev, 1712 radeon_get_encoder_enum(dev,
1713 ATOM_DEVICE_DFP1_SUPPORT, 1713 ATOM_DEVICE_DFP1_SUPPORT,
1714 0), 1714 0),
1715 ATOM_DEVICE_DFP1_SUPPORT); 1715 ATOM_DEVICE_DFP1_SUPPORT);
1716 radeon_add_legacy_encoder(dev, 1716 radeon_add_legacy_encoder(dev,
1717 radeon_get_encoder_id(dev, 1717 radeon_get_encoder_enum(dev,
1718 ATOM_DEVICE_CRT1_SUPPORT, 1718 ATOM_DEVICE_CRT1_SUPPORT,
1719 1), 1719 1),
1720 ATOM_DEVICE_CRT1_SUPPORT); 1720 ATOM_DEVICE_CRT1_SUPPORT);
@@ -1728,7 +1728,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1728 ddc_i2c.valid = false; 1728 ddc_i2c.valid = false;
1729 hpd.hpd = RADEON_HPD_NONE; 1729 hpd.hpd = RADEON_HPD_NONE;
1730 radeon_add_legacy_encoder(dev, 1730 radeon_add_legacy_encoder(dev,
1731 radeon_get_encoder_id(dev, 1731 radeon_get_encoder_enum(dev,
1732 ATOM_DEVICE_TV1_SUPPORT, 1732 ATOM_DEVICE_TV1_SUPPORT,
1733 2), 1733 2),
1734 ATOM_DEVICE_TV1_SUPPORT); 1734 ATOM_DEVICE_TV1_SUPPORT);
@@ -1745,7 +1745,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1745 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); 1745 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
1746 hpd.hpd = RADEON_HPD_NONE; 1746 hpd.hpd = RADEON_HPD_NONE;
1747 radeon_add_legacy_encoder(dev, 1747 radeon_add_legacy_encoder(dev,
1748 radeon_get_encoder_id(dev, 1748 radeon_get_encoder_enum(dev,
1749 ATOM_DEVICE_LCD1_SUPPORT, 1749 ATOM_DEVICE_LCD1_SUPPORT,
1750 0), 1750 0),
1751 ATOM_DEVICE_LCD1_SUPPORT); 1751 ATOM_DEVICE_LCD1_SUPPORT);
@@ -1757,7 +1757,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1757 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); 1757 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
1758 hpd.hpd = RADEON_HPD_NONE; 1758 hpd.hpd = RADEON_HPD_NONE;
1759 radeon_add_legacy_encoder(dev, 1759 radeon_add_legacy_encoder(dev,
1760 radeon_get_encoder_id(dev, 1760 radeon_get_encoder_enum(dev,
1761 ATOM_DEVICE_CRT1_SUPPORT, 1761 ATOM_DEVICE_CRT1_SUPPORT,
1762 1), 1762 1),
1763 ATOM_DEVICE_CRT1_SUPPORT); 1763 ATOM_DEVICE_CRT1_SUPPORT);
@@ -1769,7 +1769,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1769 ddc_i2c.valid = false; 1769 ddc_i2c.valid = false;
1770 hpd.hpd = RADEON_HPD_NONE; 1770 hpd.hpd = RADEON_HPD_NONE;
1771 radeon_add_legacy_encoder(dev, 1771 radeon_add_legacy_encoder(dev,
1772 radeon_get_encoder_id(dev, 1772 radeon_get_encoder_enum(dev,
1773 ATOM_DEVICE_TV1_SUPPORT, 1773 ATOM_DEVICE_TV1_SUPPORT,
1774 2), 1774 2),
1775 ATOM_DEVICE_TV1_SUPPORT); 1775 ATOM_DEVICE_TV1_SUPPORT);
@@ -1786,12 +1786,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1786 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); 1786 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0);
1787 hpd.hpd = RADEON_HPD_2; /* ??? */ 1787 hpd.hpd = RADEON_HPD_2; /* ??? */
1788 radeon_add_legacy_encoder(dev, 1788 radeon_add_legacy_encoder(dev,
1789 radeon_get_encoder_id(dev, 1789 radeon_get_encoder_enum(dev,
1790 ATOM_DEVICE_DFP2_SUPPORT, 1790 ATOM_DEVICE_DFP2_SUPPORT,
1791 0), 1791 0),
1792 ATOM_DEVICE_DFP2_SUPPORT); 1792 ATOM_DEVICE_DFP2_SUPPORT);
1793 radeon_add_legacy_encoder(dev, 1793 radeon_add_legacy_encoder(dev,
1794 radeon_get_encoder_id(dev, 1794 radeon_get_encoder_enum(dev,
1795 ATOM_DEVICE_CRT2_SUPPORT, 1795 ATOM_DEVICE_CRT2_SUPPORT,
1796 2), 1796 2),
1797 ATOM_DEVICE_CRT2_SUPPORT); 1797 ATOM_DEVICE_CRT2_SUPPORT);
@@ -1806,7 +1806,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1806 ddc_i2c.valid = false; 1806 ddc_i2c.valid = false;
1807 hpd.hpd = RADEON_HPD_NONE; 1807 hpd.hpd = RADEON_HPD_NONE;
1808 radeon_add_legacy_encoder(dev, 1808 radeon_add_legacy_encoder(dev,
1809 radeon_get_encoder_id(dev, 1809 radeon_get_encoder_enum(dev,
1810 ATOM_DEVICE_TV1_SUPPORT, 1810 ATOM_DEVICE_TV1_SUPPORT,
1811 2), 1811 2),
1812 ATOM_DEVICE_TV1_SUPPORT); 1812 ATOM_DEVICE_TV1_SUPPORT);
@@ -1823,12 +1823,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1823 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); 1823 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0);
1824 hpd.hpd = RADEON_HPD_1; /* ??? */ 1824 hpd.hpd = RADEON_HPD_1; /* ??? */
1825 radeon_add_legacy_encoder(dev, 1825 radeon_add_legacy_encoder(dev,
1826 radeon_get_encoder_id(dev, 1826 radeon_get_encoder_enum(dev,
1827 ATOM_DEVICE_DFP1_SUPPORT, 1827 ATOM_DEVICE_DFP1_SUPPORT,
1828 0), 1828 0),
1829 ATOM_DEVICE_DFP1_SUPPORT); 1829 ATOM_DEVICE_DFP1_SUPPORT);
1830 radeon_add_legacy_encoder(dev, 1830 radeon_add_legacy_encoder(dev,
1831 radeon_get_encoder_id(dev, 1831 radeon_get_encoder_enum(dev,
1832 ATOM_DEVICE_CRT2_SUPPORT, 1832 ATOM_DEVICE_CRT2_SUPPORT,
1833 2), 1833 2),
1834 ATOM_DEVICE_CRT2_SUPPORT); 1834 ATOM_DEVICE_CRT2_SUPPORT);
@@ -1842,7 +1842,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1842 ddc_i2c.valid = false; 1842 ddc_i2c.valid = false;
1843 hpd.hpd = RADEON_HPD_NONE; 1843 hpd.hpd = RADEON_HPD_NONE;
1844 radeon_add_legacy_encoder(dev, 1844 radeon_add_legacy_encoder(dev,
1845 radeon_get_encoder_id(dev, 1845 radeon_get_encoder_enum(dev,
1846 ATOM_DEVICE_TV1_SUPPORT, 1846 ATOM_DEVICE_TV1_SUPPORT,
1847 2), 1847 2),
1848 ATOM_DEVICE_TV1_SUPPORT); 1848 ATOM_DEVICE_TV1_SUPPORT);
@@ -1859,7 +1859,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1859 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); 1859 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0);
1860 hpd.hpd = RADEON_HPD_1; /* ??? */ 1860 hpd.hpd = RADEON_HPD_1; /* ??? */
1861 radeon_add_legacy_encoder(dev, 1861 radeon_add_legacy_encoder(dev,
1862 radeon_get_encoder_id(dev, 1862 radeon_get_encoder_enum(dev,
1863 ATOM_DEVICE_DFP1_SUPPORT, 1863 ATOM_DEVICE_DFP1_SUPPORT,
1864 0), 1864 0),
1865 ATOM_DEVICE_DFP1_SUPPORT); 1865 ATOM_DEVICE_DFP1_SUPPORT);
@@ -1871,7 +1871,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1871 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); 1871 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
1872 hpd.hpd = RADEON_HPD_NONE; 1872 hpd.hpd = RADEON_HPD_NONE;
1873 radeon_add_legacy_encoder(dev, 1873 radeon_add_legacy_encoder(dev,
1874 radeon_get_encoder_id(dev, 1874 radeon_get_encoder_enum(dev,
1875 ATOM_DEVICE_CRT2_SUPPORT, 1875 ATOM_DEVICE_CRT2_SUPPORT,
1876 2), 1876 2),
1877 ATOM_DEVICE_CRT2_SUPPORT); 1877 ATOM_DEVICE_CRT2_SUPPORT);
@@ -1883,7 +1883,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1883 ddc_i2c.valid = false; 1883 ddc_i2c.valid = false;
1884 hpd.hpd = RADEON_HPD_NONE; 1884 hpd.hpd = RADEON_HPD_NONE;
1885 radeon_add_legacy_encoder(dev, 1885 radeon_add_legacy_encoder(dev,
1886 radeon_get_encoder_id(dev, 1886 radeon_get_encoder_enum(dev,
1887 ATOM_DEVICE_TV1_SUPPORT, 1887 ATOM_DEVICE_TV1_SUPPORT,
1888 2), 1888 2),
1889 ATOM_DEVICE_TV1_SUPPORT); 1889 ATOM_DEVICE_TV1_SUPPORT);
@@ -1900,7 +1900,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1900 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); 1900 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
1901 hpd.hpd = RADEON_HPD_NONE; 1901 hpd.hpd = RADEON_HPD_NONE;
1902 radeon_add_legacy_encoder(dev, 1902 radeon_add_legacy_encoder(dev,
1903 radeon_get_encoder_id(dev, 1903 radeon_get_encoder_enum(dev,
1904 ATOM_DEVICE_CRT1_SUPPORT, 1904 ATOM_DEVICE_CRT1_SUPPORT,
1905 1), 1905 1),
1906 ATOM_DEVICE_CRT1_SUPPORT); 1906 ATOM_DEVICE_CRT1_SUPPORT);
@@ -1912,7 +1912,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1912 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); 1912 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0);
1913 hpd.hpd = RADEON_HPD_NONE; 1913 hpd.hpd = RADEON_HPD_NONE;
1914 radeon_add_legacy_encoder(dev, 1914 radeon_add_legacy_encoder(dev,
1915 radeon_get_encoder_id(dev, 1915 radeon_get_encoder_enum(dev,
1916 ATOM_DEVICE_CRT2_SUPPORT, 1916 ATOM_DEVICE_CRT2_SUPPORT,
1917 2), 1917 2),
1918 ATOM_DEVICE_CRT2_SUPPORT); 1918 ATOM_DEVICE_CRT2_SUPPORT);
@@ -1924,7 +1924,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1924 ddc_i2c.valid = false; 1924 ddc_i2c.valid = false;
1925 hpd.hpd = RADEON_HPD_NONE; 1925 hpd.hpd = RADEON_HPD_NONE;
1926 radeon_add_legacy_encoder(dev, 1926 radeon_add_legacy_encoder(dev,
1927 radeon_get_encoder_id(dev, 1927 radeon_get_encoder_enum(dev,
1928 ATOM_DEVICE_TV1_SUPPORT, 1928 ATOM_DEVICE_TV1_SUPPORT,
1929 2), 1929 2),
1930 ATOM_DEVICE_TV1_SUPPORT); 1930 ATOM_DEVICE_TV1_SUPPORT);
@@ -1941,7 +1941,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1941 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); 1941 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
1942 hpd.hpd = RADEON_HPD_NONE; 1942 hpd.hpd = RADEON_HPD_NONE;
1943 radeon_add_legacy_encoder(dev, 1943 radeon_add_legacy_encoder(dev,
1944 radeon_get_encoder_id(dev, 1944 radeon_get_encoder_enum(dev,
1945 ATOM_DEVICE_CRT1_SUPPORT, 1945 ATOM_DEVICE_CRT1_SUPPORT,
1946 1), 1946 1),
1947 ATOM_DEVICE_CRT1_SUPPORT); 1947 ATOM_DEVICE_CRT1_SUPPORT);
@@ -1952,7 +1952,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1952 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); 1952 ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0);
1953 hpd.hpd = RADEON_HPD_NONE; 1953 hpd.hpd = RADEON_HPD_NONE;
1954 radeon_add_legacy_encoder(dev, 1954 radeon_add_legacy_encoder(dev,
1955 radeon_get_encoder_id(dev, 1955 radeon_get_encoder_enum(dev,
1956 ATOM_DEVICE_CRT2_SUPPORT, 1956 ATOM_DEVICE_CRT2_SUPPORT,
1957 2), 1957 2),
1958 ATOM_DEVICE_CRT2_SUPPORT); 1958 ATOM_DEVICE_CRT2_SUPPORT);
@@ -2109,7 +2109,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2109 else 2109 else
2110 devices = ATOM_DEVICE_DFP1_SUPPORT; 2110 devices = ATOM_DEVICE_DFP1_SUPPORT;
2111 radeon_add_legacy_encoder(dev, 2111 radeon_add_legacy_encoder(dev,
2112 radeon_get_encoder_id 2112 radeon_get_encoder_enum
2113 (dev, devices, 0), 2113 (dev, devices, 0),
2114 devices); 2114 devices);
2115 radeon_add_legacy_connector(dev, i, devices, 2115 radeon_add_legacy_connector(dev, i, devices,
@@ -2123,7 +2123,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2123 if (tmp & 0x1) { 2123 if (tmp & 0x1) {
2124 devices = ATOM_DEVICE_CRT2_SUPPORT; 2124 devices = ATOM_DEVICE_CRT2_SUPPORT;
2125 radeon_add_legacy_encoder(dev, 2125 radeon_add_legacy_encoder(dev,
2126 radeon_get_encoder_id 2126 radeon_get_encoder_enum
2127 (dev, 2127 (dev,
2128 ATOM_DEVICE_CRT2_SUPPORT, 2128 ATOM_DEVICE_CRT2_SUPPORT,
2129 2), 2129 2),
@@ -2131,7 +2131,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2131 } else { 2131 } else {
2132 devices = ATOM_DEVICE_CRT1_SUPPORT; 2132 devices = ATOM_DEVICE_CRT1_SUPPORT;
2133 radeon_add_legacy_encoder(dev, 2133 radeon_add_legacy_encoder(dev,
2134 radeon_get_encoder_id 2134 radeon_get_encoder_enum
2135 (dev, 2135 (dev,
2136 ATOM_DEVICE_CRT1_SUPPORT, 2136 ATOM_DEVICE_CRT1_SUPPORT,
2137 1), 2137 1),
@@ -2151,7 +2151,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2151 if (tmp & 0x1) { 2151 if (tmp & 0x1) {
2152 devices |= ATOM_DEVICE_CRT2_SUPPORT; 2152 devices |= ATOM_DEVICE_CRT2_SUPPORT;
2153 radeon_add_legacy_encoder(dev, 2153 radeon_add_legacy_encoder(dev,
2154 radeon_get_encoder_id 2154 radeon_get_encoder_enum
2155 (dev, 2155 (dev,
2156 ATOM_DEVICE_CRT2_SUPPORT, 2156 ATOM_DEVICE_CRT2_SUPPORT,
2157 2), 2157 2),
@@ -2159,7 +2159,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2159 } else { 2159 } else {
2160 devices |= ATOM_DEVICE_CRT1_SUPPORT; 2160 devices |= ATOM_DEVICE_CRT1_SUPPORT;
2161 radeon_add_legacy_encoder(dev, 2161 radeon_add_legacy_encoder(dev,
2162 radeon_get_encoder_id 2162 radeon_get_encoder_enum
2163 (dev, 2163 (dev,
2164 ATOM_DEVICE_CRT1_SUPPORT, 2164 ATOM_DEVICE_CRT1_SUPPORT,
2165 1), 2165 1),
@@ -2168,7 +2168,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2168 if ((tmp >> 4) & 0x1) { 2168 if ((tmp >> 4) & 0x1) {
2169 devices |= ATOM_DEVICE_DFP2_SUPPORT; 2169 devices |= ATOM_DEVICE_DFP2_SUPPORT;
2170 radeon_add_legacy_encoder(dev, 2170 radeon_add_legacy_encoder(dev,
2171 radeon_get_encoder_id 2171 radeon_get_encoder_enum
2172 (dev, 2172 (dev,
2173 ATOM_DEVICE_DFP2_SUPPORT, 2173 ATOM_DEVICE_DFP2_SUPPORT,
2174 0), 2174 0),
@@ -2177,7 +2177,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2177 } else { 2177 } else {
2178 devices |= ATOM_DEVICE_DFP1_SUPPORT; 2178 devices |= ATOM_DEVICE_DFP1_SUPPORT;
2179 radeon_add_legacy_encoder(dev, 2179 radeon_add_legacy_encoder(dev,
2180 radeon_get_encoder_id 2180 radeon_get_encoder_enum
2181 (dev, 2181 (dev,
2182 ATOM_DEVICE_DFP1_SUPPORT, 2182 ATOM_DEVICE_DFP1_SUPPORT,
2183 0), 2183 0),
@@ -2202,7 +2202,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2202 connector_object_id = CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I; 2202 connector_object_id = CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I;
2203 } 2203 }
2204 radeon_add_legacy_encoder(dev, 2204 radeon_add_legacy_encoder(dev,
2205 radeon_get_encoder_id 2205 radeon_get_encoder_enum
2206 (dev, devices, 0), 2206 (dev, devices, 0),
2207 devices); 2207 devices);
2208 radeon_add_legacy_connector(dev, i, devices, 2208 radeon_add_legacy_connector(dev, i, devices,
@@ -2215,7 +2215,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2215 case CONNECTOR_CTV_LEGACY: 2215 case CONNECTOR_CTV_LEGACY:
2216 case CONNECTOR_STV_LEGACY: 2216 case CONNECTOR_STV_LEGACY:
2217 radeon_add_legacy_encoder(dev, 2217 radeon_add_legacy_encoder(dev,
2218 radeon_get_encoder_id 2218 radeon_get_encoder_enum
2219 (dev, 2219 (dev,
2220 ATOM_DEVICE_TV1_SUPPORT, 2220 ATOM_DEVICE_TV1_SUPPORT,
2221 2), 2221 2),
@@ -2242,12 +2242,12 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2242 DRM_DEBUG_KMS("Found DFP table, assuming DVI connector\n"); 2242 DRM_DEBUG_KMS("Found DFP table, assuming DVI connector\n");
2243 2243
2244 radeon_add_legacy_encoder(dev, 2244 radeon_add_legacy_encoder(dev,
2245 radeon_get_encoder_id(dev, 2245 radeon_get_encoder_enum(dev,
2246 ATOM_DEVICE_CRT1_SUPPORT, 2246 ATOM_DEVICE_CRT1_SUPPORT,
2247 1), 2247 1),
2248 ATOM_DEVICE_CRT1_SUPPORT); 2248 ATOM_DEVICE_CRT1_SUPPORT);
2249 radeon_add_legacy_encoder(dev, 2249 radeon_add_legacy_encoder(dev,
2250 radeon_get_encoder_id(dev, 2250 radeon_get_encoder_enum(dev,
2251 ATOM_DEVICE_DFP1_SUPPORT, 2251 ATOM_DEVICE_DFP1_SUPPORT,
2252 0), 2252 0),
2253 ATOM_DEVICE_DFP1_SUPPORT); 2253 ATOM_DEVICE_DFP1_SUPPORT);
@@ -2268,7 +2268,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2268 DRM_DEBUG_KMS("Found CRT table, assuming VGA connector\n"); 2268 DRM_DEBUG_KMS("Found CRT table, assuming VGA connector\n");
2269 if (crt_info) { 2269 if (crt_info) {
2270 radeon_add_legacy_encoder(dev, 2270 radeon_add_legacy_encoder(dev,
2271 radeon_get_encoder_id(dev, 2271 radeon_get_encoder_enum(dev,
2272 ATOM_DEVICE_CRT1_SUPPORT, 2272 ATOM_DEVICE_CRT1_SUPPORT,
2273 1), 2273 1),
2274 ATOM_DEVICE_CRT1_SUPPORT); 2274 ATOM_DEVICE_CRT1_SUPPORT);
@@ -2297,7 +2297,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2297 COMBIOS_LCD_DDC_INFO_TABLE); 2297 COMBIOS_LCD_DDC_INFO_TABLE);
2298 2298
2299 radeon_add_legacy_encoder(dev, 2299 radeon_add_legacy_encoder(dev,
2300 radeon_get_encoder_id(dev, 2300 radeon_get_encoder_enum(dev,
2301 ATOM_DEVICE_LCD1_SUPPORT, 2301 ATOM_DEVICE_LCD1_SUPPORT,
2302 0), 2302 0),
2303 ATOM_DEVICE_LCD1_SUPPORT); 2303 ATOM_DEVICE_LCD1_SUPPORT);
@@ -2351,7 +2351,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
2351 hpd.hpd = RADEON_HPD_NONE; 2351 hpd.hpd = RADEON_HPD_NONE;
2352 ddc_i2c.valid = false; 2352 ddc_i2c.valid = false;
2353 radeon_add_legacy_encoder(dev, 2353 radeon_add_legacy_encoder(dev,
2354 radeon_get_encoder_id 2354 radeon_get_encoder_enum
2355 (dev, 2355 (dev,
2356 ATOM_DEVICE_TV1_SUPPORT, 2356 ATOM_DEVICE_TV1_SUPPORT,
2357 2), 2357 2),
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 47c4b276d30c..31a09cd279ab 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -977,24 +977,25 @@ static enum drm_connector_status radeon_dp_detect(struct drm_connector *connecto
977 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 977 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
978 enum drm_connector_status ret = connector_status_disconnected; 978 enum drm_connector_status ret = connector_status_disconnected;
979 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; 979 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
980 u8 sink_type;
981 980
982 if (radeon_connector->edid) { 981 if (radeon_connector->edid) {
983 kfree(radeon_connector->edid); 982 kfree(radeon_connector->edid);
984 radeon_connector->edid = NULL; 983 radeon_connector->edid = NULL;
985 } 984 }
986 985
987 sink_type = radeon_dp_getsinktype(radeon_connector); 986 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
988 if ((sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || 987 /* eDP is always DP */
989 (sink_type == CONNECTOR_OBJECT_ID_eDP)) { 988 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
990 if (radeon_dp_getdpcd(radeon_connector)) { 989 if (radeon_dp_getdpcd(radeon_connector))
991 radeon_dig_connector->dp_sink_type = sink_type;
992 ret = connector_status_connected; 990 ret = connector_status_connected;
993 }
994 } else { 991 } else {
995 if (radeon_ddc_probe(radeon_connector)) { 992 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
996 radeon_dig_connector->dp_sink_type = sink_type; 993 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
997 ret = connector_status_connected; 994 if (radeon_dp_getdpcd(radeon_connector))
995 ret = connector_status_connected;
996 } else {
997 if (radeon_ddc_probe(radeon_connector))
998 ret = connector_status_connected;
998 } 999 }
999 } 1000 }
1000 1001
@@ -1037,7 +1038,6 @@ radeon_add_atom_connector(struct drm_device *dev,
1037 uint32_t supported_device, 1038 uint32_t supported_device,
1038 int connector_type, 1039 int connector_type,
1039 struct radeon_i2c_bus_rec *i2c_bus, 1040 struct radeon_i2c_bus_rec *i2c_bus,
1040 bool linkb,
1041 uint32_t igp_lane_info, 1041 uint32_t igp_lane_info,
1042 uint16_t connector_object_id, 1042 uint16_t connector_object_id,
1043 struct radeon_hpd *hpd, 1043 struct radeon_hpd *hpd,
@@ -1128,7 +1128,6 @@ radeon_add_atom_connector(struct drm_device *dev,
1128 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); 1128 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1129 if (!radeon_dig_connector) 1129 if (!radeon_dig_connector)
1130 goto failed; 1130 goto failed;
1131 radeon_dig_connector->linkb = linkb;
1132 radeon_dig_connector->igp_lane_info = igp_lane_info; 1131 radeon_dig_connector->igp_lane_info = igp_lane_info;
1133 radeon_connector->con_priv = radeon_dig_connector; 1132 radeon_connector->con_priv = radeon_dig_connector;
1134 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); 1133 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
@@ -1158,7 +1157,6 @@ radeon_add_atom_connector(struct drm_device *dev,
1158 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); 1157 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1159 if (!radeon_dig_connector) 1158 if (!radeon_dig_connector)
1160 goto failed; 1159 goto failed;
1161 radeon_dig_connector->linkb = linkb;
1162 radeon_dig_connector->igp_lane_info = igp_lane_info; 1160 radeon_dig_connector->igp_lane_info = igp_lane_info;
1163 radeon_connector->con_priv = radeon_dig_connector; 1161 radeon_connector->con_priv = radeon_dig_connector;
1164 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); 1162 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
@@ -1182,7 +1180,6 @@ radeon_add_atom_connector(struct drm_device *dev,
1182 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); 1180 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1183 if (!radeon_dig_connector) 1181 if (!radeon_dig_connector)
1184 goto failed; 1182 goto failed;
1185 radeon_dig_connector->linkb = linkb;
1186 radeon_dig_connector->igp_lane_info = igp_lane_info; 1183 radeon_dig_connector->igp_lane_info = igp_lane_info;
1187 radeon_connector->con_priv = radeon_dig_connector; 1184 radeon_connector->con_priv = radeon_dig_connector;
1188 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); 1185 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
@@ -1229,7 +1226,6 @@ radeon_add_atom_connector(struct drm_device *dev,
1229 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); 1226 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1230 if (!radeon_dig_connector) 1227 if (!radeon_dig_connector)
1231 goto failed; 1228 goto failed;
1232 radeon_dig_connector->linkb = linkb;
1233 radeon_dig_connector->igp_lane_info = igp_lane_info; 1229 radeon_dig_connector->igp_lane_info = igp_lane_info;
1234 radeon_connector->con_priv = radeon_dig_connector; 1230 radeon_connector->con_priv = radeon_dig_connector;
1235 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); 1231 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 4f7a170d1566..69b3c2291e92 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -199,7 +199,7 @@ void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64
199 mc->mc_vram_size = mc->aper_size; 199 mc->mc_vram_size = mc->aper_size;
200 } 200 }
201 mc->vram_end = mc->vram_start + mc->mc_vram_size - 1; 201 mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;
202 if (rdev->flags & RADEON_IS_AGP && mc->vram_end > mc->gtt_start && mc->vram_end <= mc->gtt_end) { 202 if (rdev->flags & RADEON_IS_AGP && mc->vram_end > mc->gtt_start && mc->vram_start <= mc->gtt_end) {
203 dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n"); 203 dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n");
204 mc->real_vram_size = mc->aper_size; 204 mc->real_vram_size = mc->aper_size;
205 mc->mc_vram_size = mc->aper_size; 205 mc->mc_vram_size = mc->aper_size;
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 5764f4d3b4f1..6dd434ad2429 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -1094,6 +1094,18 @@ void radeon_modeset_fini(struct radeon_device *rdev)
1094 radeon_i2c_fini(rdev); 1094 radeon_i2c_fini(rdev);
1095} 1095}
1096 1096
1097static bool is_hdtv_mode(struct drm_display_mode *mode)
1098{
1099 /* try and guess if this is a tv or a monitor */
1100 if ((mode->vdisplay == 480 && mode->hdisplay == 720) || /* 480p */
1101 (mode->vdisplay == 576) || /* 576p */
1102 (mode->vdisplay == 720) || /* 720p */
1103 (mode->vdisplay == 1080)) /* 1080p */
1104 return true;
1105 else
1106 return false;
1107}
1108
1097bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, 1109bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
1098 struct drm_display_mode *mode, 1110 struct drm_display_mode *mode,
1099 struct drm_display_mode *adjusted_mode) 1111 struct drm_display_mode *adjusted_mode)
@@ -1141,7 +1153,8 @@ bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
1141 if (ASIC_IS_AVIVO(rdev) && 1153 if (ASIC_IS_AVIVO(rdev) &&
1142 ((radeon_encoder->underscan_type == UNDERSCAN_ON) || 1154 ((radeon_encoder->underscan_type == UNDERSCAN_ON) ||
1143 ((radeon_encoder->underscan_type == UNDERSCAN_AUTO) && 1155 ((radeon_encoder->underscan_type == UNDERSCAN_AUTO) &&
1144 drm_detect_hdmi_monitor(radeon_connector->edid)))) { 1156 drm_detect_hdmi_monitor(radeon_connector->edid) &&
1157 is_hdtv_mode(mode)))) {
1145 radeon_crtc->h_border = (mode->hdisplay >> 5) + 16; 1158 radeon_crtc->h_border = (mode->hdisplay >> 5) + 16;
1146 radeon_crtc->v_border = (mode->vdisplay >> 5) + 16; 1159 radeon_crtc->v_border = (mode->vdisplay >> 5) + 16;
1147 radeon_crtc->rmx_type = RMX_FULL; 1160 radeon_crtc->rmx_type = RMX_FULL;
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index 263c8098d7dd..2c293e8304d6 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -81,7 +81,7 @@ void radeon_setup_encoder_clones(struct drm_device *dev)
81} 81}
82 82
83uint32_t 83uint32_t
84radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t dac) 84radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac)
85{ 85{
86 struct radeon_device *rdev = dev->dev_private; 86 struct radeon_device *rdev = dev->dev_private;
87 uint32_t ret = 0; 87 uint32_t ret = 0;
@@ -97,59 +97,59 @@ radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t
97 if ((rdev->family == CHIP_RS300) || 97 if ((rdev->family == CHIP_RS300) ||
98 (rdev->family == CHIP_RS400) || 98 (rdev->family == CHIP_RS400) ||
99 (rdev->family == CHIP_RS480)) 99 (rdev->family == CHIP_RS480))
100 ret = ENCODER_OBJECT_ID_INTERNAL_DAC2; 100 ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
101 else if (ASIC_IS_AVIVO(rdev)) 101 else if (ASIC_IS_AVIVO(rdev))
102 ret = ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1; 102 ret = ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1;
103 else 103 else
104 ret = ENCODER_OBJECT_ID_INTERNAL_DAC1; 104 ret = ENCODER_INTERNAL_DAC1_ENUM_ID1;
105 break; 105 break;
106 case 2: /* dac b */ 106 case 2: /* dac b */
107 if (ASIC_IS_AVIVO(rdev)) 107 if (ASIC_IS_AVIVO(rdev))
108 ret = ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2; 108 ret = ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1;
109 else { 109 else {
110 /*if (rdev->family == CHIP_R200) 110 /*if (rdev->family == CHIP_R200)
111 ret = ENCODER_OBJECT_ID_INTERNAL_DVO1; 111 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
112 else*/ 112 else*/
113 ret = ENCODER_OBJECT_ID_INTERNAL_DAC2; 113 ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
114 } 114 }
115 break; 115 break;
116 case 3: /* external dac */ 116 case 3: /* external dac */
117 if (ASIC_IS_AVIVO(rdev)) 117 if (ASIC_IS_AVIVO(rdev))
118 ret = ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1; 118 ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
119 else 119 else
120 ret = ENCODER_OBJECT_ID_INTERNAL_DVO1; 120 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
121 break; 121 break;
122 } 122 }
123 break; 123 break;
124 case ATOM_DEVICE_LCD1_SUPPORT: 124 case ATOM_DEVICE_LCD1_SUPPORT:
125 if (ASIC_IS_AVIVO(rdev)) 125 if (ASIC_IS_AVIVO(rdev))
126 ret = ENCODER_OBJECT_ID_INTERNAL_LVTM1; 126 ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
127 else 127 else
128 ret = ENCODER_OBJECT_ID_INTERNAL_LVDS; 128 ret = ENCODER_INTERNAL_LVDS_ENUM_ID1;
129 break; 129 break;
130 case ATOM_DEVICE_DFP1_SUPPORT: 130 case ATOM_DEVICE_DFP1_SUPPORT:
131 if ((rdev->family == CHIP_RS300) || 131 if ((rdev->family == CHIP_RS300) ||
132 (rdev->family == CHIP_RS400) || 132 (rdev->family == CHIP_RS400) ||
133 (rdev->family == CHIP_RS480)) 133 (rdev->family == CHIP_RS480))
134 ret = ENCODER_OBJECT_ID_INTERNAL_DVO1; 134 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
135 else if (ASIC_IS_AVIVO(rdev)) 135 else if (ASIC_IS_AVIVO(rdev))
136 ret = ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1; 136 ret = ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1;
137 else 137 else
138 ret = ENCODER_OBJECT_ID_INTERNAL_TMDS1; 138 ret = ENCODER_INTERNAL_TMDS1_ENUM_ID1;
139 break; 139 break;
140 case ATOM_DEVICE_LCD2_SUPPORT: 140 case ATOM_DEVICE_LCD2_SUPPORT:
141 case ATOM_DEVICE_DFP2_SUPPORT: 141 case ATOM_DEVICE_DFP2_SUPPORT:
142 if ((rdev->family == CHIP_RS600) || 142 if ((rdev->family == CHIP_RS600) ||
143 (rdev->family == CHIP_RS690) || 143 (rdev->family == CHIP_RS690) ||
144 (rdev->family == CHIP_RS740)) 144 (rdev->family == CHIP_RS740))
145 ret = ENCODER_OBJECT_ID_INTERNAL_DDI; 145 ret = ENCODER_INTERNAL_DDI_ENUM_ID1;
146 else if (ASIC_IS_AVIVO(rdev)) 146 else if (ASIC_IS_AVIVO(rdev))
147 ret = ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1; 147 ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
148 else 148 else
149 ret = ENCODER_OBJECT_ID_INTERNAL_DVO1; 149 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
150 break; 150 break;
151 case ATOM_DEVICE_DFP3_SUPPORT: 151 case ATOM_DEVICE_DFP3_SUPPORT:
152 ret = ENCODER_OBJECT_ID_INTERNAL_LVTM1; 152 ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
153 break; 153 break;
154 } 154 }
155 155
@@ -228,32 +228,6 @@ radeon_get_connector_for_encoder(struct drm_encoder *encoder)
228 return NULL; 228 return NULL;
229} 229}
230 230
231static struct radeon_connector_atom_dig *
232radeon_get_atom_connector_priv_from_encoder(struct drm_encoder *encoder)
233{
234 struct drm_device *dev = encoder->dev;
235 struct radeon_device *rdev = dev->dev_private;
236 struct drm_connector *connector;
237 struct radeon_connector *radeon_connector;
238 struct radeon_connector_atom_dig *dig_connector;
239
240 if (!rdev->is_atom_bios)
241 return NULL;
242
243 connector = radeon_get_connector_for_encoder(encoder);
244 if (!connector)
245 return NULL;
246
247 radeon_connector = to_radeon_connector(connector);
248
249 if (!radeon_connector->con_priv)
250 return NULL;
251
252 dig_connector = radeon_connector->con_priv;
253
254 return dig_connector;
255}
256
257void radeon_panel_mode_fixup(struct drm_encoder *encoder, 231void radeon_panel_mode_fixup(struct drm_encoder *encoder,
258 struct drm_display_mode *adjusted_mode) 232 struct drm_display_mode *adjusted_mode)
259{ 233{
@@ -512,14 +486,12 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
512 struct radeon_device *rdev = dev->dev_private; 486 struct radeon_device *rdev = dev->dev_private;
513 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 487 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
514 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 488 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
515 struct radeon_connector_atom_dig *dig_connector =
516 radeon_get_atom_connector_priv_from_encoder(encoder);
517 union lvds_encoder_control args; 489 union lvds_encoder_control args;
518 int index = 0; 490 int index = 0;
519 int hdmi_detected = 0; 491 int hdmi_detected = 0;
520 uint8_t frev, crev; 492 uint8_t frev, crev;
521 493
522 if (!dig || !dig_connector) 494 if (!dig)
523 return; 495 return;
524 496
525 if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) 497 if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI)
@@ -562,7 +534,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
562 if (dig->lvds_misc & ATOM_PANEL_MISC_888RGB) 534 if (dig->lvds_misc & ATOM_PANEL_MISC_888RGB)
563 args.v1.ucMisc |= (1 << 1); 535 args.v1.ucMisc |= (1 << 1);
564 } else { 536 } else {
565 if (dig_connector->linkb) 537 if (dig->linkb)
566 args.v1.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB; 538 args.v1.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB;
567 if (radeon_encoder->pixel_clock > 165000) 539 if (radeon_encoder->pixel_clock > 165000)
568 args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL; 540 args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL;
@@ -601,7 +573,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
601 args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_LEVEL_4; 573 args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_LEVEL_4;
602 } 574 }
603 } else { 575 } else {
604 if (dig_connector->linkb) 576 if (dig->linkb)
605 args.v2.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB; 577 args.v2.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB;
606 if (radeon_encoder->pixel_clock > 165000) 578 if (radeon_encoder->pixel_clock > 165000)
607 args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL; 579 args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL;
@@ -623,6 +595,8 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
623int 595int
624atombios_get_encoder_mode(struct drm_encoder *encoder) 596atombios_get_encoder_mode(struct drm_encoder *encoder)
625{ 597{
598 struct drm_device *dev = encoder->dev;
599 struct radeon_device *rdev = dev->dev_private;
626 struct drm_connector *connector; 600 struct drm_connector *connector;
627 struct radeon_connector *radeon_connector; 601 struct radeon_connector *radeon_connector;
628 struct radeon_connector_atom_dig *dig_connector; 602 struct radeon_connector_atom_dig *dig_connector;
@@ -636,9 +610,13 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
636 switch (connector->connector_type) { 610 switch (connector->connector_type) {
637 case DRM_MODE_CONNECTOR_DVII: 611 case DRM_MODE_CONNECTOR_DVII:
638 case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ 612 case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */
639 if (drm_detect_hdmi_monitor(radeon_connector->edid)) 613 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
640 return ATOM_ENCODER_MODE_HDMI; 614 /* fix me */
641 else if (radeon_connector->use_digital) 615 if (ASIC_IS_DCE4(rdev))
616 return ATOM_ENCODER_MODE_DVI;
617 else
618 return ATOM_ENCODER_MODE_HDMI;
619 } else if (radeon_connector->use_digital)
642 return ATOM_ENCODER_MODE_DVI; 620 return ATOM_ENCODER_MODE_DVI;
643 else 621 else
644 return ATOM_ENCODER_MODE_CRT; 622 return ATOM_ENCODER_MODE_CRT;
@@ -646,9 +624,13 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
646 case DRM_MODE_CONNECTOR_DVID: 624 case DRM_MODE_CONNECTOR_DVID:
647 case DRM_MODE_CONNECTOR_HDMIA: 625 case DRM_MODE_CONNECTOR_HDMIA:
648 default: 626 default:
649 if (drm_detect_hdmi_monitor(radeon_connector->edid)) 627 if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
650 return ATOM_ENCODER_MODE_HDMI; 628 /* fix me */
651 else 629 if (ASIC_IS_DCE4(rdev))
630 return ATOM_ENCODER_MODE_DVI;
631 else
632 return ATOM_ENCODER_MODE_HDMI;
633 } else
652 return ATOM_ENCODER_MODE_DVI; 634 return ATOM_ENCODER_MODE_DVI;
653 break; 635 break;
654 case DRM_MODE_CONNECTOR_LVDS: 636 case DRM_MODE_CONNECTOR_LVDS:
@@ -660,9 +642,13 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
660 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || 642 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
661 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) 643 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
662 return ATOM_ENCODER_MODE_DP; 644 return ATOM_ENCODER_MODE_DP;
663 else if (drm_detect_hdmi_monitor(radeon_connector->edid)) 645 else if (drm_detect_hdmi_monitor(radeon_connector->edid)) {
664 return ATOM_ENCODER_MODE_HDMI; 646 /* fix me */
665 else 647 if (ASIC_IS_DCE4(rdev))
648 return ATOM_ENCODER_MODE_DVI;
649 else
650 return ATOM_ENCODER_MODE_HDMI;
651 } else
666 return ATOM_ENCODER_MODE_DVI; 652 return ATOM_ENCODER_MODE_DVI;
667 break; 653 break;
668 case DRM_MODE_CONNECTOR_DVIA: 654 case DRM_MODE_CONNECTOR_DVIA:
@@ -729,13 +715,24 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action)
729 struct radeon_device *rdev = dev->dev_private; 715 struct radeon_device *rdev = dev->dev_private;
730 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 716 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
731 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 717 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
732 struct radeon_connector_atom_dig *dig_connector = 718 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
733 radeon_get_atom_connector_priv_from_encoder(encoder);
734 union dig_encoder_control args; 719 union dig_encoder_control args;
735 int index = 0; 720 int index = 0;
736 uint8_t frev, crev; 721 uint8_t frev, crev;
722 int dp_clock = 0;
723 int dp_lane_count = 0;
724
725 if (connector) {
726 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
727 struct radeon_connector_atom_dig *dig_connector =
728 radeon_connector->con_priv;
737 729
738 if (!dig || !dig_connector) 730 dp_clock = dig_connector->dp_clock;
731 dp_lane_count = dig_connector->dp_lane_count;
732 }
733
734 /* no dig encoder assigned */
735 if (dig->dig_encoder == -1)
739 return; 736 return;
740 737
741 memset(&args, 0, sizeof(args)); 738 memset(&args, 0, sizeof(args));
@@ -757,9 +754,9 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action)
757 args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder); 754 args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder);
758 755
759 if (args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) { 756 if (args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) {
760 if (dig_connector->dp_clock == 270000) 757 if (dp_clock == 270000)
761 args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ; 758 args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ;
762 args.v1.ucLaneNum = dig_connector->dp_lane_count; 759 args.v1.ucLaneNum = dp_lane_count;
763 } else if (radeon_encoder->pixel_clock > 165000) 760 } else if (radeon_encoder->pixel_clock > 165000)
764 args.v1.ucLaneNum = 8; 761 args.v1.ucLaneNum = 8;
765 else 762 else
@@ -781,7 +778,7 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action)
781 args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER3; 778 args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER3;
782 break; 779 break;
783 } 780 }
784 if (dig_connector->linkb) 781 if (dig->linkb)
785 args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKB; 782 args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKB;
786 else 783 else
787 args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKA; 784 args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKA;
@@ -804,38 +801,47 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
804 struct radeon_device *rdev = dev->dev_private; 801 struct radeon_device *rdev = dev->dev_private;
805 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 802 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
806 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 803 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
807 struct radeon_connector_atom_dig *dig_connector = 804 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
808 radeon_get_atom_connector_priv_from_encoder(encoder);
809 struct drm_connector *connector;
810 struct radeon_connector *radeon_connector;
811 union dig_transmitter_control args; 805 union dig_transmitter_control args;
812 int index = 0; 806 int index = 0;
813 uint8_t frev, crev; 807 uint8_t frev, crev;
814 bool is_dp = false; 808 bool is_dp = false;
815 int pll_id = 0; 809 int pll_id = 0;
810 int dp_clock = 0;
811 int dp_lane_count = 0;
812 int connector_object_id = 0;
813 int igp_lane_info = 0;
816 814
817 if (!dig || !dig_connector) 815 if (connector) {
818 return; 816 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
817 struct radeon_connector_atom_dig *dig_connector =
818 radeon_connector->con_priv;
819 819
820 connector = radeon_get_connector_for_encoder(encoder); 820 dp_clock = dig_connector->dp_clock;
821 radeon_connector = to_radeon_connector(connector); 821 dp_lane_count = dig_connector->dp_lane_count;
822 connector_object_id =
823 (radeon_connector->connector_object_id & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT;
824 igp_lane_info = dig_connector->igp_lane_info;
825 }
826
827 /* no dig encoder assigned */
828 if (dig->dig_encoder == -1)
829 return;
822 830
823 if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) 831 if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP)
824 is_dp = true; 832 is_dp = true;
825 833
826 memset(&args, 0, sizeof(args)); 834 memset(&args, 0, sizeof(args));
827 835
828 if (ASIC_IS_DCE32(rdev) || ASIC_IS_DCE4(rdev)) 836 switch (radeon_encoder->encoder_id) {
837 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
838 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
839 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
829 index = GetIndexIntoMasterTable(COMMAND, UNIPHYTransmitterControl); 840 index = GetIndexIntoMasterTable(COMMAND, UNIPHYTransmitterControl);
830 else { 841 break;
831 switch (radeon_encoder->encoder_id) { 842 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
832 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 843 index = GetIndexIntoMasterTable(COMMAND, LVTMATransmitterControl);
833 index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl); 844 break;
834 break;
835 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
836 index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl);
837 break;
838 }
839 } 845 }
840 846
841 if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) 847 if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
@@ -843,14 +849,14 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
843 849
844 args.v1.ucAction = action; 850 args.v1.ucAction = action;
845 if (action == ATOM_TRANSMITTER_ACTION_INIT) { 851 if (action == ATOM_TRANSMITTER_ACTION_INIT) {
846 args.v1.usInitInfo = radeon_connector->connector_object_id; 852 args.v1.usInitInfo = connector_object_id;
847 } else if (action == ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH) { 853 } else if (action == ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH) {
848 args.v1.asMode.ucLaneSel = lane_num; 854 args.v1.asMode.ucLaneSel = lane_num;
849 args.v1.asMode.ucLaneSet = lane_set; 855 args.v1.asMode.ucLaneSet = lane_set;
850 } else { 856 } else {
851 if (is_dp) 857 if (is_dp)
852 args.v1.usPixelClock = 858 args.v1.usPixelClock =
853 cpu_to_le16(dig_connector->dp_clock / 10); 859 cpu_to_le16(dp_clock / 10);
854 else if (radeon_encoder->pixel_clock > 165000) 860 else if (radeon_encoder->pixel_clock > 165000)
855 args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); 861 args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10);
856 else 862 else
@@ -858,13 +864,13 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
858 } 864 }
859 if (ASIC_IS_DCE4(rdev)) { 865 if (ASIC_IS_DCE4(rdev)) {
860 if (is_dp) 866 if (is_dp)
861 args.v3.ucLaneNum = dig_connector->dp_lane_count; 867 args.v3.ucLaneNum = dp_lane_count;
862 else if (radeon_encoder->pixel_clock > 165000) 868 else if (radeon_encoder->pixel_clock > 165000)
863 args.v3.ucLaneNum = 8; 869 args.v3.ucLaneNum = 8;
864 else 870 else
865 args.v3.ucLaneNum = 4; 871 args.v3.ucLaneNum = 4;
866 872
867 if (dig_connector->linkb) { 873 if (dig->linkb) {
868 args.v3.acConfig.ucLinkSel = 1; 874 args.v3.acConfig.ucLinkSel = 1;
869 args.v3.acConfig.ucEncoderSel = 1; 875 args.v3.acConfig.ucEncoderSel = 1;
870 } 876 }
@@ -904,7 +910,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
904 } 910 }
905 } else if (ASIC_IS_DCE32(rdev)) { 911 } else if (ASIC_IS_DCE32(rdev)) {
906 args.v2.acConfig.ucEncoderSel = dig->dig_encoder; 912 args.v2.acConfig.ucEncoderSel = dig->dig_encoder;
907 if (dig_connector->linkb) 913 if (dig->linkb)
908 args.v2.acConfig.ucLinkSel = 1; 914 args.v2.acConfig.ucLinkSel = 1;
909 915
910 switch (radeon_encoder->encoder_id) { 916 switch (radeon_encoder->encoder_id) {
@@ -938,23 +944,23 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t
938 if ((rdev->flags & RADEON_IS_IGP) && 944 if ((rdev->flags & RADEON_IS_IGP) &&
939 (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_UNIPHY)) { 945 (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_UNIPHY)) {
940 if (is_dp || (radeon_encoder->pixel_clock <= 165000)) { 946 if (is_dp || (radeon_encoder->pixel_clock <= 165000)) {
941 if (dig_connector->igp_lane_info & 0x1) 947 if (igp_lane_info & 0x1)
942 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; 948 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3;
943 else if (dig_connector->igp_lane_info & 0x2) 949 else if (igp_lane_info & 0x2)
944 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; 950 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7;
945 else if (dig_connector->igp_lane_info & 0x4) 951 else if (igp_lane_info & 0x4)
946 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; 952 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11;
947 else if (dig_connector->igp_lane_info & 0x8) 953 else if (igp_lane_info & 0x8)
948 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; 954 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15;
949 } else { 955 } else {
950 if (dig_connector->igp_lane_info & 0x3) 956 if (igp_lane_info & 0x3)
951 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; 957 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7;
952 else if (dig_connector->igp_lane_info & 0xc) 958 else if (igp_lane_info & 0xc)
953 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; 959 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15;
954 } 960 }
955 } 961 }
956 962
957 if (dig_connector->linkb) 963 if (dig->linkb)
958 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB; 964 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB;
959 else 965 else
960 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA; 966 args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA;
@@ -1072,8 +1078,7 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
1072 if (is_dig) { 1078 if (is_dig) {
1073 switch (mode) { 1079 switch (mode) {
1074 case DRM_MODE_DPMS_ON: 1080 case DRM_MODE_DPMS_ON:
1075 if (!ASIC_IS_DCE4(rdev)) 1081 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0);
1076 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0);
1077 if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) { 1082 if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) {
1078 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 1083 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
1079 1084
@@ -1085,8 +1090,7 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
1085 case DRM_MODE_DPMS_STANDBY: 1090 case DRM_MODE_DPMS_STANDBY:
1086 case DRM_MODE_DPMS_SUSPEND: 1091 case DRM_MODE_DPMS_SUSPEND:
1087 case DRM_MODE_DPMS_OFF: 1092 case DRM_MODE_DPMS_OFF:
1088 if (!ASIC_IS_DCE4(rdev)) 1093 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0);
1089 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0);
1090 if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) { 1094 if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) {
1091 if (ASIC_IS_DCE4(rdev)) 1095 if (ASIC_IS_DCE4(rdev))
1092 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF); 1096 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF);
@@ -1290,24 +1294,22 @@ static int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder)
1290 uint32_t dig_enc_in_use = 0; 1294 uint32_t dig_enc_in_use = 0;
1291 1295
1292 if (ASIC_IS_DCE4(rdev)) { 1296 if (ASIC_IS_DCE4(rdev)) {
1293 struct radeon_connector_atom_dig *dig_connector = 1297 dig = radeon_encoder->enc_priv;
1294 radeon_get_atom_connector_priv_from_encoder(encoder);
1295
1296 switch (radeon_encoder->encoder_id) { 1298 switch (radeon_encoder->encoder_id) {
1297 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 1299 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
1298 if (dig_connector->linkb) 1300 if (dig->linkb)
1299 return 1; 1301 return 1;
1300 else 1302 else
1301 return 0; 1303 return 0;
1302 break; 1304 break;
1303 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: 1305 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
1304 if (dig_connector->linkb) 1306 if (dig->linkb)
1305 return 3; 1307 return 3;
1306 else 1308 else
1307 return 2; 1309 return 2;
1308 break; 1310 break;
1309 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: 1311 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
1310 if (dig_connector->linkb) 1312 if (dig->linkb)
1311 return 5; 1313 return 5;
1312 else 1314 else
1313 return 4; 1315 return 4;
@@ -1641,6 +1643,7 @@ radeon_atombios_set_dac_info(struct radeon_encoder *radeon_encoder)
1641struct radeon_encoder_atom_dig * 1643struct radeon_encoder_atom_dig *
1642radeon_atombios_set_dig_info(struct radeon_encoder *radeon_encoder) 1644radeon_atombios_set_dig_info(struct radeon_encoder *radeon_encoder)
1643{ 1645{
1646 int encoder_enum = (radeon_encoder->encoder_enum & ENUM_ID_MASK) >> ENUM_ID_SHIFT;
1644 struct radeon_encoder_atom_dig *dig = kzalloc(sizeof(struct radeon_encoder_atom_dig), GFP_KERNEL); 1647 struct radeon_encoder_atom_dig *dig = kzalloc(sizeof(struct radeon_encoder_atom_dig), GFP_KERNEL);
1645 1648
1646 if (!dig) 1649 if (!dig)
@@ -1650,11 +1653,16 @@ radeon_atombios_set_dig_info(struct radeon_encoder *radeon_encoder)
1650 dig->coherent_mode = true; 1653 dig->coherent_mode = true;
1651 dig->dig_encoder = -1; 1654 dig->dig_encoder = -1;
1652 1655
1656 if (encoder_enum == 2)
1657 dig->linkb = true;
1658 else
1659 dig->linkb = false;
1660
1653 return dig; 1661 return dig;
1654} 1662}
1655 1663
1656void 1664void
1657radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t supported_device) 1665radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_t supported_device)
1658{ 1666{
1659 struct radeon_device *rdev = dev->dev_private; 1667 struct radeon_device *rdev = dev->dev_private;
1660 struct drm_encoder *encoder; 1668 struct drm_encoder *encoder;
@@ -1663,7 +1671,7 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su
1663 /* see if we already added it */ 1671 /* see if we already added it */
1664 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 1672 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1665 radeon_encoder = to_radeon_encoder(encoder); 1673 radeon_encoder = to_radeon_encoder(encoder);
1666 if (radeon_encoder->encoder_id == encoder_id) { 1674 if (radeon_encoder->encoder_enum == encoder_enum) {
1667 radeon_encoder->devices |= supported_device; 1675 radeon_encoder->devices |= supported_device;
1668 return; 1676 return;
1669 } 1677 }
@@ -1691,7 +1699,8 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su
1691 1699
1692 radeon_encoder->enc_priv = NULL; 1700 radeon_encoder->enc_priv = NULL;
1693 1701
1694 radeon_encoder->encoder_id = encoder_id; 1702 radeon_encoder->encoder_enum = encoder_enum;
1703 radeon_encoder->encoder_id = (encoder_enum & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT;
1695 radeon_encoder->devices = supported_device; 1704 radeon_encoder->devices = supported_device;
1696 radeon_encoder->rmx_type = RMX_OFF; 1705 radeon_encoder->rmx_type = RMX_OFF;
1697 radeon_encoder->underscan_type = UNDERSCAN_OFF; 1706 radeon_encoder->underscan_type = UNDERSCAN_OFF;
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index dbf86962bdd1..c74a8b20d941 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -118,7 +118,7 @@ static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
118 aligned_size = ALIGN(size, PAGE_SIZE); 118 aligned_size = ALIGN(size, PAGE_SIZE);
119 ret = radeon_gem_object_create(rdev, aligned_size, 0, 119 ret = radeon_gem_object_create(rdev, aligned_size, 0,
120 RADEON_GEM_DOMAIN_VRAM, 120 RADEON_GEM_DOMAIN_VRAM,
121 false, ttm_bo_type_kernel, 121 false, true,
122 &gobj); 122 &gobj);
123 if (ret) { 123 if (ret) {
124 printk(KERN_ERR "failed to allocate framebuffer (%d)\n", 124 printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c
index bfd2ce5f5372..0416804d8f30 100644
--- a/drivers/gpu/drm/radeon/radeon_i2c.c
+++ b/drivers/gpu/drm/radeon/radeon_i2c.c
@@ -99,6 +99,13 @@ static void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state)
99 } 99 }
100 } 100 }
101 101
102 /* switch the pads to ddc mode */
103 if (ASIC_IS_DCE3(rdev) && rec->hw_capable) {
104 temp = RREG32(rec->mask_clk_reg);
105 temp &= ~(1 << 16);
106 WREG32(rec->mask_clk_reg, temp);
107 }
108
102 /* clear the output pin values */ 109 /* clear the output pin values */
103 temp = RREG32(rec->a_clk_reg) & ~rec->a_clk_mask; 110 temp = RREG32(rec->a_clk_reg) & ~rec->a_clk_mask;
104 WREG32(rec->a_clk_reg, temp); 111 WREG32(rec->a_clk_reg, temp);
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
index 059bfa4098d7..a108c7ed14f5 100644
--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
@@ -121,11 +121,12 @@ int radeon_irq_kms_init(struct radeon_device *rdev)
121 * chips. Disable MSI on them for now. 121 * chips. Disable MSI on them for now.
122 */ 122 */
123 if ((rdev->family >= CHIP_RV380) && 123 if ((rdev->family >= CHIP_RV380) &&
124 (!(rdev->flags & RADEON_IS_IGP))) { 124 (!(rdev->flags & RADEON_IS_IGP)) &&
125 (!(rdev->flags & RADEON_IS_AGP))) {
125 int ret = pci_enable_msi(rdev->pdev); 126 int ret = pci_enable_msi(rdev->pdev);
126 if (!ret) { 127 if (!ret) {
127 rdev->msi_enabled = 1; 128 rdev->msi_enabled = 1;
128 DRM_INFO("radeon: using MSI.\n"); 129 dev_info(rdev->dev, "radeon: using MSI.\n");
129 } 130 }
130 } 131 }
131 rdev->irq.installed = true; 132 rdev->irq.installed = true;
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index b1c8ace5f080..5eee3c41d124 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -161,6 +161,7 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
161 DRM_DEBUG_KMS("tiling config is r6xx+ only!\n"); 161 DRM_DEBUG_KMS("tiling config is r6xx+ only!\n");
162 return -EINVAL; 162 return -EINVAL;
163 } 163 }
164 break;
164 case RADEON_INFO_WANT_HYPERZ: 165 case RADEON_INFO_WANT_HYPERZ:
165 /* The "value" here is both an input and output parameter. 166 /* The "value" here is both an input and output parameter.
166 * If the input value is 1, filp requests hyper-z access. 167 * If the input value is 1, filp requests hyper-z access.
@@ -323,45 +324,45 @@ KMS_INVALID_IOCTL(radeon_surface_free_kms)
323 324
324 325
325struct drm_ioctl_desc radeon_ioctls_kms[] = { 326struct drm_ioctl_desc radeon_ioctls_kms[] = {
326 DRM_IOCTL_DEF(DRM_RADEON_CP_INIT, radeon_cp_init_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 327 DRM_IOCTL_DEF_DRV(RADEON_CP_INIT, radeon_cp_init_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
327 DRM_IOCTL_DEF(DRM_RADEON_CP_START, radeon_cp_start_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 328 DRM_IOCTL_DEF_DRV(RADEON_CP_START, radeon_cp_start_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
328 DRM_IOCTL_DEF(DRM_RADEON_CP_STOP, radeon_cp_stop_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 329 DRM_IOCTL_DEF_DRV(RADEON_CP_STOP, radeon_cp_stop_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
329 DRM_IOCTL_DEF(DRM_RADEON_CP_RESET, radeon_cp_reset_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 330 DRM_IOCTL_DEF_DRV(RADEON_CP_RESET, radeon_cp_reset_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
330 DRM_IOCTL_DEF(DRM_RADEON_CP_IDLE, radeon_cp_idle_kms, DRM_AUTH), 331 DRM_IOCTL_DEF_DRV(RADEON_CP_IDLE, radeon_cp_idle_kms, DRM_AUTH),
331 DRM_IOCTL_DEF(DRM_RADEON_CP_RESUME, radeon_cp_resume_kms, DRM_AUTH), 332 DRM_IOCTL_DEF_DRV(RADEON_CP_RESUME, radeon_cp_resume_kms, DRM_AUTH),
332 DRM_IOCTL_DEF(DRM_RADEON_RESET, radeon_engine_reset_kms, DRM_AUTH), 333 DRM_IOCTL_DEF_DRV(RADEON_RESET, radeon_engine_reset_kms, DRM_AUTH),
333 DRM_IOCTL_DEF(DRM_RADEON_FULLSCREEN, radeon_fullscreen_kms, DRM_AUTH), 334 DRM_IOCTL_DEF_DRV(RADEON_FULLSCREEN, radeon_fullscreen_kms, DRM_AUTH),
334 DRM_IOCTL_DEF(DRM_RADEON_SWAP, radeon_cp_swap_kms, DRM_AUTH), 335 DRM_IOCTL_DEF_DRV(RADEON_SWAP, radeon_cp_swap_kms, DRM_AUTH),
335 DRM_IOCTL_DEF(DRM_RADEON_CLEAR, radeon_cp_clear_kms, DRM_AUTH), 336 DRM_IOCTL_DEF_DRV(RADEON_CLEAR, radeon_cp_clear_kms, DRM_AUTH),
336 DRM_IOCTL_DEF(DRM_RADEON_VERTEX, radeon_cp_vertex_kms, DRM_AUTH), 337 DRM_IOCTL_DEF_DRV(RADEON_VERTEX, radeon_cp_vertex_kms, DRM_AUTH),
337 DRM_IOCTL_DEF(DRM_RADEON_INDICES, radeon_cp_indices_kms, DRM_AUTH), 338 DRM_IOCTL_DEF_DRV(RADEON_INDICES, radeon_cp_indices_kms, DRM_AUTH),
338 DRM_IOCTL_DEF(DRM_RADEON_TEXTURE, radeon_cp_texture_kms, DRM_AUTH), 339 DRM_IOCTL_DEF_DRV(RADEON_TEXTURE, radeon_cp_texture_kms, DRM_AUTH),
339 DRM_IOCTL_DEF(DRM_RADEON_STIPPLE, radeon_cp_stipple_kms, DRM_AUTH), 340 DRM_IOCTL_DEF_DRV(RADEON_STIPPLE, radeon_cp_stipple_kms, DRM_AUTH),
340 DRM_IOCTL_DEF(DRM_RADEON_INDIRECT, radeon_cp_indirect_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 341 DRM_IOCTL_DEF_DRV(RADEON_INDIRECT, radeon_cp_indirect_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
341 DRM_IOCTL_DEF(DRM_RADEON_VERTEX2, radeon_cp_vertex2_kms, DRM_AUTH), 342 DRM_IOCTL_DEF_DRV(RADEON_VERTEX2, radeon_cp_vertex2_kms, DRM_AUTH),
342 DRM_IOCTL_DEF(DRM_RADEON_CMDBUF, radeon_cp_cmdbuf_kms, DRM_AUTH), 343 DRM_IOCTL_DEF_DRV(RADEON_CMDBUF, radeon_cp_cmdbuf_kms, DRM_AUTH),
343 DRM_IOCTL_DEF(DRM_RADEON_GETPARAM, radeon_cp_getparam_kms, DRM_AUTH), 344 DRM_IOCTL_DEF_DRV(RADEON_GETPARAM, radeon_cp_getparam_kms, DRM_AUTH),
344 DRM_IOCTL_DEF(DRM_RADEON_FLIP, radeon_cp_flip_kms, DRM_AUTH), 345 DRM_IOCTL_DEF_DRV(RADEON_FLIP, radeon_cp_flip_kms, DRM_AUTH),
345 DRM_IOCTL_DEF(DRM_RADEON_ALLOC, radeon_mem_alloc_kms, DRM_AUTH), 346 DRM_IOCTL_DEF_DRV(RADEON_ALLOC, radeon_mem_alloc_kms, DRM_AUTH),
346 DRM_IOCTL_DEF(DRM_RADEON_FREE, radeon_mem_free_kms, DRM_AUTH), 347 DRM_IOCTL_DEF_DRV(RADEON_FREE, radeon_mem_free_kms, DRM_AUTH),
347 DRM_IOCTL_DEF(DRM_RADEON_INIT_HEAP, radeon_mem_init_heap_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 348 DRM_IOCTL_DEF_DRV(RADEON_INIT_HEAP, radeon_mem_init_heap_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
348 DRM_IOCTL_DEF(DRM_RADEON_IRQ_EMIT, radeon_irq_emit_kms, DRM_AUTH), 349 DRM_IOCTL_DEF_DRV(RADEON_IRQ_EMIT, radeon_irq_emit_kms, DRM_AUTH),
349 DRM_IOCTL_DEF(DRM_RADEON_IRQ_WAIT, radeon_irq_wait_kms, DRM_AUTH), 350 DRM_IOCTL_DEF_DRV(RADEON_IRQ_WAIT, radeon_irq_wait_kms, DRM_AUTH),
350 DRM_IOCTL_DEF(DRM_RADEON_SETPARAM, radeon_cp_setparam_kms, DRM_AUTH), 351 DRM_IOCTL_DEF_DRV(RADEON_SETPARAM, radeon_cp_setparam_kms, DRM_AUTH),
351 DRM_IOCTL_DEF(DRM_RADEON_SURF_ALLOC, radeon_surface_alloc_kms, DRM_AUTH), 352 DRM_IOCTL_DEF_DRV(RADEON_SURF_ALLOC, radeon_surface_alloc_kms, DRM_AUTH),
352 DRM_IOCTL_DEF(DRM_RADEON_SURF_FREE, radeon_surface_free_kms, DRM_AUTH), 353 DRM_IOCTL_DEF_DRV(RADEON_SURF_FREE, radeon_surface_free_kms, DRM_AUTH),
353 /* KMS */ 354 /* KMS */
354 DRM_IOCTL_DEF(DRM_RADEON_GEM_INFO, radeon_gem_info_ioctl, DRM_AUTH|DRM_UNLOCKED), 355 DRM_IOCTL_DEF_DRV(RADEON_GEM_INFO, radeon_gem_info_ioctl, DRM_AUTH|DRM_UNLOCKED),
355 DRM_IOCTL_DEF(DRM_RADEON_GEM_CREATE, radeon_gem_create_ioctl, DRM_AUTH|DRM_UNLOCKED), 356 DRM_IOCTL_DEF_DRV(RADEON_GEM_CREATE, radeon_gem_create_ioctl, DRM_AUTH|DRM_UNLOCKED),
356 DRM_IOCTL_DEF(DRM_RADEON_GEM_MMAP, radeon_gem_mmap_ioctl, DRM_AUTH|DRM_UNLOCKED), 357 DRM_IOCTL_DEF_DRV(RADEON_GEM_MMAP, radeon_gem_mmap_ioctl, DRM_AUTH|DRM_UNLOCKED),
357 DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH|DRM_UNLOCKED), 358 DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH|DRM_UNLOCKED),
358 DRM_IOCTL_DEF(DRM_RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH|DRM_UNLOCKED), 359 DRM_IOCTL_DEF_DRV(RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH|DRM_UNLOCKED),
359 DRM_IOCTL_DEF(DRM_RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH|DRM_UNLOCKED), 360 DRM_IOCTL_DEF_DRV(RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH|DRM_UNLOCKED),
360 DRM_IOCTL_DEF(DRM_RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH|DRM_UNLOCKED), 361 DRM_IOCTL_DEF_DRV(RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH|DRM_UNLOCKED),
361 DRM_IOCTL_DEF(DRM_RADEON_CS, radeon_cs_ioctl, DRM_AUTH|DRM_UNLOCKED), 362 DRM_IOCTL_DEF_DRV(RADEON_CS, radeon_cs_ioctl, DRM_AUTH|DRM_UNLOCKED),
362 DRM_IOCTL_DEF(DRM_RADEON_INFO, radeon_info_ioctl, DRM_AUTH|DRM_UNLOCKED), 363 DRM_IOCTL_DEF_DRV(RADEON_INFO, radeon_info_ioctl, DRM_AUTH|DRM_UNLOCKED),
363 DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED), 364 DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),
364 DRM_IOCTL_DEF(DRM_RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED), 365 DRM_IOCTL_DEF_DRV(RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),
365 DRM_IOCTL_DEF(DRM_RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED), 366 DRM_IOCTL_DEF_DRV(RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),
366}; 367};
367int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms); 368int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms);
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index 989df519a1e4..305049afde15 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -272,7 +272,7 @@ static uint8_t radeon_compute_pll_gain(uint16_t ref_freq, uint16_t ref_div,
272 if (!ref_div) 272 if (!ref_div)
273 return 1; 273 return 1;
274 274
275 vcoFreq = ((unsigned)ref_freq & fb_div) / ref_div; 275 vcoFreq = ((unsigned)ref_freq * fb_div) / ref_div;
276 276
277 /* 277 /*
278 * This is horribly crude: the VCO frequency range is divided into 278 * This is horribly crude: the VCO frequency range is divided into
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
index b8149cbc0c70..0b8397000f4c 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -1345,7 +1345,7 @@ static struct radeon_encoder_ext_tmds *radeon_legacy_get_ext_tmds_info(struct ra
1345} 1345}
1346 1346
1347void 1347void
1348radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t supported_device) 1348radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_t supported_device)
1349{ 1349{
1350 struct radeon_device *rdev = dev->dev_private; 1350 struct radeon_device *rdev = dev->dev_private;
1351 struct drm_encoder *encoder; 1351 struct drm_encoder *encoder;
@@ -1354,7 +1354,7 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t
1354 /* see if we already added it */ 1354 /* see if we already added it */
1355 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 1355 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1356 radeon_encoder = to_radeon_encoder(encoder); 1356 radeon_encoder = to_radeon_encoder(encoder);
1357 if (radeon_encoder->encoder_id == encoder_id) { 1357 if (radeon_encoder->encoder_enum == encoder_enum) {
1358 radeon_encoder->devices |= supported_device; 1358 radeon_encoder->devices |= supported_device;
1359 return; 1359 return;
1360 } 1360 }
@@ -1374,7 +1374,8 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t
1374 1374
1375 radeon_encoder->enc_priv = NULL; 1375 radeon_encoder->enc_priv = NULL;
1376 1376
1377 radeon_encoder->encoder_id = encoder_id; 1377 radeon_encoder->encoder_enum = encoder_enum;
1378 radeon_encoder->encoder_id = (encoder_enum & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT;
1378 radeon_encoder->devices = supported_device; 1379 radeon_encoder->devices = supported_device;
1379 radeon_encoder->rmx_type = RMX_OFF; 1380 radeon_encoder->rmx_type = RMX_OFF;
1380 1381
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 5bbc086b9267..8f93e2b4b0c8 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -342,6 +342,7 @@ struct radeon_atom_ss {
342}; 342};
343 343
344struct radeon_encoder_atom_dig { 344struct radeon_encoder_atom_dig {
345 bool linkb;
345 /* atom dig */ 346 /* atom dig */
346 bool coherent_mode; 347 bool coherent_mode;
347 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */ 348 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */
@@ -360,6 +361,7 @@ struct radeon_encoder_atom_dac {
360 361
361struct radeon_encoder { 362struct radeon_encoder {
362 struct drm_encoder base; 363 struct drm_encoder base;
364 uint32_t encoder_enum;
363 uint32_t encoder_id; 365 uint32_t encoder_id;
364 uint32_t devices; 366 uint32_t devices;
365 uint32_t active_device; 367 uint32_t active_device;
@@ -378,7 +380,6 @@ struct radeon_encoder {
378 380
379struct radeon_connector_atom_dig { 381struct radeon_connector_atom_dig {
380 uint32_t igp_lane_info; 382 uint32_t igp_lane_info;
381 bool linkb;
382 /* displayport */ 383 /* displayport */
383 struct radeon_i2c_chan *dp_i2c_bus; 384 struct radeon_i2c_chan *dp_i2c_bus;
384 u8 dpcd[8]; 385 u8 dpcd[8];
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 58038f5cab38..477ba673e1b4 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -226,6 +226,11 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev)
226{ 226{
227 int i; 227 int i;
228 228
229 /* no need to take locks, etc. if nothing's going to change */
230 if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) &&
231 (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index))
232 return;
233
229 mutex_lock(&rdev->ddev->struct_mutex); 234 mutex_lock(&rdev->ddev->struct_mutex);
230 mutex_lock(&rdev->vram_mutex); 235 mutex_lock(&rdev->vram_mutex);
231 mutex_lock(&rdev->cp.mutex); 236 mutex_lock(&rdev->cp.mutex);
diff --git a/drivers/gpu/drm/radeon/radeon_state.c b/drivers/gpu/drm/radeon/radeon_state.c
index b3ba44c0a818..4ae5a3d1074e 100644
--- a/drivers/gpu/drm/radeon/radeon_state.c
+++ b/drivers/gpu/drm/radeon/radeon_state.c
@@ -3228,34 +3228,34 @@ void radeon_driver_postclose(struct drm_device *dev, struct drm_file *file_priv)
3228} 3228}
3229 3229
3230struct drm_ioctl_desc radeon_ioctls[] = { 3230struct drm_ioctl_desc radeon_ioctls[] = {
3231 DRM_IOCTL_DEF(DRM_RADEON_CP_INIT, radeon_cp_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 3231 DRM_IOCTL_DEF_DRV(RADEON_CP_INIT, radeon_cp_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
3232 DRM_IOCTL_DEF(DRM_RADEON_CP_START, radeon_cp_start, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 3232 DRM_IOCTL_DEF_DRV(RADEON_CP_START, radeon_cp_start, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
3233 DRM_IOCTL_DEF(DRM_RADEON_CP_STOP, radeon_cp_stop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 3233 DRM_IOCTL_DEF_DRV(RADEON_CP_STOP, radeon_cp_stop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
3234 DRM_IOCTL_DEF(DRM_RADEON_CP_RESET, radeon_cp_reset, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 3234 DRM_IOCTL_DEF_DRV(RADEON_CP_RESET, radeon_cp_reset, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
3235 DRM_IOCTL_DEF(DRM_RADEON_CP_IDLE, radeon_cp_idle, DRM_AUTH), 3235 DRM_IOCTL_DEF_DRV(RADEON_CP_IDLE, radeon_cp_idle, DRM_AUTH),
3236 DRM_IOCTL_DEF(DRM_RADEON_CP_RESUME, radeon_cp_resume, DRM_AUTH), 3236 DRM_IOCTL_DEF_DRV(RADEON_CP_RESUME, radeon_cp_resume, DRM_AUTH),
3237 DRM_IOCTL_DEF(DRM_RADEON_RESET, radeon_engine_reset, DRM_AUTH), 3237 DRM_IOCTL_DEF_DRV(RADEON_RESET, radeon_engine_reset, DRM_AUTH),
3238 DRM_IOCTL_DEF(DRM_RADEON_FULLSCREEN, radeon_fullscreen, DRM_AUTH), 3238 DRM_IOCTL_DEF_DRV(RADEON_FULLSCREEN, radeon_fullscreen, DRM_AUTH),
3239 DRM_IOCTL_DEF(DRM_RADEON_SWAP, radeon_cp_swap, DRM_AUTH), 3239 DRM_IOCTL_DEF_DRV(RADEON_SWAP, radeon_cp_swap, DRM_AUTH),
3240 DRM_IOCTL_DEF(DRM_RADEON_CLEAR, radeon_cp_clear, DRM_AUTH), 3240 DRM_IOCTL_DEF_DRV(RADEON_CLEAR, radeon_cp_clear, DRM_AUTH),
3241 DRM_IOCTL_DEF(DRM_RADEON_VERTEX, radeon_cp_vertex, DRM_AUTH), 3241 DRM_IOCTL_DEF_DRV(RADEON_VERTEX, radeon_cp_vertex, DRM_AUTH),
3242 DRM_IOCTL_DEF(DRM_RADEON_INDICES, radeon_cp_indices, DRM_AUTH), 3242 DRM_IOCTL_DEF_DRV(RADEON_INDICES, radeon_cp_indices, DRM_AUTH),
3243 DRM_IOCTL_DEF(DRM_RADEON_TEXTURE, radeon_cp_texture, DRM_AUTH), 3243 DRM_IOCTL_DEF_DRV(RADEON_TEXTURE, radeon_cp_texture, DRM_AUTH),
3244 DRM_IOCTL_DEF(DRM_RADEON_STIPPLE, radeon_cp_stipple, DRM_AUTH), 3244 DRM_IOCTL_DEF_DRV(RADEON_STIPPLE, radeon_cp_stipple, DRM_AUTH),
3245 DRM_IOCTL_DEF(DRM_RADEON_INDIRECT, radeon_cp_indirect, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 3245 DRM_IOCTL_DEF_DRV(RADEON_INDIRECT, radeon_cp_indirect, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
3246 DRM_IOCTL_DEF(DRM_RADEON_VERTEX2, radeon_cp_vertex2, DRM_AUTH), 3246 DRM_IOCTL_DEF_DRV(RADEON_VERTEX2, radeon_cp_vertex2, DRM_AUTH),
3247 DRM_IOCTL_DEF(DRM_RADEON_CMDBUF, radeon_cp_cmdbuf, DRM_AUTH), 3247 DRM_IOCTL_DEF_DRV(RADEON_CMDBUF, radeon_cp_cmdbuf, DRM_AUTH),
3248 DRM_IOCTL_DEF(DRM_RADEON_GETPARAM, radeon_cp_getparam, DRM_AUTH), 3248 DRM_IOCTL_DEF_DRV(RADEON_GETPARAM, radeon_cp_getparam, DRM_AUTH),
3249 DRM_IOCTL_DEF(DRM_RADEON_FLIP, radeon_cp_flip, DRM_AUTH), 3249 DRM_IOCTL_DEF_DRV(RADEON_FLIP, radeon_cp_flip, DRM_AUTH),
3250 DRM_IOCTL_DEF(DRM_RADEON_ALLOC, radeon_mem_alloc, DRM_AUTH), 3250 DRM_IOCTL_DEF_DRV(RADEON_ALLOC, radeon_mem_alloc, DRM_AUTH),
3251 DRM_IOCTL_DEF(DRM_RADEON_FREE, radeon_mem_free, DRM_AUTH), 3251 DRM_IOCTL_DEF_DRV(RADEON_FREE, radeon_mem_free, DRM_AUTH),
3252 DRM_IOCTL_DEF(DRM_RADEON_INIT_HEAP, radeon_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), 3252 DRM_IOCTL_DEF_DRV(RADEON_INIT_HEAP, radeon_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
3253 DRM_IOCTL_DEF(DRM_RADEON_IRQ_EMIT, radeon_irq_emit, DRM_AUTH), 3253 DRM_IOCTL_DEF_DRV(RADEON_IRQ_EMIT, radeon_irq_emit, DRM_AUTH),
3254 DRM_IOCTL_DEF(DRM_RADEON_IRQ_WAIT, radeon_irq_wait, DRM_AUTH), 3254 DRM_IOCTL_DEF_DRV(RADEON_IRQ_WAIT, radeon_irq_wait, DRM_AUTH),
3255 DRM_IOCTL_DEF(DRM_RADEON_SETPARAM, radeon_cp_setparam, DRM_AUTH), 3255 DRM_IOCTL_DEF_DRV(RADEON_SETPARAM, radeon_cp_setparam, DRM_AUTH),
3256 DRM_IOCTL_DEF(DRM_RADEON_SURF_ALLOC, radeon_surface_alloc, DRM_AUTH), 3256 DRM_IOCTL_DEF_DRV(RADEON_SURF_ALLOC, radeon_surface_alloc, DRM_AUTH),
3257 DRM_IOCTL_DEF(DRM_RADEON_SURF_FREE, radeon_surface_free, DRM_AUTH), 3257 DRM_IOCTL_DEF_DRV(RADEON_SURF_FREE, radeon_surface_free, DRM_AUTH),
3258 DRM_IOCTL_DEF(DRM_RADEON_CS, r600_cs_legacy_ioctl, DRM_AUTH) 3258 DRM_IOCTL_DEF_DRV(RADEON_CS, r600_cs_legacy_ioctl, DRM_AUTH)
3259}; 3259};
3260 3260
3261int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls); 3261int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-20 21:31:37 -0500